CN106024893B - 高k金属栅器件及其制备方法 - Google Patents

高k金属栅器件及其制备方法 Download PDF

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CN106024893B
CN106024893B CN201610367945.6A CN201610367945A CN106024893B CN 106024893 B CN106024893 B CN 106024893B CN 201610367945 A CN201610367945 A CN 201610367945A CN 106024893 B CN106024893 B CN 106024893B
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titanium nitride
tisin
metal gate
nitride layer
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CN106024893A (zh
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何志斌
景旭斌
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Shanghai Huali Microelectronics Corp
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Abstract

本发明提供了一种高K金属栅器件及其制备方法，采用硅材料层作为NMOS区域下层氮化硅的阻挡层，利用退火工艺使硅充分扩散到上层氮化硅和下层氮化硅中，形成PMOS区域的TiSiN中间层和NMOS区域的TiSiN层，TiSiN材料可以阻挡后续上层金属原子向下扩散，提高了金属栅器件的稳定性；并且在后续移除NMOS区域表面残留的硅材料层，从而消除了硅材料层剩余厚度波动及其带来的NMOS阈值电压的波动，进一步提高了NMOS器件的稳定性，从而整体上提高了高K金属栅器件的稳定性。

Description

高K金属栅器件及其制备方法
技术领域
本发明涉及半导体工艺技术领域，具体涉及一种高K金属栅器件及其制备方法。
背景技术
随着超大规模集成电路技术的迅速发展，MOSFET器件的尺寸在不断减小，通常包括MOSFET器件沟道长度的减小，栅氧化层厚度的减薄等以获得更快的器件速度。但是发展至超深亚微米级时，特别是45纳米及以下技术节点时，已无法承受持续降低栅氧厚度所带来的高漏电。业界在45纳米及以下工艺引入了高k和金属栅的设计。
在高k金属栅半导体工艺中，通常选用氮化钽(TaN)作为NMOS区域P型功函数层TiN移除的阻挡层，而TiN刻蚀制程本身会有一定的波动，这种波动会造成作为阻挡层的TaN剩余厚度的波动，最终也就反映到了NMOS金属栅器件的阈值电压波动上。同时，TaN作为PMOS的功函数中间层，晶格结构也决定了，在一定的热力学条件下其无法有效地阻挡上下层金属元素的扩散行为。因此，对于某些制程来说，高k金属栅PMOS器件的稳定性也不理想。
发明内容
为了克服以上问题，本发明旨在提供一种高K金属栅器件及其制备方法。
为了达到上述目的，本发明提供了一种高K金属栅器件，包括NMOS区域和PMOS区域，NMOS区域和PMOS区域的硅衬底上均具有高K介质层、下层氮化钛层、以及上层氮化钛层，NMOS区域的硅衬底上具有高K介质层以及下层氮化钛层，所述NMOS区域中在下层氮化钛层表面形成有TiSiN层，所述PMOS区域中在下层氮化钛层和上层氮化钛层之间具有TiSiN中间层。
优选地，所述TiSiN层为无定形态，所述TiSiN中间层为无定形态。
优选地，所述TiSiN中间层的厚度大于所述TiSiN层的厚度。
优选地，所述TiSiN层的厚度为2～80埃，所述TiSiN中间层的厚度为2～80埃。
为了达到上述目的，本发明提供了一种上述的高K金属栅器件的制备方法，其包括以下步骤：
步骤01：提供一硅衬底；硅衬底具有PMOS区域和NMOS区域，PMOS区域和NMOS区域均具有高K介质层和下层氮化钛层；
步骤02：在所述下层氮化钛层上形成硅材料层；
步骤03：在所述硅材料层上形成上层氮化钛层；
步骤04：去除所述NMOS区域的上层氮化钛层；
步骤05：经退火工艺，使硅材料层中的硅产生扩散进入上层氮化钛层和下层氮化钛层，从而在PMOS区域的上层氮化钛层和下层氮化钛层之间形成TiSiN中间层，以及在NMOS区域的下层氮化钛层表面形成TiSiN层；
步骤06：去除所述NMOS区域残留的硅材料层。
优选地，所述步骤02中，采用原子层沉积工艺在所述下层氮化钛层上沉积硅材料层。
优选地，所述上层氮化钛层为P型功函数层，所述步骤06之后，还包括：在完成所述步骤06的硅衬底上形成N型功函数层。
优选地，所述步骤05中，所述退火工艺中采用的退火温度为50～1250℃，所述退火时间为0.1～1000秒。
优选地，所述步骤06中，采用四甲基氢氧化氨来去除所述NMOS区域残留的硅材料层。
优选地，所述TiSiN中间层的厚度大于所述TiSiN层的厚度。
本发明的高K金属栅器件及其制备方法，采用硅材料层作为NMOS区域下层氮化硅的阻挡层，利用退火工艺使硅充分扩散到上层氮化硅和下层氮化硅中，形成PMOS区域的TiSiN中间层和NMOS区域的TiSiN层，TiSiN材料可以阻挡后续上层金属原子向下扩散，提高了金属栅器件的稳定性；并且在后续移除NMOS区域表面残留的硅材料层，从而消除了硅材料层剩余厚度波动及其带来的NMOS阈值电压的波动，进一步提高了NMOS器件的稳定性，从而整体上提高了高K金属栅器件的稳定性。
附图说明
图1为本发明的一个较佳实施例的高K金属栅器件的结构示意图
图2为本发明的一个较佳实施例的高K金属栅器件的制备方法的流程示意图
图3～8为本发明的一个较佳实施例的高K金属栅器件的制备方法的各制备步骤示意图
具体实施方式
为使本发明的内容更加清楚易懂，以下结合说明书附图，对本发明的内容作进一步说明。当然本发明并不局限于该具体实施例，本领域内的技术人员所熟知的一般替换也涵盖在本发明的保护范围内。
以下结合附图1-8和具体实施例对本发明作进一步详细说明。需说明的是，附图均采用非常简化的形式、使用非精准的比例，且仅用以方便、清晰地达到辅助说明本实施例的目的。
请参阅图1，本实施例的高K金属栅器件，包括NMOS区域和PMOS区域，NMOS区域和PMOS区域的硅衬底01上均具有沟槽、沟槽底部形成有氧化层02、氧化层02上以及沟槽侧壁沉积有高K介质层03，在沟槽内的高K介质层03表面形成有下层氮化钛层04；NMOS区域的沟槽内的下层氮化钛层04表面具有TiSiN层051；PMOS区域的沟槽内，下层氮化钛层04表面具有TiSiN中间层052，在TiSiN中间层052表面具有上层氮化钛层06；本实施例中，上层氮化钛层06为P型功函数层；在PMOS区域的上层氮化钛层06上还具有N型功函数层以及金属栅，在NMOS区域的TiSiN层051上还具有N型功函数层以及金属栅；
本实施例中，TiSiN层051为无定形态，TiSiN中间层052为无定形态，TiSiN中间层052的厚度大于TiSiN层051的厚度，较佳的，TiSiN层051的厚度为2～80埃，TiSiN中间层052为2～80埃；因此，无定形态的TiSiN层051和TiSiN中间层052具有较小的功函数波动，且可以阻挡后续沉积的金属原子向下扩散，提高了NMOS器件和PMOS器件的稳定性。高K介质层03的材料可以为HfO2。
为了达到上述目的，本发明还提供了一种上述的高K金属栅器件的制备方法，请参阅图2，其包括以下步骤：
步骤01：提供一硅衬底；硅衬底具有PMOS区域和NMOS区域，PMOS区域和NMOS区域均具有高K介质层和下层氮化钛层；
具体的，请参阅图3，分别在PMOS区域和NMOS区域同时形成沟槽，分别在PMOS区域和NMOS区域的沟槽底部同时形成氧化层02，分别在PMOS区域和NMOS区域的氧化层02和沟槽侧壁同时形成高K介质层03，分别在PMOS区域和NMOS区域的高K介质层03表面同时形成下层氮化钛层04；关于此过程可以常规工艺，这里不再赘述。高K介质层03的材料可以为HfO2。
步骤02：在下层氮化钛层上形成硅材料层；
具体的，请参阅图4，采用原子层沉积工艺分别在PMOS和NMOS的下层氮化钛层04上同时沉积硅材料层05；硅材料层05作为后续步骤04中的阻挡层以及后续步骤05中的牺牲层。
步骤03：在硅材料层上形成上层氮化钛层；
具体的，请参阅图5，这里上层氮化钛层06为P型功函数层，沉积上层氮化钛层06的工艺可以采用常规工艺这里不再赘述。
步骤04：去除NMOS区域的上层氮化钛层；
具体的，请参阅图6，采用光刻和刻蚀工艺来去除NMOS区域的沟槽内的上层氮化钛层06，刻蚀停止于NMOS区域的硅材料层05表面。
步骤05：经退火工艺，使硅材料层中的硅产生扩散进入上层氮化钛层和下层氮化钛层，从而在PMOS区域的上层氮化钛层和下层氮化钛层之间形成TiSiN中间层，以及在NMOS区域的下层氮化钛层表面形成TiSiN层；
具体的，请参阅图7，退火工艺可以使NMOS区域和PMOS区域的硅材料层05充分扩散，PMOS区域中，硅材料层05向上层氮化钛层06、下层氮化钛层04充分扩散，与上层氮化钛层06、下层氮化钛层04形成TiSiN材料，从而在下层氮化钛层04和上层氮化钛层06之间形成TiSiN中间层052；NMOS区域中，硅材料层05与下层氮化钛层04充分扩散，与下层氮化钛层04的氮化钛形成TiSiN材料，从而形成下层氮化钛层04表面的TiSiN层051；较佳的，本实施例中退火工艺中采用的退火温度为50～1250℃，退火时间为0.1～1000秒，所形成的TiSiN中间层052的厚度大于TiSiN层051的厚度，较佳的，TiSiN层051的厚度为2～80埃，TiSiN中间层052为2～80埃。需要说明的是，NMOS区域中由于硅材料层05上没有上层氮化钛层06，因此，在退火工艺中，TiSiN层051表面仍然残留有硅材料层05，后续工艺中需要将其取出，从而避免TiSiN层051上残留硅材料层05的厚度波动对NMOS器件稳定性的影响。
步骤06：去除NMOS区域残留的硅材料层。
具体的，请参阅图8，采用四甲基氢氧化氨来去除NMOS区域残留的硅材料层06；四甲基氢氧化氨的浓度为1～20％，所采用的温度为5～50℃。
本实施例中，步骤06之后，还包括：在完成步骤06的硅衬底上形成N型功函数层，在N型功函数层上形成金属栅等后续金属栅工艺的步骤，这里不再赘述。
虽然本发明已以较佳实施例揭示如上，然所述实施例仅为了便于说明而举例而已，并非用以限定本发明，本领域的技术人员在不脱离本发明精神和范围的前提下可作若干的更动与润饰，本发明所主张的保护范围应以权利要求书所述为准。

Claims (6)

1.一种高K金属栅器件的制备方法，其特征在于，包括以下步骤：
步骤01：提供一硅衬底；硅衬底具有PMOS区域和NMOS区域，PMOS区域和NMOS区域均具有高K介质层和下层氮化钛层；
步骤02：在所述下层氮化钛层上形成硅材料层；
步骤03：在所述硅材料层上形成上层氮化钛层；
步骤04：去除所述NMOS区域的上层氮化钛层；
步骤05：经退火工艺，使硅材料层中的硅产生扩散进入上层氮化钛层和下层氮化钛层，从而在PMOS区域的上层氮化钛层和下层氮化钛层之间形成TiSiN中间层，以及在NMOS区域的下层氮化钛层表面形成TiSiN层；
步骤06：去除所述NMOS区域残留的硅材料层。
2.根据权利要求1所述的高K金属栅器件的制备方法，其特征在于，所述步骤02中，采用原子层沉积工艺在所述下层氮化钛层上沉积硅材料层。
3.根据权利要求1所述的高K金属栅器件的制备方法，其特征在于，所述上层氮化钛层为P型功函数层，所述步骤06之后，还包括：在完成所述步骤06的硅衬底上形成N型功函数层。
4.根据权利要求1所述的高K金属栅器件的制备方法，其特征在于，所述步骤05中，所述退火工艺中采用的退火温度为50～1250℃，所述退火时间为0.1～1000秒。
5.根据权利要求1所述的高K金属栅器件的制备方法，其特征在于，所述步骤06中，采用四甲基氢氧化氨来去除所述NMOS区域残留的硅材料层。
6.根据权利要求1所述的高K金属栅器件的制备方法，其特征在于，所述TiSiN中间层的厚度大于所述TiSiN层的厚度。
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