CN106023921B - A kind of GOA circuits - Google Patents
A kind of GOA circuits Download PDFInfo
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- CN106023921B CN106023921B CN201610536534.5A CN201610536534A CN106023921B CN 106023921 B CN106023921 B CN 106023921B CN 201610536534 A CN201610536534 A CN 201610536534A CN 106023921 B CN106023921 B CN 106023921B
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- film transistor
- tft
- thin film
- electrically connected
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
Abstract
The present invention provides a kind of GOA circuits, including cascade n grades of GOA unit, includes per level-one GOA unit：Pull up control module, pull-up module, pull-down module, bootstrap capacitor and square-wave signal generation module；Wherein, pull-up control module is connect respectively with pull-up module, pull-down module and square-wave signal generation module.The GOA circuits of the present invention are by setting square-wave signal generation module, the frequency of its square-wave signal generated is between low frequency and high frequency, the grid of thin film transistor (TFT) can be effectively prevent excessively high or underfrequency signal is influenced by frequency, into without causing circuit operation irregularity.
Description
Technical field
The present invention relates to technical field of liquid crystal display more particularly to a kind of GOA circuits.
Background technology
Gate Driver On Array, abbreviation GOA, the i.e. array substrate in existing liquid crystal display panel of thin film transistor
Upper making scan drive circuit, realizes the type of drive progressively scanned to scan line.The structure diagram of existing GOA circuits is such as
Shown in Fig. 1, the GOA circuits include pull-up control module 101, pull-up module 104, pull-down module 105, bootstrap capacitor 103 and
Pull down maintenance module 102.
Maintenance module 102 is pulled down for the output terminal Q (n) and scanning signal G to the pull-up control module in GOA circuits
(n) output terminal carries out auxiliary drop-down.And the switching frequency of maintenance module is pulled down generally using identical with clock signal frequency
Frequency either once be easy to cause the grid of thin film transistor (TFT) by high frequency or low frequency signal in this way every the switching of several frames
It influences, causes circuit operation irregularity.
Therefore, it is necessary to a kind of GOA circuits are provided, it is of the existing technology to solve the problems, such as.
Invention content
The purpose of the present invention is to provide a kind of GOA circuits, can provide the scanning electricity that a kind of square-wave signal maintains this grade
The low level of the scanning signal of ordinary mail number and this grade, and the frequency of square-wave signal is between low frequency and high frequency, it is existing to solve
Caused by some GOA circuit becauses switching frequencies are too high or too low the technical issues of circuit operation irregularity.
To solve the above problems, technical solution provided by the invention is as follows：
The embodiment of the present invention provides a kind of GOA circuits, including cascade n grades of GOA unit, is wrapped per level-one GOA unit
It includes：
Control module is pulled up, the scanning level signal of this grade is generated for the control of the scanning signal according to upper level；
Pull-up module draws high the scanning letter of this grade for the scanning level signal according to this grade and the clock signal of this grade
Number；
Pull-down module for the scanning signal according to next stage, drags down the scanning level signal of this grade；
Bootstrap capacitor, for generating the high level of the scanning signal of this grade；And
Square-wave signal generation module maintains the scanning level signal of this grade and the scanning of this grade to believe for generating square-wave signal
Number low level；Wherein,
Pull-up control module is connect respectively with pull-up module, pull-down module and square-wave signal generation module.
2m second clock signal source is further included in the GOA circuits of the present invention, is electrically connected at the square-wave signal life
Into module, the square-wave signal of this grade is generated for providing the second clock signal of this grade to the square-wave signal generation module,
In, m is positive integer.
In the GOA circuits of the present invention, the square-wave signal generation module of 2mk+a grades of GOA units is electrically connected at
A-th of second clock signal source, wherein, a is the integer less than or equal to 2m, and k is the positive integer more than or equal to 0.
In the GOA circuits of the present invention, the pulsion phase for the second clock signal that 2m second clock signal source provides together and
The time difference for the second clock signal that adjacent second clock signal source provides is identical.
In the GOA circuits of the present invention, the frequency of second clock signal that 2m second clock signal source provides is this grade
2~50 times of frequency of clock signal.
In the GOA circuits of the present invention, square-wave signal generation module includes first film transistor, the second film crystal
Pipe, third thin film transistor (TFT), the 4th thin film transistor (TFT), the 5th thin film transistor (TFT), the 6th thin film transistor (TFT), the 7th thin film transistor (TFT)
With the 8th thin film transistor (TFT)；
The grid of first film transistor is electrically connected at the square-wave signal generation module of the n-th-m grades of GOA unit circuit
Output terminal；The source electrode of first film transistor is electrically connected at constant voltage high level source；The drain electrode of first film transistor electrically connects
It is connected to the drain electrode of the grid of third thin film transistor (TFT), the grid and the second thin film transistor (TFT) of the 5th thin film transistor (TFT)；
The grid of second thin film transistor (TFT) is electrically connected at the square-wave signal generation module of the n-th+m grades of GOA unit circuit
Output terminal, the source electrode of the second thin film transistor (TFT) are electrically connected at constant voltage low level source；
The source electrode of third thin film transistor (TFT) is electrically connected at the second clock signal source of this grade；The leakage of third thin film transistor (TFT)
Pole is electrically connected at the output terminal of square-wave signal generation module；
The grid of 4th thin film transistor (TFT) is electrically connected at the square-wave signal generation module of the n-th+m grades of GOA unit circuit
Output terminal；The source electrode of 4th thin film transistor (TFT) is electrically connected at constant voltage low level source；The drain electrode of 4th thin film transistor (TFT) electrically connects
Be connected to the drain electrode of the 5th thin film transistor (TFT), the drain electrode of the 6th thin film transistor (TFT), the 7th thin film transistor (TFT) grid and the 8th film
The grid of transistor；
The source electrode of 5th thin film transistor (TFT) is electrically connected at the second clock signal source of this grade；
The grid of 6th thin film transistor (TFT) is electrically connected at the output terminal of the scanning-line signal of this grade；6th thin film transistor (TFT)
Source electrode be electrically connected at constant voltage low level source；
The source electrode of 7th thin film transistor (TFT) is electrically connected at constant voltage low level source；The drain electrode of 7th thin film transistor (TFT) electrically connects
It is connected to the output terminal of pull-up control module；
The source electrode of 8th thin film transistor (TFT) is electrically connected at constant voltage low level source；The drain electrode of 8th thin film transistor (TFT) electrically connects
It is connected to the output terminal of the scanning signal of this grade.
In the GOA circuits of the present invention, pull-up control module includes the 9th thin film transistor (TFT), the grid of the 9th thin film transistor (TFT)
Pole is electrically connected at the output terminal of the scanning signal of upper level；The source electrode of 9th thin film transistor (TFT) is electrically connected at the high electricity of constant pressure
Source；The drain electrode of 9th thin film transistor (TFT) is electrically connected at the output terminal of pull-up control module.
In the GOA circuits of the present invention, pull-up module includes the tenth thin film transistor (TFT), the grid electricity of the tenth thin film transistor (TFT)
Property be connected to pull-up control module output terminal；The source electrode of tenth thin film transistor (TFT) accesses the clock signal of this grade；Tenth film
The drain electrode of transistor is electrically connected at the output terminal of the scanning signal of this grade.
In the GOA circuits of the present invention, pull-down module includes the 11st thin film transistor (TFT) and the 12nd thin film transistor (TFT)；
The grid of 11st thin film transistor (TFT) is electrically connected at the output terminal of the scanning signal of next stage；11st film is brilliant
The source electrode of body pipe is electrically connected at the low power supply of constant pressure；The drain electrode of 11st thin film transistor (TFT) is electrically connected and pull-up control module
Output terminal；
The grid of 12nd thin film transistor (TFT) is electrically connected at the output terminal of the scanning signal of next stage；12nd film is brilliant
The source electrode of body pipe is electrically connected at the low power supply of constant pressure；The drain electrode of 12nd thin film transistor (TFT) is electrically connected at the scanning signal of this grade
Output terminal.
In the GOA circuits of the present invention, one end of bootstrap capacitor is electrically connected at the output terminal of pull-up control module；Bootstrapping
The other end of capacitance is electrically connected at the output terminal of the scanning signal of this grade.
Compared to existing GOA circuits, GOA circuits of the invention are generated by setting square-wave signal generation module
The frequency of square-wave signal between low frequency and high frequency, can effectively prevent the grid of thin film transistor (TFT) by frequency it is excessively high or
The influence of underfrequency signal, into without causing circuit operation irregularity.
The above to allow the present invention can be clearer and more comprehensible, preferred embodiment cited below particularly, and coordinate institute's accompanying drawings, be made
Detailed description are as follows：
Description of the drawings
Below in conjunction with the accompanying drawings, it is described in detail by the specific embodiment to the present invention, technical scheme of the present invention will be made
And other beneficial effects are apparent.
Fig. 1 is a kind of structure diagram of existing GOA circuits；
Fig. 2 is the structure diagram of the first preferred embodiment of the GOA circuits of the present invention；
Fig. 3 is that the square-wave signal of the first preferred embodiment of the GOA circuits of the present invention generates oscillogram；
Fig. 4 is the signal waveforms of the first preferred embodiment of the GOA circuits of the present invention；
Fig. 5 is the structure diagram of the second preferred embodiment of the GOA circuits of the present invention；
Fig. 6 is the square-wave signal generation oscillogram of the second preferred embodiment of the GOA circuits of the present invention；
Fig. 7 is the signal waveforms of the second preferred embodiment of the GOA circuits of the present invention.
Specific embodiment
The technological means and its effect taken further to illustrate the present invention, below in conjunction with the preferred implementation of the present invention
Example and its attached drawing are described in detail.
Referring to Fig. 2, the structure diagram of the first preferred embodiment of the GOA circuits for the present invention；
The GOA circuits of this preferred embodiment include pull-up control module 201, pull-up module 202, pull-down module 203, bootstrapping
Capacitance Cbt and square-wave signal generation module 204.Control module 201 is pulled up, for the scanning signal G (n- according to upper level
1) control generates the scanning level signal of this grade；Pull-up module 202, for according to the scanning level signal of this grade and this grade
Clock signal CK (n) draw high the scanning signal G (n) of this grade；Pull-down module 203, for the scanning signal G (n according to next stage
+ 1) the scanning level signal of this grade, is dragged down；Square-wave signal generation module 204 maintains this grade for generating square-wave signal P (n)
Scan the low level of level signal and the scanning signal of this grade；Bootstrap capacitor Cbt is arranged on the output terminal of pull-up control module 201
And between the output terminal of the scanning signal G (n) of this grade, for generating the high level of the scanning signal G (n) of this grade；
Wherein, pull-up control module 201 respectively with pull-up module 202, pull-down module 203 and square-wave signal generation module
204 connections.
The GOA circuits of the embodiment of the present invention further include 4 second clock signal sources, and second clock signal source is electrically connected at
Square-wave signal generation module 204 generates the side of this grade for providing the second clock signal of this grade to square-wave signal generation module
Wave signal P (n).
It should be noted that the square-wave signal generation module 204 of 4k+1 grades of GOA units of GOA circuits is electrically connected at
First second clock signal source, the square-wave signal generation module 204 of 4k+2 grades of GOA units of GOA circuits are electrically connected at
Second second clock signal source, the square-wave signal generation module 204 of 4k+3 grades of GOA units of GOA circuits are electrically connected at
Third second clock signal source, the square-wave signal generation module 204 of 4k+4 grades of GOA units of GOA circuits are electrically connected at
4th second clock signal source, wherein, k is the integer not less than 0.
The pulsion phase of second clock signal that 4 second clock signal sources provide is same and adjacent second clock signal source carries
The time difference of the second clock signal of confession is identical.
The frequency of second clock signal that 4 second clock signal sources provide is the frequency of the clock signal CK (n) of this grade
2~50 times.The frequency of second clock signal that this preferred embodiment can provide by adjusting second clock signal source so that
The GOA circuits of the embodiment of the present invention are more stablized.Preferably, 4 second clock signal sources of the GOA circuits of the embodiment of the present invention
The frequency of the second clock signal of offer is 4 times of the frequency of this grade of clock signal CK (n).
Square-wave signal generation module 204 includes first film transistor T1, the second thin film transistor (TFT) T2, third film crystal
Pipe T3, the 4th thin film transistor (TFT) T4, the 5th thin film transistor (TFT) T6, the 6th thin film transistor (TFT) T6, the 7th thin film transistor (TFT) T7 and
Eight thin film transistor (TFT) T8；
The grid of first film transistor T7 is electrically connected at square-wave signal P (n-2) the generation moulds of the n-th -2 grades GOA units
The output terminal of block；The source electrode of first film transistor T1 is electrically connected at constant voltage high level source VDD；First film transistor T1's
Drain electrode is electrically connected at the grid of third thin film transistor (TFT) T3, the grid of the 5th thin film transistor (TFT) T5 and the second thin film transistor (TFT) T2
Drain electrode；
The grid of second thin film transistor (TFT) T2 is electrically connected at square-wave signal P (n+2) the generation moulds of the n-th+2 grades GOA units
The output terminal of block, the source electrode of the second thin film transistor (TFT) T2 are electrically connected at constant voltage low level source Vss；
The source electrode of third thin film transistor (TFT) T3 is electrically connected at the second clock signal source CKH of this grade；Third film crystal
The drain electrode of pipe T3 is electrically connected at the output terminal of square-wave signal generation module P (n)；
The grid of 4th thin film transistor (TFT) T4 is electrically connected at square-wave signal P (n+2) the generation moulds of the n-th+2 grades GOA units
The output terminal of block；The source electrode of 4th thin film transistor (TFT) T4 is electrically connected at constant voltage low level source Vss；4th thin film transistor (TFT) T4's
Drain electrode is electrically connected at the drain electrode, the drain electrode of the 6th thin film transistor (TFT) T6, the 7th thin film transistor (TFT) T7 of the 5th thin film transistor (TFT) T5
Grid and the 8th thin film transistor (TFT) T8 grid；
The source electrode of 5th thin film transistor (TFT) T5 is electrically connected at the second clock signal source CKH of this grade；
The grid of 6th thin film transistor (TFT) T6 is electrically connected at the output terminal of the scanning signal G (n) of this grade；6th film is brilliant
The source electrode of body pipe T6 is electrically connected at constant voltage low level source Vss；
The source electrode of 7th thin film transistor (TFT) T7 is electrically connected at constant voltage low level source Vss；The leakage of 7th thin film transistor (TFT) T7
Pole is electrically connected at the output terminal of pull-up control module 201；
The source electrode of 8th thin film transistor (TFT) T8 is electrically connected at constant voltage low level source Vss；The leakage of 8th thin film transistor (TFT) T8
Pole is electrically connected at the output terminal of the scanning signal G (n) of this grade.
It pulls up control module 201 and includes the 9th thin film transistor (TFT) T9, the grid of the 9th thin film transistor (TFT) T9 is electrically connected at
The output terminal of the scanning signal G (n-1) of upper level；The source electrode of 9th thin film transistor (TFT) T9 is electrically connected at the high power vd D of constant pressure；
The drain electrode of 9th thin film transistor (TFT) T9 is electrically connected at the output terminal of pull-up control module 201.
Pull-up module 202 includes the tenth thin film transistor (TFT) T10, and the grid of the tenth thin film transistor (TFT) T10 is electrically connected at
Draw the output terminal of control module 201；The source electrode of tenth thin film transistor (TFT) T10 accesses the clock signal CK (n) of this grade；Tenth film
The drain electrode of transistor T10 is electrically connected at the output terminal of the scanning signal G (n) of this grade.
Pull-down module 203 includes the 11st thin film transistor (TFT) T11 and the 12nd thin film transistor (TFT) T12；
The grid of 11st thin film transistor (TFT) T11 is electrically connected at the output terminal of the scanning signal G (n+1) of next stage；The
The source electrode of 11 thin film transistor (TFT) T11 is electrically connected at the low power supply Vss of constant pressure；The drain electrode of 11st thin film transistor (TFT) T11 is electrical
Connection and the output terminal of pull-up control module 201；
The grid of 12nd thin film transistor (TFT) T12 is electrically connected at the output terminal of the scanning signal G (n+1) of next stage；The
The source electrode of 12 thin film transistor (TFT) T12 is electrically connected at the low power supply Vss of constant pressure；The drain electrode of 12nd thin film transistor (TFT) T12 is electrical
It is connected to the output terminal of the scanning signal G (n) of this grade.
One end of bootstrap capacitor Cbt is electrically connected at the output terminal of pull-up control module 201；Bootstrap capacitor Cbt's is another
End is electrically connected at the output terminal of the scanning signal G (n) of this grade.
Referring to Fig. 2, Fig. 3, Fig. 3 is that the square-wave signal of the first preferred embodiment of the GOA circuits of the present invention generates oscillogram；
Within t1~t2 periods, as the square-wave signal P (n- of the square-wave signal generation module output of the n-th -2 grades GOA units
2) when for high level, first film transistor T1 is opened, and the constant pressure high level that constant voltage high level source VDD is provided is through the first film crystalline substance
Body pipe T1 reaches the grid of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5, third thin film transistor (TFT) T3 and the 5th film
Transistor T5 is opened, at this time the second clock signal CKH output low levels of this grade, through third thin film transistor (TFT) T3 and the 5th film
Transistor T5 reaches the output terminal and the first reference point K (n) of the square-wave signal P (n) of this grade of GOA unit so that this grade of GOA unit
The square-wave signal P (n) of output and the first reference point K (n) is low level.
Within t2~t3 periods, the square-wave signal P (n-2) of the square-wave signal generation module output of the n-th -2 grades GOA units
Switch to low level, but at this time since the capacitive coupling of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5 grids acts on,
So that the grid of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5 still maintain high potential at this time, third film is brilliant at this time
Body pipe T3 and the 5th thin film transistor (TFT) T5 are still within conducting state, and the second clock signal CKH of this corresponding grade switchs to high electricity
It is flat, the output terminal of the square-wave signal P (n) of this grade of GOA unit is reached through third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5
With the first reference point K (n) so that the square-wave signal P (n) and the first reference point K (n) of this grade of GOA unit output switch to high level.
Within t3~t4 periods, as the square-wave signal P (n+ of the square-wave signal generation module output of the n-th+2 grades GOA units
2) when for high level, the second thin film transistor (TFT) T2 and the 4th thin film transistor (TFT) T4 are opened, the constant pressure that constant voltage low level source Vss is provided
Low level reaches the grid of third thin film transistor (TFT) T3, the 5th film through the second thin film transistor (TFT) T2 and the 4th thin film transistor (TFT) T4
The grid of transistor T5 and the first reference point K (n) so that so that the square-wave signal P (n) and first of this grade of GOA unit output
Reference point K (n) switchs to low level.
Within t4~t5 periods, the square-wave signal P (n-2) of the square-wave signal generation module output of the n-th -2 grades GOA units
Square-wave signal P (n+2) with the square-wave signal generation module output of the n-th+2 grades GOA units is low level, this grade of GOA unit is defeated
The square-wave signal P (n) and the first reference point K (n) gone out is low level.
Referring to Fig. 2, Fig. 4, Fig. 4 is the signal waveforms of the first preferred embodiment of the GOA circuits of the present invention；
The GOA circuits of this preferred embodiment are in use, when the scanning signal G (n-1) of upper level is high level, the 9th film
Transistor T9 is connected, and the constant pressure high level that constant voltage high level source provides is filled through the 9th thin film transistor (TFT) T9 to bootstrap capacitor Cbt
Electricity so that the second reference point Q (n) rises to a higher level.
The scanning signal G (n-1) of subsequent upper level switchs to low level, and the 9th thin film transistor (TFT) T9 is closed, the second reference point Q
(n) a higher level is maintained by bootstrap capacitor Cbt.Meanwhile the clock signal CK (n) of this grade switchs to high level, clock letter
Number CK (N) continues to charge to bootstrap capacitor Cbt by the tenth thin film transistor (TFT) T10 so that the second reference point Q (n) reaches one more
High level, the scanning signal G (n) of this grade switch to high level.
When the scanning signal G (n+1) of next stage switchs to high level, the 11st thin film transistor (TFT) T11 and the 12nd film
Transistor T12 is opened, and the constant pressure low level that constant voltage low level source Vss is generated reaches the second reference point Q (n), constant voltage low level source
The constant pressure low level that Vss is generated reaches the output terminal of the scanning signal G (n) of this grade, the voltage and sheet at the second reference point Q (n) places
The scanning signal G (n) of grade is pulled low.
The square-wave signal that this preferred embodiment is generated by square-wave signal generation module, to the second reference point Q (n) and this grade
The output terminal of scanning signal carry out 4 drop-downs, maintain the output terminal of the scanning signal G (n) of the second reference point Q (n) and this grade
Low potential.Specifically, when the first reference point K (n) is high level, the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8
It opens, the constant pressure low level that constant voltage low level source Vss is provided is reached through the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8
The output terminal of the scanning signal G (n) of the second reference point Q (n) and this grade, maintains the second reference point Q (n) and the scanning signal of this grade
The low potential of the output terminal of G (n).
It is specifically intended that when scanning signal G (n) output terminals of this grade are high level, the 6th thin film transistor (TFT) T6 is beaten
It opens, the constant pressure low level that constant voltage low level source Vss is provided reaches the first reference point K (n) through the 6th thin film transistor (TFT) T6 so that the
One reference point K (n) is at this time low level, and the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8 are closed at this time.
By setting square-wave signal generation module, the square-wave signal frequency of generation is situated between the GOA circuits of this preferred embodiment
Between low frequency and high frequency, the grid of thin film transistor (TFT) can be effectively prevent by frequency is excessively high or the shadow of underfrequency signal
It rings, into without causing circuit operation irregularity.
Referring to Fig. 5, the structure diagram of the second preferred embodiment of the GOA circuits for the present invention；
Difference lies in access GOA circuits for the GOA circuits of this preferred embodiment and the GOA circuits of first preferred embodiment
Second clock signal quantity for 8, can further reduce power consumption, and circuit operation irregularity will not be caused.
The GOA circuits of this preferred embodiment include pull-up control module 301, pull-up module 302, pull-down module 303, bootstrapping
Capacitance Cbt and square-wave signal generation module 304.Control module 301 is pulled up, for the scanning signal G (n- according to upper level
1) control generates the scanning level signal of this grade；Pull-up module 302, for according to the scanning level signal of this grade and this grade
Clock signal CK (n) draw high the scanning signal G (n) of this grade；Pull-down module 303, for the scanning signal G (n according to next stage
+ 1) the scanning level signal of this grade, is dragged down；Square-wave signal generation module 304 maintains this grade for generating square-wave signal P (n)
Scan the low level of level signal and the scanning signal of this grade；Bootstrap capacitor Cbt is arranged on the output terminal of pull-up control module 301
And between the output terminal of the scanning signal G (n) of this grade, for generating the high level of the scanning signal G (n) of this grade；
Wherein, pull-up control module 301 respectively with pull-up module 302, pull-down module 303 and square-wave signal generation module
304 connections.
The GOA circuits of the embodiment of the present invention access 8 second clock signal source CKH, and second clock signal source is electrically connected
In square-wave signal generation module 304, second clock signal to the square-wave signal generation module for providing this grade generates this grade
Square-wave signal P (n).
It should be noted that the square-wave signal generation module 304 of 8k+1 grades of GOA units of GOA circuits is electrically connected at
The square-wave signal generation module 304 of 8k+2 grades of GOA units of first second clock signal source CKH, GOA circuit is electrically connected
In second second clock signal source, the square-wave signal generation module 304 of 8k+3 grades of GOA units of GOA circuits is electrically connected
In third second clock signal source, the square-wave signal generation module 304 of 8k+4 grades of GOA units of GOA circuits is electrically connected
In the 4th second clock signal source, the square-wave signal generation module 304 of 8k+5 grades of GOA units of GOA circuits is electrically connected
Electrically connect in the square-wave signal generation module 304 of 8k+6 grades of GOA units of the 5th second clock signal source CKH, GOA circuit
The square-wave signal generation module 304 for being connected to 8k+7 grades of GOA units of the 6th second clock signal source CKH, GOA circuit is electrical
It is connected to 304 electricity of square-wave signal generation module of 8k+8 grades of GOA units of the 7th second clock signal source CKH, GOA circuit
Property be connected to the 8th second clock signal source CKH wherein, k is integer not less than 0.
The pulsion phase of second clock signal that 8 second clock signal sources provide is same and adjacent second clock signal source carries
The time difference of the second clock signal of confession is identical..
The frequency of second clock signal that 8 second clock signal sources provide is the frequency of the clock signal CK (n) of this grade
2~50 times.The frequency of second clock signal that this preferred embodiment can provide by adjusting second clock signal source so that
The GOA circuits of the embodiment of the present invention are more stablized.Preferably, 8 second clock signal sources of the GOA circuits of the embodiment of the present invention
The frequency of the second clock signal of offer is 2 times of the frequency of this grade of clock signal CK (n).
Square-wave signal generation module 304 includes first film transistor T1, the second thin film transistor (TFT) T2, third film crystal
Pipe T3, the 4th thin film transistor (TFT) T4, the 5th thin film transistor (TFT) T6, the 6th thin film transistor (TFT) T6, the 7th thin film transistor (TFT) T7 and
Eight thin film transistor (TFT) T8；
The grid of first film transistor T7 is electrically connected at square-wave signal P (n-4) the generation moulds of the n-th -4 grades GOA units
The output terminal of block；The source electrode of first film transistor T1 is electrically connected at constant voltage high level source VDD；First film transistor T1's
Drain electrode is electrically connected at the grid of third thin film transistor (TFT) T3, the grid of the 5th thin film transistor (TFT) T5 and the second thin film transistor (TFT) T2
Drain electrode；
The grid of second thin film transistor (TFT) T2 is electrically connected at square-wave signal P (n+4) the generation moulds of the n-th+4 grades GOA units
The output terminal of block, the source electrode of the second thin film transistor (TFT) T2 are electrically connected at constant voltage low level source Vss；
The source electrode of third thin film transistor (TFT) T3 is electrically connected at the second clock signal source CKH of this grade；Third film crystal
The drain electrode of pipe T3 is electrically connected at the output terminal of square-wave signal generation module P (n)；
The grid of 4th thin film transistor (TFT) T4 is electrically connected at square-wave signal P (n+4) the generation moulds of the n-th+4 grades GOA units
The output terminal of block；The source electrode of 4th thin film transistor (TFT) T4 is electrically connected at constant voltage low level source Vss；4th thin film transistor (TFT) T4's
Drain electrode is electrically connected at the drain electrode, the drain electrode of the 6th thin film transistor (TFT) T6, the 7th thin film transistor (TFT) T7 of the 5th thin film transistor (TFT) T5
Grid and the 8th thin film transistor (TFT) T8 grid；
The source electrode of 5th thin film transistor (TFT) T5 is electrically connected at the second clock signal source CKH of this grade；
The grid of 6th thin film transistor (TFT) T6 is electrically connected at the output terminal of the scanning signal G (n) of this grade；6th film is brilliant
The source electrode of body pipe T6 is electrically connected at constant voltage low level source Vss；
The source electrode of 7th thin film transistor (TFT) T7 is electrically connected at constant voltage low level source Vss；The leakage of 7th thin film transistor (TFT) T7
Pole is electrically connected at the output terminal of pull-up control module 301；
The source electrode of 8th thin film transistor (TFT) T8 is electrically connected at constant voltage low level source Vss；The leakage of 8th thin film transistor (TFT) T8
Pole is electrically connected at the output terminal of the scanning signal G (n) of this grade.
It pulls up control module 301 and includes the 9th thin film transistor (TFT) T9, the grid of the 9th thin film transistor (TFT) T9 is electrically connected at
The output terminal of the scanning signal G (n-1) of upper level；The source electrode of 9th thin film transistor (TFT) T9 is electrically connected at the high power vd D of constant pressure；
The drain electrode of 9th thin film transistor (TFT) T9 is electrically connected at the output terminal of pull-up control module 301.
Pull-up module 302 includes the tenth thin film transistor (TFT) T10, and the grid of the tenth thin film transistor (TFT) T10 is electrically connected at
Draw the output terminal of control module 301；The source electrode of tenth thin film transistor (TFT) T10 accesses the clock signal CK (n) of this grade；Tenth film
The drain electrode of transistor T10 is electrically connected at the output terminal of the scanning signal G (n) of this grade.
Pull-down module 303 includes the 11st thin film transistor (TFT) T11 and the 12nd thin film transistor (TFT) T12；
The grid of 11st thin film transistor (TFT) T11 is electrically connected at the output terminal of the scanning signal G (n+1) of next stage；The
The source electrode of 11 thin film transistor (TFT) T11 is electrically connected at the low power supply Vss of constant pressure；The drain electrode of 11st thin film transistor (TFT) T11 is electrical
Connection and the output terminal of pull-up control module 301；
The grid of 12nd thin film transistor (TFT) T12 is electrically connected at the output terminal of the scanning signal G (n+1) of next stage；The
The source electrode of 12 thin film transistor (TFT) T12 is electrically connected at the low power supply Vss of constant pressure；The drain electrode of 12nd thin film transistor (TFT) T12 is electrical
It is connected to the output terminal of the scanning signal G (n) of this grade.
One end of bootstrap capacitor Cbt is electrically connected at the output terminal of pull-up control module 301；Bootstrap capacitor Cbt's is another
End is electrically connected at the output terminal of the scanning signal G (n) of this grade.
Referring to Fig. 5, Fig. 6, Fig. 6 is that the square-wave signal of the second preferred embodiment of the GOA circuits of the present invention generates oscillogram；
Within t1~t2 periods, as the square-wave signal P (n- of the square-wave signal generation module output of the n-th -4 grades GOA units
4) when for high level, first film transistor T1 is opened, and the constant pressure high level that constant voltage high level source VDD is provided is through the first film crystalline substance
Body pipe T1 reaches the grid of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5, third thin film transistor (TFT) T3 and the 5th film
Transistor T5 is opened, and second clock signal CKH exports low level at this time, through third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT)
T5 reaches the output terminal and the first reference point K (n) of the square-wave signal P (n) of the GOA unit of this grade so that this grade of GOA unit output
Square-wave signal P (n) and the first reference point K (n) be low level.
Within t2~t3 periods, the square-wave signal P (n-4) of the square-wave signal generation module output of the n-th -4 grades GOA units
Switch to low level, but at this time since the capacitive coupling of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5 grids acts on,
So that the grid of third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5 still maintain high potential at this time, third film is brilliant at this time
Body pipe T3 and the 5th thin film transistor (TFT) T5 are still within conducting state, and the second clock signal CKH of this corresponding grade switchs to high electricity
It is flat, the output terminal of the square-wave signal P (n) of this grade of GOA unit is reached through third thin film transistor (TFT) T3 and the 5th thin film transistor (TFT) T5
With the first reference point K (n) so that the square-wave signal P (n) and the first reference point K (n) of this GOA unit output switch to high level.
Within t3~t4 periods, as the square-wave signal P (n+ of the square-wave signal generation module output of the n-th+4 grades GOA units
4) when for high level, the second thin film transistor (TFT) T2 and the 4th thin film transistor (TFT) T4 are opened, the constant pressure that constant voltage low level source Vss is provided
Low level reaches the grid of third thin film transistor (TFT) T3, the 5th film through the second thin film transistor (TFT) T2 and the 4th thin film transistor (TFT) T4
The grid of transistor T5 and the first reference point K (n) so that the references of square-wave signal P (n) and first of this grade of GOA unit output
Point K (n) switchs to low level.
Within t4~t5 periods, the square-wave signal P (n-4) of the square-wave signal generation module output of the n-th -4 grades GOA units
Square-wave signal P (n+4) with the square-wave signal generation module output of the n-th+4 grades GOA units is low level, this grade of GOA unit is defeated
The square-wave signal P (n) and the first reference point K (n) gone out is low level.
Referring to Fig. 5, Fig. 7, Fig. 7 is the signal waveforms of the second preferred embodiment of the GOA circuits of the present invention；
The GOA circuits of this preferred embodiment are in use, when the scanning signal G (n-1) of upper level is high level, the 9th film
Transistor T9 is connected, and the constant pressure high level that constant voltage high level source provides is filled through the 9th thin film transistor (TFT) T9 to bootstrap capacitor Cbt
Electricity so that the second reference point Q (n) rises to a higher level.
The scanning signal G (n-1) of subsequent upper level switchs to low level, and the 9th thin film transistor (TFT) T9 is closed, the second reference point Q
(n) a higher level is maintained by bootstrap capacitor Cbt.Meanwhile the clock signal CK (n) of this grade switchs to high level, clock letter
Number CK (N) continues to charge to bootstrap capacitor Cbt by the tenth thin film transistor (TFT) T10 so that the second reference point Q (n) reaches one more
High level, the scanning signal G (n) of this grade switch to high level.
When the scanning signal G (n+1) of next stage switchs to high level, the 11st thin film transistor (TFT) T11 and the 12nd film
Transistor T12 is opened, and the constant pressure low level that constant voltage low level source Vss is generated reaches the second reference point Q (n), constant voltage low level source
The constant pressure low level that Vss is generated reaches the output terminal of the scanning signal G (n) of this grade, the voltage and sheet at the second reference point Q (n) places
The scanning signal G (n) of grade is pulled low.
The square-wave signal that this preferred embodiment is generated by square-wave signal generation module, to the second reference point Q (n) and this grade
The output terminal of scanning signal carry out 2 drop-downs, maintain the output terminal of the scanning signal G (n) of the second reference point Q (n) and this grade
Low potential.Specifically, when the first reference point K (n) is high level, the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8
It opens, the constant pressure low level that constant voltage low level source Vss is provided is reached through the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8
The output terminal of the scanning signal G (n) of the second reference point Q (n) and this grade, maintains the second reference point Q (n) and the scanning signal of this grade
The low potential of the output terminal of G (n).
It is specifically intended that when scanning signal G (n) output terminals of this grade are high level, the 6th thin film transistor (TFT) T6 is beaten
It opens, the constant pressure low level that constant voltage low level source Vss is provided reaches the first reference point K (n) through the 6th thin film transistor (TFT) T6 so that the
One reference point K (n) is at this time low level, and the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8 are closed at this time.
By setting square-wave signal generation module, the square-wave signal frequency of generation is situated between the GOA circuits of this preferred embodiment
Between low frequency and high frequency, the grid of thin film transistor (TFT) can be effectively prevent by frequency is excessively high or the shadow of underfrequency signal
It rings, into without causing circuit operation irregularity.
To sum up, although the present invention is disclosed above with preferred embodiment, above preferred embodiment is not to limit this
Invention, those of ordinary skill in the art, without departing from the spirit and scope of the present invention, can make it is various change and retouch,
Therefore protection scope of the present invention is subject to the range that claim defines.
Claims (9)
1. a kind of GOA circuits, which is characterized in that including cascade n grades of GOA unit, include per level-one GOA unit：
Control module is pulled up, the scanning level signal of this grade is generated for the control of the scanning signal according to upper level；
Pull-up module, the scanning that this grade is drawn high for the scanning level signal according to described grade and the clock signal of this grade are believed
Number；
Pull-down module for the scanning signal according to next stage, drags down the scanning level signal of described grade；
Bootstrap capacitor, for generating the high level of the scanning signal of described grade；And
Square-wave signal generation module maintains the scanning level signal of described grade and sweeping for described grade for generating square-wave signal
Retouch the low level of signal；Wherein,
The pull-up control module connects respectively with the pull-up module, the pull-down module and the square-wave signal generation module
It connects；
The GOA circuits further include 2m second clock signal source, are electrically connected at the square-wave signal generation module, are used for
The second clock signal for providing this grade generates the square-wave signal of this grade to the square-wave signal generation module, wherein, m is just whole
Number.
2. GOA circuits according to claim 1, which is characterized in that the square-wave signal life of 2mk+a grades of GOA units
A-th of second clock signal source is electrically connected at into module, wherein, a is the integer less than or equal to 2m, and k is more than or equal to 0
Positive integer.
3. GOA circuits according to claim 1, which is characterized in that the second of the 2m second clock signal source offer
The pulsion phase of clock signal with and adjacent second clock signal source provide second clock signal time difference it is identical.
4. GOA circuits according to claim 1, which is characterized in that the second of the 2m second clock signal source offer
The frequency of clock signal is 2~50 times of the frequency of the clock signal of described grade.
5. GOA circuits according to claim 1, which is characterized in that the square-wave signal generation module includes the first film
Transistor, the second thin film transistor (TFT), third thin film transistor (TFT), the 4th thin film transistor (TFT), the 5th thin film transistor (TFT), the 6th film are brilliant
Body pipe, the 7th thin film transistor (TFT) and the 8th thin film transistor (TFT)；
The grid of the first film transistor is electrically connected at the output of the square-wave signal generation module of the n-th-m grades of GOA unit
End；The source electrode of the first film transistor is electrically connected at constant voltage high level source；The drain electrode electricity of the first film transistor
Property is connected to the grid of the third thin film transistor (TFT), the grid of the 5th thin film transistor (TFT) and second thin film transistor (TFT)
Drain electrode；
The grid of second thin film transistor (TFT) is electrically connected at the square-wave signal generation module of the n-th+m grades of GOA unit circuit
Output terminal, the source electrode of second thin film transistor (TFT) are electrically connected at constant voltage low level source；
The source electrode of the third thin film transistor (TFT) is electrically connected at the second clock signal source of this grade；The third thin film transistor (TFT)
Drain electrode be electrically connected at the output terminal of the square-wave signal generation module；
The grid of 4th thin film transistor (TFT) is electrically connected at the square-wave signal generation mould of the n-th+m grades of GOA unit circuits
The output terminal of block；The source electrode of 4th thin film transistor (TFT) is electrically connected at the constant voltage low level source；4th film is brilliant
The drain electrode of body pipe is electrically connected at the draining of the 5th thin film transistor (TFT), the draining of the 6th thin film transistor (TFT), described
The grid of the grid of seven thin film transistor (TFT)s and the 8th thin film transistor (TFT)；
The source electrode of 5th thin film transistor (TFT) is electrically connected at the second clock signal source of described grade；
The grid of 6th thin film transistor (TFT) is electrically connected at the output terminal of the scanning-line signal of described grade；Described 6th is thin
The source electrode of film transistor is electrically connected at the constant voltage low level source；
The source electrode of 7th thin film transistor (TFT) is electrically connected at the constant voltage low level source；The leakage of 7th thin film transistor (TFT)
Pole is electrically connected at the output terminal of the pull-up control module；
The source electrode of 8th thin film transistor (TFT) is electrically connected at the constant voltage low level source；The leakage of 8th thin film transistor (TFT)
Pole is electrically connected at the output terminal of the scanning signal of described grade.
6. GOA circuits according to claim 1, the pull-up control module includes the 9th thin film transistor (TFT), the described 9th
The grid of thin film transistor (TFT) is electrically connected at the output terminal of the scanning signal of upper level；The source electrode electricity of 9th thin film transistor (TFT)
Property is connected to the high power supply of constant pressure；The drain electrode of 9th thin film transistor (TFT) is electrically connected at the output of the pull-up control module
End.
7. GOA circuits according to claim 1, which is characterized in that the pull-up module includes the tenth thin film transistor (TFT), institute
The grid for stating the tenth thin film transistor (TFT) is electrically connected at the output terminal of the pull-up control module；Tenth thin film transistor (TFT)
Source electrode accesses the clock signal of described grade；The drain electrode of tenth thin film transistor (TFT) is electrically connected at the scanning letter of described grade
Number output terminal.
8. GOA circuits according to claim 1, which is characterized in that the pull-down module includes the 11st thin film transistor (TFT)
With the 12nd thin film transistor (TFT)；
The grid of 11st thin film transistor (TFT) is electrically connected at the output terminal of the scanning signal of the next stage；Described tenth
The source electrode of one thin film transistor (TFT) is electrically connected at the low power supply of constant pressure；The drain electrode of 11st thin film transistor (TFT) is electrically connected and institute
State the output terminal of pull-up control module；
The grid of 12nd thin film transistor (TFT) is electrically connected at the output terminal of the scanning signal of the next stage；Described tenth
The source electrode of two thin film transistor (TFT)s is electrically connected at the low power supply of constant pressure；The drain electrode of 12nd thin film transistor (TFT) is electrically connected at institute
State the output terminal of the scanning signal of this grade.
9. GOA circuits according to claim 1, which is characterized in that one end of the bootstrap capacitor is electrically connected at described
Pull up the output terminal of control module；The other end of the bootstrap capacitor is electrically connected at the output of the scanning signal of described grade
End.
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| CN107705761B (en) * | 2017-09-27 | 2019-07-23 | 深圳市华星光电技术有限公司 | A kind of GOA circuit and liquid crystal display |
| CN109637483A (en) * | 2019-01-22 | 2019-04-16 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit and liquid crystal display device |
| CN110164391A (en) * | 2019-04-25 | 2019-08-23 | 昆山龙腾光电有限公司 | Horizontal drive circuit, display device and row driving method |
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| CN103578433B (en) * | 2012-07-24 | 2015-10-07 | 北京京东方光电科技有限公司 | A kind of gate driver circuit, method and liquid crystal display |
| CN203870117U (en) * | 2014-02-25 | 2014-10-08 | 重庆博策科技有限公司 | Engine speed signal conversion module |
| CN103996370B (en) * | 2014-05-30 | 2017-01-25 | 京东方科技集团股份有限公司 | Shifting register unit, grid drive circuit, display device and drive method |
| CN104299591B (en) * | 2014-10-31 | 2017-01-18 | 深圳市华星光电技术有限公司 | Array substrate line driving circuit and liquid crystal display device |
| CN104732945B (en) * | 2015-04-09 | 2017-06-30 | 京东方科技集团股份有限公司 | Shift register and driving method, array substrate gate drive device, display panel |
| CN105448264B (en) * | 2016-01-04 | 2018-09-18 | 京东方科技集团股份有限公司 | The driving method of GOA circuits, device, sequence controller, display equipment |
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