CN105930554A - Allegro based fly line automatic layering method - Google Patents

Allegro based fly line automatic layering method Download PDF

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Publication number
CN105930554A
CN105930554A CN201610222975.8A CN201610222975A CN105930554A CN 105930554 A CN105930554 A CN 105930554A CN 201610222975 A CN201610222975 A CN 201610222975A CN 105930554 A CN105930554 A CN 105930554A
Authority
CN
China
Prior art keywords
allegro
fly line
line
automatic zoning
line automatic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610222975.8A
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Chinese (zh)
Inventor
卞名
卞一名
翟西斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Group Co Ltd
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Inspur Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Group Co Ltd filed Critical Inspur Group Co Ltd
Priority to CN201610222975.8A priority Critical patent/CN105930554A/en
Publication of CN105930554A publication Critical patent/CN105930554A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention discloses an Allegro based fly line automatic layering method, and belongs to the technical field of computer application. An editing operation is performed on a database by using an expanding Skill interface provided by Allegro software; layering is preformed according to differences of circuit board signal lines and the importance thereof; wire layout is performed according to the demands of actual circuit boards, and line crossing and line stacking can be avoided; line connection is performed with the layering manner as a reference, and then functions which are not provided by the program can be achieved, the efficiency of Layout work can be improved, and the line stacking due to too many fly lines can be effectively solved; a plan of an engineer is facilitated before line layout; and the time is saved, the working efficiency can be improved, and unnecessary repeated works can be reduced.

Description

A kind of method of fly line AUTOMATIC ZONING based on Allegro
Technical field
The present invention discloses a kind of method of fly line AUTOMATIC ZONING based on Allegro, belongs to Computer Applied Technology field.
Background technology
Development along with electronic technology, signal integrity is required more and more higher by people, from DDR2 to DDR3, DDR4 the most by now, from PCI to PCIE, the function of signal is constantly strengthened, and the thing followed is exactly the complication of circuit board, and various complicated holding wire correctly connects the workload increasing many engineers than ever.Holding wire is carried out layering and can suitably simplify the complexity of holding wire, but current Candence software can only show fly line, but they can not be layered, and manual zoning tends to make mistakes, and waste a lot of time.Allegro is PCB designing wiring instrument. Allegro provides good and mutual working interface, and Cadence combines, it is provided that complicated PCB designing wiring scheme.Constraint Manger in software provides short and sweet interface and facilitates user set and check that Constraint declares.In Allegro working environment, automatically when putting part and wiring according to rule treatments and inspection, Allegro also has and automatically pushes push and patch line hug cabling and perfect automatically repair line function, it is provided that multi-user processes one piece of complicated plank simultaneously.
The present invention provides a kind of method of fly line AUTOMATIC ZONING based on Allegro, utilize the extension Skill interface that Allegro software provides, this data base is carried out edit operation, difference and significance level thereof according to circuit board signal line are layered, requirement in conjunction with side circuit plate carries out routing traces, avoid crossing elimination, there is suppressing the situation of line, with this layered mode for reference to carrying out line, thus realize the function that some programs do not provide, improve the efficiency of Layout work, effectively solve to cause the problem suppressing line too much because of fly line, facilitate the planning before engineer's cabling, time-consuming, improve work efficiency, reduce unnecessary repeated work.
Summary of the invention
The present invention is directed to problem of the prior art, a kind of method providing fly line AUTOMATIC ZONING based on Allegro, utilizes the extension Skill interface that Allegro software provides, this data base is carried out edit operation, thus realize the function that some programs do not provide, improve the efficiency of Layout work.
The concrete scheme that the present invention proposes is:
A kind of method of fly line AUTOMATIC ZONING based on Allegro, PCB wiring is carried out by Allegro software, utilize the skill program of Allegro software interface and form fly line AUTOMATIC ZONING according to this skill program: in the menu bar of Allegro software, configuring the preset path of allegro.men file, the corresponding order project forming fly line AUTOMATIC ZONING is added in toolbar item, allegro.ilinit file under skill file path adds the command code for forming fly line AUTOMATIC ZONING, formation fly line AUTOMATIC ZONING file is put under skill file path, to complete to perform to be formed in menu bar the order of fly line AUTOMATIC ZONING.
According to the order project of formation fly line AUTOMATIC ZONING, schematic diagram and structure chart are led in Allegro, aspect is set, fly line is layered.
Before aspect is set, with schematic diagram for according to each holding wire in circuit board is detected, it is judged that holding wire classification, checks whether fly line has intersection, fly line is layered.
With schematic diagram for according to each holding wire in circuit board is detected, judge whether holding wire is high-speed line, if then continuing to judge whether it is data wire, otherwise carry out top layer line, if determining whether, it is data wire, is arranged on same layer, otherwise can not continue to judge whether the fly line of same layer data line intersects at same layer, if then changing layer, otherwise connect according to fly line.
Usefulness of the present invention is:
The present invention provides a kind of method of fly line AUTOMATIC ZONING based on Allegro, PCB wiring is carried out by Allegro software, utilize the skill program of Allegro software interface and form fly line AUTOMATIC ZONING according to this skill program: in the menu bar of Allegro software, configuring the preset path of allegro.men file, the corresponding order project forming fly line AUTOMATIC ZONING is added in toolbar item, allegro.ilinit file under skill file path adds the command code for forming fly line AUTOMATIC ZONING, formation fly line AUTOMATIC ZONING file is put under skill file path, to complete to perform to be formed in menu bar the order of fly line AUTOMATIC ZONING;
Utilize the inventive method, utilize the extension Skill interface that Allegro software provides, this data base is carried out edit operation, difference and significance level thereof according to circuit board signal line are layered, requirement in conjunction with side circuit plate carries out routing traces, avoid crossing elimination, there is suppressing the situation of line, with this layered mode for reference to carrying out line, thus realize the function that some programs do not provide, improve the efficiency of Layout work, effectively solve to cause the problem suppressing line too much because of fly line, facilitate the planning before engineer's cabling, time-consuming, improve work efficiency, reduce unnecessary repeated work.
Accompanying drawing explanation
Fig. 1 the inventive method judges holding wire classification schematic flow sheet.
Detailed description of the invention
A kind of method of fly line AUTOMATIC ZONING based on Allegro, PCB wiring is carried out by Allegro software, utilize the skill program of Allegro software interface and form fly line AUTOMATIC ZONING according to this skill program: in the menu bar of Allegro software, configuring the preset path of allegro.men file, the corresponding order project forming fly line AUTOMATIC ZONING is added in toolbar item, allegro.ilinit file under skill file path adds the command code for forming fly line AUTOMATIC ZONING, formation fly line AUTOMATIC ZONING file is put under skill file path, to complete to perform to be formed in menu bar the order of fly line AUTOMATIC ZONING.
According to said method and summary of the invention, in conjunction with accompanying drawing, the present invention will be further described.
The present invention provides a kind of method of fly line AUTOMATIC ZONING based on Allegro, by the Skill routine interface of Allegro software, it is possible to achieve some extended operations outside software basic function, and the similar third-party application exploitation with Allegro software as platform.
PCB wiring is carried out by Allegro software, utilize the skill program of Allegro software interface and form fly line AUTOMATIC ZONING according to this skill program, according to the order project of formation fly line AUTOMATIC ZONING, schematic diagram and structure chart being led in Allegro, aspect is set, fly line is layered;
Before aspect is set, with schematic diagram for according to each holding wire in circuit board is detected, judge holding wire classification: judge whether holding wire is high-speed line, if then continuing to judge whether it is data wire, otherwise carrying out top layer line, if determining whether, it is data wire, is arranged on same layer, otherwise can not be at same layer, continuing to judge whether the fly line of same layer data line intersects, if then changing layer, otherwise connecting according to fly line.
In being wherein embodied as, but it is not limited in the present invention the main skill program provided:
Create a ALLEGRO Command and registers it. The rest of
; this SKILL code is a funtion which gets executed when
; the command 'runscript' is invoked.
; Requires the environment variable local_scriptpath to
; be set to the path where the scripts are stored.
axlCmdRegister("runscript" 'pmCreateScriptForm);
**********************************************************/
putd('pmCreateScriptForm nil)
(defun pmCreateScriptForm ()
let( (ScriptForm)
**************************************************************/
putd('pmCreateformDefinitionFile nil)
(defun pmCreateformDefinitionFile ()
let( (formDefinitionFile)
;-------------------------------------------------------
; Create a temporary form definition file for the replay
; script files selection.
; NOTE we write to CWD else we might write the file
; to another directory in our Skill Path by mistake !!
;-------------------------------------------------------
formDefinitionFile = outfile("./replay.form" "w")
;-------------------------------------------------------
; Create form fields and write to form definition file
; only if file is writable.
;-------------------------------------------------------
when( formDefinitionFile
fprintf(formDefinitionFile "FILE_TYPE=FORM_DEFN VERSION=2\n")
fprintf(formDefinitionFile "FORM\n"
fprintf(formDefinitionFile "HEADER \"Replay Script-Files V 1.0\"\n")
fprintf(formDefinitionFile "TILE\n")
fprintf(formDefinitionFile "TEXT \"Script (.scr)\"\n")
fprintf(formDefinitionFile "TLOC 2 1\n")
fprintf(formDefinitionFile "ENDTEXT\n")
fprintf(formDefinitionFile "FLOC 2 3\n")
fprintf(formDefinitionFile "LIST \"\" 40 5\n")
fprintf(formDefinitionFile "ENDFIELD\n")
fprintf(formDefinitionFile "FIELD close\n")
fprintf(formDefinitionFile "FLOC 2 13\n")
fprintf(formDefinitionFile "MENUBUTTON \"Close\" 10 3\n")
fprintf(formDefinitionFile "ENDFIELD\n")
fprintf(formDefinitionFile "ENDFORM\n")
close(formDefinitionFile)
); when
); let
); defun pmCreateformDefinitionFile
********************************* Main Program ***********/
;-----------------------------------------------------
; Make sure the CWD is set in the Skill Search Path to
; enable the Form to work correctly. If not set, add it
; to the path
;------------------------------------------------------
if( car(getSkillPath()) != "./" && car(getSkillPath()) != "." then
axlUIWPrint(nil "** ERROR - Skill Path does not include the current working directory %s.%s **"
"(" ")")
axlUIWPrint(nil "** Setting Skill Path to include %s.%s - Please Correct! **" "(" ")")
setSkillPath(cons("." getSkillPath()))
); endif
;-----------------------------------------------------
; Check if old form definition file is present. If found
; then remove it.
;------------------------------------------------------
if(isFile(strcat(car(getSkillPath()) "/replay.form")) then
deleteFile(strcat(car(getSkillPath()) "/replay.form"))
);endif
;------------------------------------------------------
; Create the ALLEGRO form definition file
;------------------------------------------------------
unless( pmCreateformDefinitionFile()
error("Could not create form definition file")
); unless
;------------------------------------------------------
; Display the Replay Script form
;------------------------------------------------------
ScriptForm = axlFormCreate( (gensym) "replay.form" nil 'pmCreateFormCallback t)
axlFormDisplay(ScriptForm)
;------------------------------------------------------
; Traverse searchpath and find all script files
;-----------------------------------------------------
axlUIWPrint(nil "** Gathering scripts from %L, please wait. **" pmGetScriptPath() )
pmAddScriptsToForm(pmGetListOfScriptFiles(pmGetScriptPath() ".scr"))
axlUIWPrint(nil " - Done - " )
;-------------------------------------------------------
; Clean up temp files - remove the reply.form file
;-------------------------------------------------------
if(isFile(strcat(car(getSkillPath()) "/replay.form")) then
deleteFile(strcat(car(getSkillPath()) "/replay.form"))
);endif
); let
); pmCreateScriptForm
The present invention utilizes the extension Skill interface that Allegro software provides, this data base is carried out edit operation, difference and significance level thereof according to circuit board signal line are layered, requirement in conjunction with side circuit plate carries out routing traces, avoid crossing elimination, occur suppressing the situation of line, with this layered mode for reference to carrying out line, thus realize the function that some programs do not provide, improve the efficiency of Layout work.

Claims (4)

1. the method for a fly line AUTOMATIC ZONING based on Allegro, PCB wiring is carried out by Allegro software, it is characterized in that utilizing the skill program of Allegro software interface and forming fly line AUTOMATIC ZONING according to this skill program: in the menu bar of Allegro software, configure the preset path of allegro.men file, the corresponding order project forming fly line AUTOMATIC ZONING is added in toolbar item, allegro.ilinit file under skill file path adds the command code for forming fly line AUTOMATIC ZONING, formation fly line AUTOMATIC ZONING file is put under skill file path, to complete to perform to be formed in menu bar the order of fly line AUTOMATIC ZONING.
Method the most according to claim 1, is characterized in that, according to the order project forming fly line AUTOMATIC ZONING, schematic diagram and structure chart being led in Allegro, arranging aspect, is layered fly line.
Method the most according to claim 2, before it is characterized in that arranging aspect, with schematic diagram for according to detecting each holding wire in circuit board, it is judged that holding wire classification, checks whether fly line has intersection, is layered fly line.
Method the most according to claim 3, it is characterized in that with schematic diagram for according to each holding wire in circuit board is detected, judge whether holding wire is high-speed line, if then continuing to judge whether it is data wire, otherwise carrying out top layer line, if determining whether, it is data wire, is arranged on same layer, otherwise can not be at same layer, continuing to judge whether the fly line of same layer data line intersects, if then changing layer, otherwise connecting according to fly line.
CN201610222975.8A 2016-04-12 2016-04-12 Allegro based fly line automatic layering method Pending CN105930554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610222975.8A CN105930554A (en) 2016-04-12 2016-04-12 Allegro based fly line automatic layering method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610222975.8A CN105930554A (en) 2016-04-12 2016-04-12 Allegro based fly line automatic layering method

Publications (1)

Publication Number Publication Date
CN105930554A true CN105930554A (en) 2016-09-07

Family

ID=56837968

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Application Number Title Priority Date Filing Date
CN201610222975.8A Pending CN105930554A (en) 2016-04-12 2016-04-12 Allegro based fly line automatic layering method

Country Status (1)

Country Link
CN (1) CN105930554A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108229008A (en) * 2017-12-29 2018-06-29 深圳市兴森快捷电路科技股份有限公司 A kind of cabling based on Allegro softwares changes layer and line width adjustment method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1798472A (en) * 2004-12-24 2006-07-05 鸿富锦精密工业(深圳)有限公司 Pin connection structure, and method for modifying definition of pin position
CN101373489A (en) * 2007-08-23 2009-02-25 英业达股份有限公司 System for switching laying bedding plane of signal line
WO2014000688A1 (en) * 2012-06-29 2014-01-03 北京豹驰智能科技有限公司 Multilayer wiring type double-interface ic card antenna module
CN103793575A (en) * 2014-02-19 2014-05-14 浪潮(北京)电子信息产业有限公司 Method and device for arranging passing holes in single plate
CN104462712A (en) * 2014-12-19 2015-03-25 上海斐讯数据通信技术有限公司 Method and system capable of controlling deleted segments in PCB layout process
CN105447240A (en) * 2015-11-17 2016-03-30 浪潮集团有限公司 Implementation method for automatically establishing PCB design layer and back sheet

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1798472A (en) * 2004-12-24 2006-07-05 鸿富锦精密工业(深圳)有限公司 Pin connection structure, and method for modifying definition of pin position
CN101373489A (en) * 2007-08-23 2009-02-25 英业达股份有限公司 System for switching laying bedding plane of signal line
WO2014000688A1 (en) * 2012-06-29 2014-01-03 北京豹驰智能科技有限公司 Multilayer wiring type double-interface ic card antenna module
CN103793575A (en) * 2014-02-19 2014-05-14 浪潮(北京)电子信息产业有限公司 Method and device for arranging passing holes in single plate
CN104462712A (en) * 2014-12-19 2015-03-25 上海斐讯数据通信技术有限公司 Method and system capable of controlling deleted segments in PCB layout process
CN105447240A (en) * 2015-11-17 2016-03-30 浪潮集团有限公司 Implementation method for automatically establishing PCB design layer and back sheet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108229008A (en) * 2017-12-29 2018-06-29 深圳市兴森快捷电路科技股份有限公司 A kind of cabling based on Allegro softwares changes layer and line width adjustment method

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Application publication date: 20160907