TWI459874B - A method for circuit layout and a device using the same - Google Patents

A method for circuit layout and a device using the same Download PDF

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TWI459874B
TWI459874B TW101144173A TW101144173A TWI459874B TW I459874 B TWI459874 B TW I459874B TW 101144173 A TW101144173 A TW 101144173A TW 101144173 A TW101144173 A TW 101144173A TW I459874 B TWI459874 B TW I459874B
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circuit
circuit layout
positioning component
module
component
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TW101144173A
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TW201422078A (en
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shuang-lin Cao
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Inventec Corp
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電路佈局方法與裝置Circuit layout method and device

本發明是有關於一種電路佈局方法,特別是有關於一種藉由定位元件來對電路佈局中高速信號線的交叉點位置進行定位的電路佈局方法與裝置。SUMMARY OF THE INVENTION The present invention relates to a circuit layout method, and more particularly to a circuit layout method and apparatus for locating intersection locations of high speed signal lines in a circuit layout by positioning components.

電路圖(circuit diagram)對於印刷電路板(printed circuit board)的電路佈局(layout)來說是重要的參考依據。但是,電路圖通常僅提供簡單的元件/線路資訊與各元件/線路之間的連接關係,而電路佈局中實際的線路繞法或線路的交叉點位置則無法由電路圖中獲得。因此,一般來說,在利用電路佈局軟體來根據電路圖產生電路佈局之後,電路佈局人員需要設定額外的規則或手動地對電路佈局中線路的繞法或線路的交叉點位置進行調整,才能使其符合預設的電路特性。Circuit diagrams are an important reference for the circuit layout of printed circuit boards. However, the circuit diagram usually only provides a simple connection between component/line information and each component/line, and the actual line winding or line intersection position in the circuit layout cannot be obtained from the circuit diagram. Therefore, in general, after using the circuit layout software to generate the circuit layout according to the circuit diagram, the circuit layout personnel need to set additional rules or manually adjust the winding position of the circuit in the circuit layout or the intersection position of the line to make it Meets preset circuit characteristics.

特別是,對於傳輸高速信號(high-speed signal)的印刷電路板來說,電路佈局中各個線路交叉點的位置,通常需要與印刷電路板上的貫孔(through hole)相關聯,且各個線路交叉點的位置可能會直接地影響高速信號傳輸至各個終端(terminal)的時序(timing)。舉例來說,假設因電路佈局人員的經驗不足等原因,導致電路佈局中線路交叉點的位置選擇不適當時,高速信號從線路交叉點往各個 終端傳輸的時序可能會無法同步(synchronization),進而影響印刷電路板整體的性能。In particular, for a printed circuit board that transmits a high-speed signal, the location of the intersection of each line in the circuit layout typically needs to be associated with a through hole on the printed circuit board, and each line The location of the intersection may directly affect the timing of high speed signal transmission to each terminal. For example, suppose that due to the lack of experience of the circuit layout personnel, etc., the position selection of the line intersection in the circuit layout is not appropriate, and the high-speed signal is from the line intersection to each The timing of the terminal transmission may not be synchronized, which in turn affects the overall performance of the printed circuit board.

因此,如何減少電路佈局人員花費在選擇電路佈局中各個線路交叉點位置的時間,並達到印刷電路板中各個終端對於高速信號的時序要求,實為本領域研發人員的重要課題之一。Therefore, how to reduce the time that the circuit layout personnel spends selecting the position of each circuit intersection in the circuit layout and reach the timing requirement of the high-speed signals of each terminal in the printed circuit board is one of the important topics of the research and development personnel in the field.

有鑑於此,本發明提出一種電路佈局方法與裝置,可有效地對印刷電路板的電路佈局中高速信號線的交叉點位置進行定位。In view of this, the present invention provides a circuit layout method and apparatus that can effectively position the intersection of high-speed signal lines in a circuit layout of a printed circuit board.

本發明的實施例提出一種電路佈局方法,適用於電路佈局裝置,所述方法包括下列步驟。在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件,其中至少一定位元件分別具有一電路元件屬性和一電路板貫孔屬性。設定電路的電氣約束規則,並將至少一定位元件與多條高速信號線的至少一交叉點進行關聯。導入電氣約束規則以及對應於至少一定位元件的至少一定位元件資訊於一未完成電路佈局。調整至少一定位元件於未完成電路佈局中的位置。根據至少一定位元件於未完成電路佈局中調整後的位置,決定這些條高速信號線的至少一交叉點於未完成電路佈局中的位置,並根據至少一交叉點的位置產生已完成電路佈局。Embodiments of the present invention provide a circuit layout method suitable for use in a circuit layout apparatus, the method comprising the following steps. At least one positioning component is disposed in the circuit having a cross-point topology requirement for the high-speed signal line, wherein at least one of the positioning components has a circuit component property and a board through-hole property, respectively. Setting electrical discipline rules for the circuit and associating at least one locating element with at least one intersection of the plurality of high speed signal lines. Introducing an electrical constraint rule and at least one positioning component information corresponding to the at least one positioning component to an unfinished circuit layout. Adjusting the position of at least one of the positioning elements in the unfinished circuit layout. Depending on the position of the at least one positioning component in the unfinished circuit layout, the position of at least one intersection of the strips of high speed signal lines in the unfinished circuit layout is determined, and the completed circuit layout is generated based on the position of the at least one intersection.

在本發明的一實施例中,所述在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件的步驟更包括下列步驟。選取電路中的至少一電路元件,並根據至少一電路元件的元件編號,對至少一定位元件進行命名。In an embodiment of the invention, the step of providing at least one positioning component in the circuit having a cross-point topology requirement for the high-speed signal line further comprises the following steps. At least one circuit component in the circuit is selected, and at least one of the positioning components is named according to the component number of the at least one circuit component.

在本發明的一實施例中,所述調整至少一定位元件於未完成電路佈局中的位置的步驟包括下列步驟。根據電氣約束規則以及至少一定位元件資訊,調整至少一定位元件於未完成電路佈局中的位置。In an embodiment of the invention, the step of adjusting the position of the at least one positioning component in the unfinished circuit layout comprises the following steps. Adjusting a position of the at least one positioning component in the unfinished circuit layout according to the electrical constraint rule and the at least one positioning component information.

在本發明的一實施例中,所述電路佈局方法更包括下列步驟。從已完成電路佈局中移除至少一定位元件。In an embodiment of the invention, the circuit layout method further includes the following steps. Removing at least one positioning component from the completed circuit layout.

在本發明的一實施例中,所述至少一定位元件包括貫孔。In an embodiment of the invention, the at least one positioning element comprises a through hole.

本發明的實施例另提出一種電路佈局裝置,所述裝置包括第一模組、第二模組、第三模組、第四模組以及第五模組。第一模組,用以在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件,其中至少一定位元件分別具有一電路元件屬性和一電路板貫孔屬性。第二模組耦接至第一模組,用以設定電路的電氣約束規則,並將至少一定位元件與多條高速信號線的至少一交叉點進行關聯。第三模組耦接至第二模組,用以導入電氣約束規則以及對應於至少一定位元件的至少一定位元件資訊於一未完成電路佈局。第四模組耦接至第三模組,用以調整至少一定位元件於未完成電路佈局中的位置。第五模組耦接至第四模組,用以根據至少一定位元件於未完成電路佈局中調 整後的位置,決定些條高速信號線的至少一交叉點於未完成電路佈局中的位置,並根據至少一交叉點的位置產生已完成電路佈局。An embodiment of the present invention further provides a circuit layout device, where the device includes a first module, a second module, a third module, a fourth module, and a fifth module. The first module is configured to set at least one positioning component in the circuit having a cross-point topology requirement for the high-speed signal line, wherein at least one of the positioning components has a circuit component attribute and a board through-hole property. The second module is coupled to the first module for setting an electrical constraint rule of the circuit, and associating the at least one positioning component with at least one intersection of the plurality of high-speed signal lines. The third module is coupled to the second module for introducing an electrical constraint rule and at least one positioning component information corresponding to the at least one positioning component to an unfinished circuit layout. The fourth module is coupled to the third module for adjusting a position of the at least one positioning component in the unfinished circuit layout. The fifth module is coupled to the fourth module for adjusting the unfinished circuit layout according to the at least one positioning component The entire position determines the position of at least one intersection of the plurality of high-speed signal lines in the unfinished circuit layout, and generates the completed circuit layout according to the position of the at least one intersection.

在本發明的一實施例中,所述第一模組更用以選取電路中的至少一電路元件,並根據至少一電路元件的元件編號,對至少一定位元件進行命名。In an embodiment of the invention, the first module is further configured to select at least one circuit component in the circuit, and name the at least one positioning component according to the component number of the at least one circuit component.

在本發明的一實施例中,所述第四模組根據電氣約束規則以及至少一定位元件資訊,調整至少一定位元件於未完成電路佈局中的位置。In an embodiment of the invention, the fourth module adjusts a position of the at least one positioning component in the unfinished circuit layout according to the electrical constraint rule and the at least one positioning component information.

在本發明的一實施例中,所述第五模組更用以從已完成電路佈局中移除至少一定位元件。In an embodiment of the invention, the fifth module is further configured to remove at least one positioning component from the completed circuit layout.

基於上述,本發明在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件之後,設定電路的電氣約束規則,並將至少一定位元件與多條高速信號線的至少一交叉點進行關聯。接著,本發明可導入電氣約束規則以及對應於至少一定位元件的至少一定位元件資訊於一未完成電路佈局,並調整至少一定位元件於未完成電路佈局中的位置。然後,根據至少一定位元件於未完成電路佈局中調整後的位置,決定這些條高速信號線的至少一交叉點於未完成電路佈局中的位置,並且根據至少一交叉點的位置產生已完成電路佈局。Based on the above, after the at least one positioning component is disposed in the circuit having the cross-point topology requirement of the high-speed signal line, the electrical constraint rule of the circuit is set, and at least one intersection of the at least one positioning component and the plurality of high-speed signal lines is set. Make an association. Next, the present invention can introduce an electrical constraint rule and at least one positioning component information corresponding to the at least one positioning component to an unfinished circuit layout and adjust the position of the at least one positioning component in the unfinished circuit layout. And determining, according to the adjusted position of the at least one positioning component in the unfinished circuit layout, the position of the at least one intersection of the strip of high-speed signal lines in the unfinished circuit layout, and generating the completed circuit according to the position of the at least one intersection layout.

藉此,本發明可透過定位元件對印刷電路板的電路佈局中高速信號線的交叉點的位置進行定位,進而有效地減 少電路佈局人員耗費在選擇或調整印刷電路板的電路佈局中高速信號線的交叉點位置的時間。Thereby, the present invention can position the intersection of the high-speed signal lines in the circuit layout of the printed circuit board through the positioning component, thereby effectively reducing Less circuit layout personnel spend time selecting or adjusting the intersection of high speed signal lines in the circuit layout of the printed circuit board.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

一般來說,在對印刷電路板(Printed Circuit Board,PCB)的電路佈局(layout)中高速信號線(high-speed signal lines)的交叉點(crossing point)位置進行定位時,必須考量到高速信號在傳輸上的時序(timing)特性。特別是,對於高速信號線具有交叉點拓撲(topology)結構要求的電路而言,高速信號在傳輸上的時序特性很容易因不當的佈線而導致信號的時序不同步(non-synchronization)。In general, when positioning the intersection point of high-speed signal lines in the layout of a Printed Circuit Board (PCB), high-speed signals must be considered. Timing characteristics on transmission. In particular, for a circuit in which a high-speed signal line has a cross-point topology requirement, the timing characteristics of the high-speed signal on the transmission are liable to cause non-synchronization of the signal due to improper wiring.

舉例來說,圖1為根據本發明的一實施例所繪示的電路圖。請參照圖1,電路圖10中包括終端101~105、高速信號線111~116、電阻121~123。為了達到高速信號從信號線的交叉點位置(例如,交叉點11)發散至終端101~105的時序要求(例如,時序同步要求),以電路圖10來看,終端101~105與交叉點11之間的線路長度皆會相等或趨近於相等。For example, FIG. 1 is a circuit diagram according to an embodiment of the invention. Referring to FIG. 1, the circuit diagram 10 includes terminals 101-105, high-speed signal lines 111-116, and resistors 121-123. In order to achieve the timing requirement of the high-speed signal diverging from the intersection position of the signal line (for example, the intersection 11) to the terminals 101-105 (for example, timing synchronization requirement), in the circuit diagram 10, the terminals 101-105 and the intersection 11 are The lengths of the lines will be equal or nearly equal.

例如,以圖1來看,假設終端101與交叉點11之間的高速信號線111的長度實際上被設定為長度L1加上長度L2(即,L1+L2),終端102與交叉點11之間的高速信號線112的長度實際上被設定為長度L3加上長度L4(即, L3+L4),終端103與交叉點11之間的高速信號線113的長度實際上被設定為長度L5加上長度L6(即,L5+L6),終端104與交叉點11之間的高速信號線114與高速信號線115的長度總合實際上被設定為長度L7加上長度L8(即,L7+L8),並且,終端105與交叉點11之間的高速信號線114與高速信號線116的長度總合實際上被設定為長度L7加上長度L9(即,L7+L9),則L1+L2=L3+L4=L5+L6=L7+L8=L7+L9。藉此,高速信號從交叉點11傳輸至終端101~105的時序可達到或趨近於同步。For example, as seen in FIG. 1, it is assumed that the length of the high-speed signal line 111 between the terminal 101 and the intersection 11 is actually set to the length L1 plus the length L2 (ie, L1+L2), and the terminal 102 and the intersection 11 The length of the inter-high speed signal line 112 is actually set to the length L3 plus the length L4 (ie, L3+L4), the length of the high-speed signal line 113 between the terminal 103 and the intersection 11 is actually set to the length L5 plus the length L6 (ie, L5+L6), and the high-speed signal between the terminal 104 and the intersection 11 The total length of the line 114 and the high speed signal line 115 is actually set to the length L7 plus the length L8 (i.e., L7 + L8), and the high speed signal line 114 and the high speed signal line 116 between the terminal 105 and the intersection 11 The total length of the sum is actually set to the length L7 plus the length L9 (ie, L7 + L9), then L1 + L2 = L3 + L4 = L5 + L6 = L7 + L8 = L7 + L9. Thereby, the timing at which the high speed signal is transmitted from the intersection 11 to the terminals 101 to 105 can be at or near synchronization.

因此,為使印刷電路板的電路佈局中高速信號線的交叉點位置在電路佈局階段中可以快速且正確地被決定,本發明實施例提出一種電路佈局方法,首先,其可在一電路佈局尚未完成時,預先於此未完成的電路佈局(以下統稱為未完成電路佈局)中設置定位元件,以代表多條高速信號線的交叉點,並將至少一定位元件於高速信號線的至少一交叉點進行一對一的關聯。然後,再調整至少一定位元件於未完成電路佈局中的位置。最後,根據至少一定位元件於未完成電路佈局中的位置,決定高速信號線的至少一交叉點於此未完成電路佈局中的位置,以根據上述決定結果產生已完成的電路佈局(以下統稱為已完成電路佈局)。Therefore, in order to make the intersection position of the high-speed signal line in the circuit layout of the printed circuit board can be quickly and correctly determined in the circuit layout stage, the embodiment of the present invention provides a circuit layout method. First, it can be in a circuit layout yet. Upon completion, a positioning component is disposed in advance of the unfinished circuit layout (hereinafter collectively referred to as an unfinished circuit layout) to represent intersections of the plurality of high-speed signal lines, and at least one of the positioning components is intersected by at least one of the high-speed signal lines Points are one-to-one associations. Then, the position of at least one of the positioning elements in the unfinished circuit layout is adjusted. Finally, determining the position of the at least one intersection of the high-speed signal line in the unfinished circuit layout according to the position of the at least one positioning component in the unfinished circuit layout, to generate the completed circuit layout according to the above decision result (hereinafter collectively referred to as The circuit layout has been completed).

藉此,藉由預先設置的定位元件來對高速信號線的交叉點進行定位,可有效地減少以往耗費在決定或調整電路佈局中高速信號線的交叉點的時間。此外,本發明實施例更揭示了可用於體現上述電路佈局方法的電路佈局裝置。 為了使本發明之內容更容易明瞭,以下特舉實施例作為本發明確實能夠據以實施的範例。Thereby, by locating the intersection of the high-speed signal lines by the positioning elements set in advance, it is possible to effectively reduce the time that has been spent in determining or adjusting the intersection of the high-speed signal lines in the circuit layout. In addition, embodiments of the present invention further disclose circuit layout devices that can be used to implement the above circuit layout method. In order to make the content of the present invention easier to understand, the following specific embodiments are illustrative of the embodiments of the present invention.

圖2為根據本發明的一實施例所繪示的電路佈局裝置的功能方塊圖。請參照圖2,電路佈局裝置20可以是桌上型電腦、筆記型電腦(notebook)或平板電腦(Tablet PC)等可運行任意作業系統(Operating System,OS)的各式電腦設備。在本實施例中,電路佈局裝置20包括第一模組21、第二模組22、第三模組23、第四模組24以及第五模組25,其中第二模組22耦接至第一模組21,第三模組23耦接至第二模組22,第四模組24耦接至第三模組23,並且第五模組25耦接至第四模組24。FIG. 2 is a functional block diagram of a circuit layout apparatus according to an embodiment of the invention. Referring to FIG. 2, the circuit layout device 20 may be a computer device such as a desktop computer, a notebook or a tablet PC that can run any operating system (OS). In this embodiment, the circuit layout device 20 includes a first module 21, a second module 22, a third module 23, a fourth module 24, and a fifth module 25, wherein the second module 22 is coupled to The first module 21 , the third module 23 is coupled to the second module 22 , the fourth module 24 is coupled to the third module 23 , and the fifth module 25 is coupled to the fourth module 24 .

圖3為根據本發明的一實施例所繪示的電路佈局方法的流程示意圖。以下將以圖2搭配圖3的方式,來對本實施例的電路佈局裝置20與電路佈局方法進行說明。請參照圖2與圖3,在步驟S302中,第一模組21在對高速信號線具有交叉點拓撲結構要求的電路中,設置至少一定位元件。舉例來說,在本實施例中,第一模組21可以先判斷一電路中是否具有高速信號線的交叉點。然後,當第一模組21判斷此電路中具有一個或多個高速信號線的交叉點時,第一模組21即在此電路中設置與高速信號線的交叉點的數量相同的一個或複數個定位元件。FIG. 3 is a schematic flow chart of a circuit layout method according to an embodiment of the invention. Hereinafter, the circuit layout device 20 and the circuit layout method of the present embodiment will be described with reference to Fig. 2 in conjunction with Fig. 3. Referring to FIG. 2 and FIG. 3, in step S302, the first module 21 is provided with at least one positioning component in a circuit having a cross-point topology requirement for the high-speed signal line. For example, in this embodiment, the first module 21 can first determine whether there is an intersection of high-speed signal lines in a circuit. Then, when the first module 21 determines that there is one or more intersections of high-speed signal lines in the circuit, the first module 21 sets one or more of the same number of intersections with the high-speed signal lines in the circuit. Positioning elements.

關於定位元件設置方式,在本實施例中,第一模組21例如是利用串連(series)或串接的方式將定位元件設置於此電路中。或者,第一模組21也可以是利用取代(replace) 的方式,將高速信號線的每一交叉點皆以定位元件取代等,本發明不對定位元件的設置方式進行限制。Regarding the positioning component setting manner, in the embodiment, the first module 21 is configured to set the positioning component in the circuit by way of series or serial connection. Alternatively, the first module 21 may also be replaced by a replacement. In this way, each intersection of the high-speed signal line is replaced by a positioning component, etc., and the present invention does not limit the manner in which the positioning component is disposed.

特別是,在本實施例中,每一個定位元件皆可具有電路元件屬性(attribute)與電路板貫孔屬性等一般實體元件所具有的屬性或特性。或者,定位元件也可以分別具有電路元件屬性、電路板貫孔屬性等一般實體元件所具有的屬性或特性其中之一。舉例來說,在本實施例中,定位元件例如是電路佈局中常用的貫孔,或者不會對電路佈局整體運作造成太大影響具有上述屬性的各種元件,本發明不對其限制。In particular, in this embodiment, each of the positioning elements may have attributes or characteristics of a general physical element such as a circuit element attribute and a board through hole attribute. Alternatively, the positioning elements may each have one of attributes or characteristics possessed by a general physical element such as a circuit element attribute or a board through hole attribute. For example, in the present embodiment, the positioning element is, for example, a through hole commonly used in a circuit layout, or various elements having no such influence on the overall operation of the circuit layout, and the present invention is not limited thereto.

另外,在本實施例中,第一模組21還可以選取此電路中的至少一電路元件,並根據至少一電路元件的元件編號/代號/名稱等,對至少一定位元件進行命名。舉例來說,第一模組21可以根據此電路中最靠近或最鄰近一定位元件的電路元件的元件編號/代號/名稱等,來對此定位元件進行命名,例如設定此定位元件的元件編號或名稱等。在本實施例中,電路元件例如是電阻(Resistance)、電容(Capacitance)、電感(Inductance)、各式晶片(chip)或其他實體元件等,本發明不對電路元件的種類進行限制。In addition, in this embodiment, the first module 21 may also select at least one circuit component in the circuit, and name the at least one positioning component according to the component number/code/name of the at least one circuit component. For example, the first module 21 can name the positioning component according to the component number/code/name of the circuit component closest to or closest to a positioning component in the circuit, for example, set the component number of the positioning component. Or name, etc. In the present embodiment, the circuit elements are, for example, a resistor, a capacitor, an inductor, a chip, or other physical components, and the present invention does not limit the types of circuit components.

舉例來說,圖4為根據本發明的一實施例所繪示的對定位元件進行命名的示意圖。請參照圖4,電路40中包括終端401、終端402、高速信號線411~413以及接地點403。在將定位元件42設置(例如,串接)於電路40中之後,定位元件42被設置於高速信號線411~413的交叉點41 旁,以代表高速信號線的交叉點41。假設電阻43在電路40中顯示及/或使用的元件編號或名稱為「R717」,則最靠近電阻43的定位元件42的元件編號或名稱可以根據「R717」(即,電阻43的元件編號或名稱)而被設定,例如,在「R717」之前加入「V」而形成「VR717」等,以將「VR717」作為定位元件42的元件編號或名稱。For example, FIG. 4 is a schematic diagram of naming a positioning component according to an embodiment of the invention. Referring to FIG. 4, the circuit 40 includes a terminal 401, a terminal 402, high-speed signal lines 411 to 413, and a grounding point 403. After the positioning element 42 is placed (eg, serially) in the circuit 40, the positioning element 42 is disposed at the intersection 41 of the high speed signal lines 411-413. Next, to represent the intersection 41 of the high speed signal line. Assuming that the component number or name of the resistor 43 displayed and/or used in the circuit 40 is "R717", the component number or name of the positioning component 42 closest to the resistor 43 can be based on "R717" (ie, the component number of the resistor 43 or The name is set, for example, "V7" is added before "R717" to form "VR717" or the like, and "VR717" is used as the component number or name of the positioning element 42.

請再次參照圖2與圖3,在步驟S304中,第二模組22設定此電路的電氣約束規則(electrical constraint rule),並將至少一定位元件與多條高速信號線的至少一交叉點進行關聯(association),或者將至少一定位元件與多條高速信號線的至少一交叉點綁定(tie)等。在本實施例中,電氣約束規則可以是適用於各種電路佈局軟體(例如,Allegro)的電氣約束規則,且本發明不對電氣約束規則的種類與實施方式進行限制。Referring to FIG. 2 and FIG. 3 again, in step S304, the second module 22 sets an electrical constraint rule of the circuit, and performs at least one intersection of the at least one positioning component and the plurality of high-speed signal lines. Association, or binding at least one positioning element to at least one intersection of a plurality of high speed signal lines. In the present embodiment, the electrical constraint rules may be electrical constraint rules applicable to various circuit layout software (eg, Allegro), and the present invention does not limit the types and implementations of electrical constraint rules.

在本實施例中,第二模組22可以例如將定位元件與高速信號線的交叉點進行關聯或綁定的操作定義於電氣約束規則中。或者,第二模組22也可以根據電路佈局人員的設定操作而將每個高速信號線的交叉點的最佳設置位置的設置資訊,設定於此電氣約束規則中,以便後續根據此電氣約束規則來自動地產生相對應的電路佈局。In this embodiment, the second module 22 can define, for example, an operation of associating or binding the intersection of the positioning element with the high speed signal line in an electrical constraint rule. Alternatively, the second module 22 may also set the setting information of the optimal setting position of the intersection of each high-speed signal line according to the setting operation of the circuit layout person in the electrical constraint rule, so as to subsequently follow the electrical constraint rule. To automatically generate the corresponding circuit layout.

接續於步驟S304,在步驟S306中,第三模組23可以導入或載入(loading)於步驟S304中設定的電氣約束規則,以及對應於至少一定位元件的至少一定位元件資訊於初步產生的一電路佈局(以下統稱為未完成電路佈局)。 值得一提的是,在此提及的未完成電路佈局僅是根據此電路或此電路的拓樸結構所初步產生的電路佈局,而在線路與元件的設置上並沒有考量到相關的時序等規格需求。此外,定位元件資訊可以包括定位元件的元件編號/代號/名稱以及上述電路元件屬性及/或電路板貫孔屬性等資訊。In step S304, in step S306, the third module 23 can import or load the electrical constraint rule set in step S304, and the at least one positioning component information corresponding to the at least one positioning component is initially generated. A circuit layout (hereinafter collectively referred to as an unfinished circuit layout). It is worth mentioning that the unfinished circuit layout mentioned here is only the circuit layout initially generated according to the topology of the circuit or the circuit, and the timing and the arrangement of the components are not considered to be related to the timing, etc. Specification requirements. In addition, the positioning component information may include information such as the component number/code/name of the positioning component and the above-mentioned circuit component attributes and/or board hole attributes.

接著,在步驟S308中,第四模組24可以調整至少一定位元件於未完成電路佈局中的位置。舉例來說,在本實施例中,第四模組24可以根據一輸入操作及/或自動地調整至少一定位元件於未完成電路佈局中的位置,以使調整後的未完成電路佈局中的定位元件處在適當或正確的位置上,以便在後續的步驟中,可以根據定位元件的位置來決定高速信號線的交叉點的位置。例如,第四模組24可以根據於步驟S306中導入的電氣約束規則以及至少一定位元件資訊,調整至少一定位元件於未完成電路佈局中的位置。Next, in step S308, the fourth module 24 can adjust the position of the at least one positioning component in the unfinished circuit layout. For example, in this embodiment, the fourth module 24 can adjust the position of the at least one positioning component in the unfinished circuit layout according to an input operation and/or automatically, so as to be in the adjusted unfinished circuit layout. The positioning element is in the proper or correct position so that in a subsequent step, the position of the intersection of the high speed signal line can be determined based on the position of the positioning element. For example, the fourth module 24 can adjust the position of the at least one positioning component in the unfinished circuit layout according to the electrical constraint rule introduced in step S306 and the at least one positioning component information.

然後,在步驟S310中,第五模組25根據至少一定位元件於未完成電路佈局中調整後的位置,決定這些高速信號線的至少一交叉點於未完成電路佈局中的位置,並根據至少一交叉點的位置自動地產生另一電路佈局(以下統稱為已完成電路佈局)。藉此,電路佈局人員不再需要耗費許多額外的時間在調整電路佈局中高速信號線的交叉點位置,而可由電路佈局裝置20自動地藉由一個或多個定位元件來對高速信號線的交叉點進行定位,並產生正確的電路佈局。或者,電路佈局人員也可藉由定位元件來得知高速 信號線的交叉點正確的設置位置,而可快速地完成電路佈局作業。Then, in step S310, the fifth module 25 determines the position of at least one intersection of the high-speed signal lines in the unfinished circuit layout according to the adjusted position of the at least one positioning component in the unfinished circuit layout, and according to at least The position of an intersection automatically creates another circuit layout (hereinafter collectively referred to as the completed circuit layout). Thereby, the circuit layout personnel no longer need to spend a lot of extra time to adjust the intersection position of the high-speed signal lines in the circuit layout, and the circuit layout device 20 can automatically cross the high-speed signal lines by one or more positioning elements. Point to locate and produce the correct circuit layout. Alternatively, the circuit layout personnel can also know the high speed by locating components. The intersection of the signal lines is correctly set to the position, and the circuit layout operation can be completed quickly.

更具體地來看,當電路佈局人員使用電路佈局軟體(例如,Allegro)來進行印刷電路板的電路佈局操作時,電路佈局軟體可根據上述電氣約束規則來自動地執行相關的電路佈局。因此,在本實施例中,已完成電路佈局中各個元件/線路的詳細資訊與參數可以是在步驟S304中由電路佈局人員手動設定於上述電氣約束規則中,或者由電腦系統根據電路拓樸或電路圖自動地計算並設定於上述電氣約束規則中。More specifically, when a circuit layout person uses a circuit layout software (eg, Allegro) to perform a circuit layout operation of a printed circuit board, the circuit layout software can automatically perform the associated circuit layout in accordance with the above-described electrical constraint rules. Therefore, in this embodiment, detailed information and parameters of each component/line in the completed circuit layout may be manually set in the above-mentioned electrical constraint rule by the circuit layout personnel in step S304, or may be based on the circuit topology or by the computer system. The circuit diagram is automatically calculated and set in the above electrical constraint rules.

特別是,由於上述定位元件是屬於「實體」元件(即,類似於電阻或晶片等元件),且具有上述電路元件屬性與電路板貫孔屬性等一般實體元件所具有的屬性或特性。因此上述定位元件的相關參數(例如,數量參數與位置參數等)可以很明確地被定義於此電氣約束規則中。稍後,當此電氣約束規則被導入或載入之後,飛線(Ratsnests)等線路就可以從上述定位元件發散出去,而可協助完成上述已完成電路佈局。In particular, since the above-mentioned positioning elements belong to "solid" elements (i.e., similar to elements such as resistors or wafers), and have the attributes or characteristics of the above-mentioned circuit element attributes and board-hole attributes such as general physical elements. Therefore, the relevant parameters of the above positioning elements (for example, quantity parameters and position parameters, etc.) can be clearly defined in this electrical constraint rule. Later, after the electrical constraint rules are imported or loaded, lines such as Ratsnests can be diverged from the positioning elements to assist in completing the above completed circuit layout.

圖5為根據本發明的一實施例所繪示的電路佈局的示意圖。請參照圖5,在電路佈局50中,高速信號線511~514的交叉位置為交叉點51,且交叉點51的位置就是根據定位元件(例如,貫孔)所在的位置而定的。也就是說,只要正確地決定並調整對應於交叉點51的定位元件在電路 佈局50中的位置,且不再將其任意移動或刪除,本發明可有效地維持電路佈局50整體架構與信號時序的正確性。FIG. 5 is a schematic diagram of a circuit layout according to an embodiment of the invention. Referring to FIG. 5, in the circuit layout 50, the intersection of the high-speed signal lines 511-514 is the intersection 51, and the position of the intersection 51 is determined according to the position of the positioning element (for example, the through hole). That is, as long as the positioning element corresponding to the intersection 51 is correctly determined and adjusted in the circuit The position in the layout 50 is no longer arbitrarily moved or deleted, and the present invention can effectively maintain the correctness of the overall architecture and signal timing of the circuit layout 50.

總而言之,以往電路佈局人員必須逐步地調整「虛擬的」或「懸浮於電路佈局上的」高速信號線的交叉點的位置,以使其可正確運作或達到高速信號的的時序要求,不僅費時又費工。而在本發明的實施例中,由於定位元件已預先被設置或綁定於高速信號線的交叉點,因此第五模組25可以很容易地根據「實體的」或「固定於電路佈局上的」定位元件,來決定此定位元件所對應的高速信號線的交叉點位置,並快速地完成正確的電路佈局。All in all, in the past, circuit layout personnel must gradually adjust the position of the intersection of "virtual" or "suspended on the circuit layout" high-speed signal lines so that they can operate correctly or meet the timing requirements of high-speed signals, which is not only time-consuming but also time-consuming. Labor. In the embodiment of the present invention, since the positioning component has been previously set or bound to the intersection of the high-speed signal lines, the fifth module 25 can be easily "physical" or "fixed on the circuit layout. Position the component to determine the intersection of the high-speed signal lines corresponding to the positioning component and quickly complete the correct circuit layout.

另一方面,為了避免在圖3的步驟S302中由第一模組21所設置的定位元件會對已完成電路佈局造成影響,在本發明一實施例中,第五模組25也可以選擇性地從已完成電路佈局中移除定位元件。On the other hand, in order to avoid the influence of the positioning component provided by the first module 21 in the step S302 of FIG. 3 on the completed circuit layout, in an embodiment of the invention, the fifth module 25 is also optional. The ground removes the positioning component from the completed circuit layout.

舉例來說,假設第一模組21所加入的定位元件為貫孔,其實質上並不會對已完成電路佈局造成不良影響,故第五模組25移除或不移除此定位元件皆可。但是,在另一例中,假設第一模組21所加入的定位元件為非貫孔的其他實體元件(例如,電阻或其他晶片等元件),則此被加入的實體元件可能對已完成電路佈局造成不必要的影響,因此,在產生出已完成電路佈局之後,第五模組25可以從已完成電路佈局中移除此實體元件。For example, if the positioning component added by the first module 21 is a through hole, which does not substantially adversely affect the completed circuit layout, the fifth module 25 removes or does not remove the positioning component. can. However, in another example, assuming that the positioning component added by the first module 21 is a non-through-hole other physical component (for example, a resistor or other component such as a chip), the added physical component may have completed the circuit layout. This causes unnecessary effects, so the fifth module 25 can remove this physical component from the completed circuit layout after the completed circuit layout has been generated.

值得一提的是,第一模組21、第二模組22、第三模組23、第四模組24以及第五模組25例如是以邏輯電路元件 組成的硬體裝置,而可分別執行上述之功能。另外,這些模組也可以是儲存在電路佈局裝置20之記憶體(memory)中的韌體(firmware)程式或軟體模組,其可載入電路佈局裝置20的處理器,而分別執行上述功能。舉例來說,上述處理器可以是中央處理器(central processing unit,CPU),而上述記憶體則例如是各種非揮發性記憶體或其組合,例如唯讀記憶體(read-only memory,ROM)及/或快閃記憶體(flash memory),其中唯讀記憶體例如是可規化唯讀記憶體(programmable read-only memory,PROM)、電可改寫唯讀記憶體(electrically alterable read only memory,EAROM)、可擦可規化唯讀記憶體(erasable programmable read only memory,EPROM)及/或電可擦可規化唯讀記憶體(electrically erasable programmable read only memory,EEPROM)等。It is worth mentioning that the first module 21, the second module 22, the third module 23, the fourth module 24, and the fifth module 25 are, for example, logic circuit components. A hardware device is formed, and the above functions can be performed separately. In addition, these modules may also be firmware programs or software modules stored in the memory of the circuit layout device 20, which can be loaded into the processor of the circuit layout device 20 to perform the above functions separately. . For example, the processor may be a central processing unit (CPU), and the memory is, for example, various non-volatile memories or a combination thereof, such as a read-only memory (ROM). And/or a flash memory, wherein the read-only memory is, for example, a programmable read-only memory (PROM) or an electrically alterable read only memory (electrically alterable read only memory, EAROM), erasable programmable read only memory (EPROM) and/or electrically erasable programmable read only memory (EEPROM).

綜上所述,本發明實施例的電路佈局方法與裝置,其可在對高速信號線具有交叉點拓撲結構要求的電路中設置定位元件(設置數量依高速信號線的交叉點的數量而定)之後,設定此電路的電氣約束規則,並將定位元件與高速信號線的交叉點進行關聯或綁定。接著,本發明可導入此電氣約束規則以及對應於定位元件的定位元件資訊於未完成電路佈局,並且調整定位元件於未完成電路佈局中的位置,以根據定位元件於此電路佈局中的位置,來決定高速信號線的交叉點於此電路佈局中的位置,並據以產生已完成電路佈局。In summary, the circuit layout method and apparatus of the embodiments of the present invention can set positioning components in a circuit having a cross-point topology requirement for a high-speed signal line (the number of settings depends on the number of intersections of high-speed signal lines) After that, the electrical constraint rules of the circuit are set and the intersection of the positioning component and the high speed signal line is associated or bound. Next, the present invention can introduce the electrical constraint rule and the positioning component information corresponding to the positioning component to the unfinished circuit layout, and adjust the position of the positioning component in the unfinished circuit layout to be based on the position of the positioning component in the circuit layout. The position of the intersection of the high-speed signal line in this circuit layout is determined, and the completed circuit layout is generated accordingly.

藉此,透過定位元件的設置,本發明實施例的電路佈局方法與裝置可對印刷電路板的電路佈局中高速信號線的交叉點的位置進行定位,進而有效地減少電路佈局人員耗費在選擇或調整印刷電路板的電路佈局中高速信號線的交叉點位置的時間。另外,於加入定位元件之後,本發明實施例的電路佈局方法與裝置還可將其移除,以避免其對原始的電路佈局造成影響。Thereby, through the arrangement of the positioning component, the circuit layout method and device of the embodiment of the invention can position the intersection of the high-speed signal line in the circuit layout of the printed circuit board, thereby effectively reducing the cost of the circuit layout personnel in selecting or Adjusting the timing of the intersection of high-speed signal lines in the circuit layout of the printed circuit board. In addition, after the positioning component is added, the circuit layout method and apparatus of the embodiments of the present invention can also remove it to avoid affecting the original circuit layout.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10、40‧‧‧電路10, 40‧‧‧ circuits

101~105、401、402‧‧‧終端101~105, 401, 402‧‧‧ Terminal

111~116、411~413、511~514‧‧‧高速信號線111~116, 411~413, 511~514‧‧‧ high speed signal lines

121~123、43‧‧‧電阻121~123, 43‧‧‧resistance

11、41、51‧‧‧交叉點11, 41, 51‧‧‧ intersection

20‧‧‧電路佈局裝置20‧‧‧Circuit layout device

21‧‧‧第一模組21‧‧‧ first module

22‧‧‧第二模組22‧‧‧ second module

23‧‧‧第三模組23‧‧‧ Third module

24‧‧‧第四模組24‧‧‧ fourth module

25‧‧‧第五模組25‧‧‧ fifth module

403‧‧‧接地點403‧‧‧ Grounding point

42‧‧‧定位元件42‧‧‧ Positioning components

50‧‧‧電路佈局50‧‧‧Circuit layout

S302、S304、S306、S308、S310‧‧‧本發明一實施例的電路佈局方法各步驟S302, S304, S306, S308, S310‧‧‧ steps of the circuit layout method according to an embodiment of the present invention

圖1為根據本發明的一實施例所繪示的電路圖。FIG. 1 is a circuit diagram of an embodiment of the invention.

圖2為根據本發明的一實施例所繪示的電路佈局裝置的功能方塊圖。FIG. 2 is a functional block diagram of a circuit layout apparatus according to an embodiment of the invention.

圖3為根據本發明的一實施例所繪示的電路佈局方法的流程示意圖。FIG. 3 is a schematic flow chart of a circuit layout method according to an embodiment of the invention.

圖4為根據本發明的一實施例所繪示的對定位元件進行命名的示意圖。FIG. 4 is a schematic diagram of naming a positioning component according to an embodiment of the invention.

圖5為根據本發明的一實施例所繪示的電路佈局的示意圖。FIG. 5 is a schematic diagram of a circuit layout according to an embodiment of the invention.

S302、S304、S306、S308、S310‧‧‧電路佈局方法各步驟S302, S304, S306, S308, S310‧‧‧ circuit layout method steps

Claims (10)

一種電路佈局方法,適用於一電路佈局裝置,包括:在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件,其中該至少一定位元件分別具有一電路元件屬性和一電路板貫孔屬性;設定該電路的電氣約束規則,並將該至少一定位元件與多條高速信號線的至少一交叉點進行關聯;導入該電氣約束規則以及對應於該至少一定位元件的至少一定位元件資訊於一未完成電路佈局;調整該至少一定位元件於該未完成電路佈局中的位置;根據該至少一定位元件於該未完成電路佈局中調整後的位置,決定該些條高速信號線的該至少一交叉點於該未完成電路佈局中的位置,並根據該至少一交叉點的位置產生已完成電路佈局。A circuit layout method, applicable to a circuit layout device, comprising: at least one positioning component disposed in a circuit having a cross-point topology requirement for a high-speed signal line, wherein the at least one positioning component respectively has a circuit component attribute and a circuit board a through hole property; setting an electrical constraint rule of the circuit, and associating the at least one positioning component with at least one intersection of the plurality of high speed signal lines; introducing the electrical constraint rule and at least one positioning corresponding to the at least one positioning component The component information is in an unfinished circuit layout; adjusting a position of the at least one positioning component in the unfinished circuit layout; determining the high-speed signal lines according to the adjusted position of the at least one positioning component in the unfinished circuit layout The at least one intersection is at a location in the unfinished circuit layout and a completed circuit layout is generated based on the location of the at least one intersection. 如申請專利範圍第1項所述之電路佈局方法,其中在對高速信號線具有交叉點拓撲結構要求的電路中設置該至少一定位元件的步驟包括:選取該電路中的至少一電路元件;以及根據該至少一電路元件的元件編號,對該至少一定位元件進行命名。The circuit layout method of claim 1, wherein the step of disposing the at least one positioning component in a circuit having a cross-point topology requirement for the high-speed signal line comprises: selecting at least one circuit component in the circuit; The at least one positioning element is named according to the component number of the at least one circuit component. 如申請專利範圍第1項所述之電路佈局方法,其中調整該至少一定位元件於該未完成電路佈局中的位置的步驟包括: 根據該電氣約束規則以及該至少一定位元件資訊,調整該至少一定位元件於該未完成電路佈局中的位置。The circuit layout method of claim 1, wherein the step of adjusting a position of the at least one positioning component in the unfinished circuit layout comprises: And adjusting the position of the at least one positioning component in the unfinished circuit layout according to the electrical constraint rule and the at least one positioning component information. 如申請專利範圍第1項所述之電路佈局方法,更包括:從該已完成電路佈局中移除該至少一定位元件。The circuit layout method of claim 1, further comprising: removing the at least one positioning component from the completed circuit layout. 如申請專利範圍第1項所述之電路佈局方法,其中該至少一定位元件包括貫孔。The circuit layout method of claim 1, wherein the at least one positioning component comprises a through hole. 一種電路佈局裝置,包括:一第一模組,用以在對高速信號線具有交叉點拓撲結構要求的電路中設置至少一定位元件,其中該至少一定位元件分別具有一電路元件屬性和一電路板貫孔屬性;一第二模組,耦接該第一模組,用以設定該電路的電氣約束規則,並將該至少一定位元件與多條高速信號線的至少一交叉點進行關聯;一第三模組,耦接該第二模組,用以導入該電氣約束規則以及對應於該至少一定位元件的至少一定位元件資訊於一未完成電路佈局;一第四模組,耦接該第三模組,用以調整該至少一定位元件於該未完成電路佈局中的位置;一第五模組,耦接該第四模組,用以根據該至少一定位元件於該未完成電路佈局中調整後的位置,決定該些條高速信號線的該至少一交叉點於該未完成電路佈局中的位置,並根據該至少一交叉點的位置產生已完成電路佈局。A circuit layout apparatus comprising: a first module for arranging at least one positioning component in a circuit having a cross-point topology requirement for a high-speed signal line, wherein the at least one positioning component respectively has a circuit component attribute and a circuit a second module coupled to the first module for setting an electrical constraint rule of the circuit, and associating the at least one positioning component with at least one intersection of the plurality of high-speed signal lines; a third module coupled to the second module for introducing the electrical constraint rule and at least one positioning component information corresponding to the at least one positioning component to an unfinished circuit layout; a fourth module coupled The third module is configured to adjust the position of the at least one positioning component in the unfinished circuit layout; the fifth module is coupled to the fourth module for the unfinished according to the at least one positioning component Adjusting the position of the circuit layout, determining a position of the at least one intersection of the plurality of high-speed signal lines in the unfinished circuit layout, and generating the completed according to the position of the at least one intersection Road layout. 如申請專利範圍第6項所述之電路佈局裝置,其中該第一模組更用以選取該電路中的至少一電路元件;以及根據該至少一電路元件的元件編號,對該至少一定位元件進行命名。The circuit layout device of claim 6, wherein the first module is further configured to select at least one circuit component of the circuit; and the at least one positioning component according to the component number of the at least one circuit component Name it. 如申請專利範圍第6項所述之電路佈局裝置,其中該第四模組根據該電氣約束規則以及該至少一定位元件資訊,調整該至少一定位元件於該未完成電路佈局中的位置。The circuit layout device of claim 6, wherein the fourth module adjusts a position of the at least one positioning component in the unfinished circuit layout according to the electrical constraint rule and the at least one positioning component information. 如申請專利範圍第6項所述之電路佈局裝置,其中該第五模組更用以從該已完成電路佈局中移除該至少一定位元件。The circuit layout device of claim 6, wherein the fifth module is further configured to remove the at least one positioning component from the completed circuit layout. 如申請專利範圍第6項所述之電路佈局裝置,其中該至少一定位元件包括貫孔。The circuit layout device of claim 6, wherein the at least one positioning component comprises a through hole.
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