CN105895584A - Method for stripping polycrystalline layers of silicon re-polishing wafer - Google Patents
Method for stripping polycrystalline layers of silicon re-polishing wafer Download PDFInfo
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- CN105895584A CN105895584A CN201610267921.3A CN201610267921A CN105895584A CN 105895584 A CN105895584 A CN 105895584A CN 201610267921 A CN201610267921 A CN 201610267921A CN 105895584 A CN105895584 A CN 105895584A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
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Abstract
The invention provides a method for stripping polycrystalline layers of a silicon re-polishing wafer, and is characterized by comprising the steps of first immersing a wafer deposited with a plurality of polycrystalline layers in a KOH solution with a temperature of 50-70 DEG C and a mass fraction of 35% to 45% for 15-30min, and slowing stripping and corroding the polycrystalline layers deposited on the surface of the wafer; and then immersing the wafer in a KOH solution with a temperature higher than 90 DGC C and a mass fraction greater than 45% for 8-12min, corroding and stripping the polycrystalline layers thoroughly, and thus obtaining a silicone re-polishing wafer to be polished. The invention can reduce the surface stress generated after the stripping of the polycrystalline layers, so that the number of slip lines with the depth and width greater than 70<mu>m on the surface of the corroded silicon re-polishing layer is less than 50; and therefore, the invention has a remarkable result in improving the yield of re-polishing wafers.
Description
Technical field
This patent relates to integrated circuit with returning throwing silicon chip process technology, particularly relates to return the wafer film layer corrosion stripping technology technology of polishing technical process.
Background technology
Along with the industries such as quasiconductor, LED, solar energy are flourish, products application is more and more extensive；Under the demand driving that the whole world constantly expands, each big Semiconductor enterprises constantly extends new plant area, promotes production capacity to meet the market demand.But when producing wafer, each processing procedure all must monitor, confirm the guaranteeing of stable, yield of processing procedure, just can produce the product required for client.Therefore, under meeting market demand premise, it is necessary for the cost of required input test wafer when actual consideration produces wafer.
In wafer manufacturing process, not only need positive, but also need the vacation playing setoff effect in a large number to accompany sheet, in order to ensure the quality of positive.The demand demand no less than positive of sheet is accompanied in its vacation.For in wafer manufacturing process, the quality requirements that vacation is accompanied sheet is high, thus many wafer makers by the defective wafer detected in each production process by returning glossing, being done over again into the thinnest silicon chip of thickness is used for vacation and accompanies sheet, even do over again into positive, thus reduce production cost.And this class silicon chip is returning throwing sheet.
Return throwing sheet in addition to thickness is thinning because of grinding and polishing, there is no the biggest mass discrepancy with original wafer, use is returned polished silicon wafer and is accompanied sheet can reduce the consumption to positive as vacation, if the thickness returning polished silicon wafer meets positive requirement with every character index simultaneously, also IC wafer manufacture can be again applied to, thus the manufacturing cost of IC wafer can be directly reduced.Bad crystal column surface film layer mainly has SiO2、Si3N4, polysilicon etc.；Wherein SiO2、Si3N4Deposition thin film uses Fluohydric acid. to peel off, and polysilicon deposition thin film generally uses the concentration of 90 DEG C of temperatures above and peels off more than 45% KOH solution corrosion.After the i.e. membrane stress of depositional coating stripping can put into after eliminating, road silicon chip returns glossing: grind-polishing-cleaning.
But, the corrosion stripping means of the alkaline solution of this employing high-temperature high concentration, although the polycrystalline film on surface can be peeled off with fast erosion, but using this technique polycrystalline film to be quickly corroded strippings for surface deposition has the wafer of multilamellar polycrystalline film, multilamellar polycrystalline film stress is concentrated quickly release to ultimately result in surface and is produced and crisscross more than more than 100 run through whole crystal face and the degree of depth and width all reaches the close-packed lattice skid wire of more than 70 μm；Increase corrosion and glossing returns the removal amount throwing sheet surface, cause silicon chip available thickness the most thinning.
Summary of the invention
For above technical problem, the present invention provides a kind of silicon to return the stripping means throwing sheet multilamellar polycrystalline film, it is characterised in that:
Wafer containing multilamellar polycrystalline film is soaked in temperature more than 50 DEG C and less than 70 DEG C, mass fraction more than 35% less than corrosion treatmentCorrosion Science 15 ~ 30min preliminary in the KOH solution of 45%.
The wafer of preliminary corrosion treatmentCorrosion Science is soaked in temperature again, and more than 90 DEG C and mass fraction carries out deep erosions 8 ~ 12min more than in the KOH solution of 45%.
Cleaned, obtain polished silicon and return throwing sheet.
Further, described can be the polycrystalline film of extension, polycrystalline membranous layer of silicon oxide containing multilamellar polycrystalline film.
Further, described silicon returns the degree of depth throwing sheet surface and is less than 50 with width more than the bar number of the skid wire of 5 μm.
The beneficial effects of the present invention is, first under the KOH solution of low-temperature and low-concentration, slowly the polycrystalline film of crystal column surface attachment is peeled off in corrosion, crystal column surface stress is slowly discharged, the effectively newly-increased and extension of suppression surface sliding line, significantly reduce and return the grinding removal amount throwing sheet, improve and return the effectively usable thickness throwing sheet, improve wafer and return throwing regeneration yield rate.
Accompanying drawing explanation
With reference to appended accompanying drawing, more fully to describe embodiments of the invention.But, appended accompanying drawing is merely to illustrate and illustrates, is not intended that limitation of the scope of the invention.
Fig. 1 is the typical process flow of present invention process method.
Fig. 2 is the former old technological process contrasted with present invention process method.
Detailed description of the invention
In order to make the process technology scheme of the present invention and technological process advantage it is more readily appreciated that be described in further detail below in conjunction with the accompanying drawings.It shall be stated that the process that is embodied as described herein is used only for explaining the present invention, it is not intended to limit the present invention.Operating procedure is as shown in Figure 1, first the wafer containing multilamellar polycrystalline film is put into temperature more than 50 DEG C and less than 70 DEG C, mass fraction more than 35% less than 45% KOH solution is corroded 15-30min, slowly peel off the polycrystalline film of crystal column surface, to reach slowly to discharge part surface stress.Then the wafer through surface stress slow release is put in temperature mass fraction more than 45% KOH solution corrosion 8-12min, thoroughly polycrystalline film is stripped clean and to improve wafer apparent.
Use microscope it will be seen that controlled within 40 μm by the slip line width of the wafer surface obtained by the process of this innovation improvement；By the wafer having produced slip line is carried out double side grinding process process, to reach to remove obtained by the process that the innovation is improved the two-sided removal amount required for wafer surface slip line after tested and namely within one side removal amount 35 μm, therefore can also show that the slip line severity control by the wafer surface obtained by the process that this innovation improves is within 35 μm within 70 μm.And can also determine that the slip line width by the wafer surface obtained by the process that this innovation improves is more than the degree of depth by Data Comparison.
Embodiment
1
The present invention is a kind of process innovating improvement, corrodes, by chemical reaction rate stepped to the control realization of temperature of chemical liquid Yu concentration (two-forty after first low rate), the polycrystalline film peeling off wafer as shown in Figure 1.
First be the corrosion process of low rate, deposition is had the wafer of polycrystalline film put into temperature be 70 DEG C, mass fraction be 45% KOH solution in corrode 15min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 90 DEG C, mass fraction be 45% KOH solution in corrode 8min and thoroughly polycrystalline film be stripped clean.
Observe 75% wafer by microscope and do not produce the width slip line more than 5 μm；The wafer of 25% produces the width slip line more than 5um and quantity within 50, and the width of slip line is respectively less than 40um.
Embodiment
2
The wafer that deposition is had polycrystalline film put into temperature be 70 DEG C, mass fraction be 40% KOH solution in corrode 20min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 90 DEG C, mass fraction be 48% KOH solution in corrode 8min and thoroughly polycrystalline film be stripped clean.
Observe 80% wafer by microscope and do not produce the width slip line more than 5 μm；The wafer of 20% produces the width slip line more than 5um and quantity within 40, and the width of slip line is respectively less than 30 μm.
Embodiment
3
The wafer that deposition is had polycrystalline film put into temperature be 65 DEG C, mass fraction be 45% KOH solution in corrode 20min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 95 DEG C, mass fraction be 45% KOH solution to be corroded 10min thoroughly polycrystalline film be stripped clean.
Observe 73% wafer by microscope and do not produce the width slip line more than 5 μm；The wafer of 27% produces width more than the slip line of 5 μm and quantity within 50, and the width of slip line is respectively less than 45 μm.
Embodiment
4
The wafer that deposition is had polycrystalline film put into temperature be 60 DEG C, mass fraction be 40% KOH solution in corrode 30min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 90 DEG C, mass fraction be 48% KOH solution in corrode 8min and thoroughly polycrystalline film be stripped clean.
Observing 85% wafer by microscope and do not produce width more than the slip line of 5 μm, the wafer of 15% produces width more than the slip line of 5 μm and quantity within 40, and the width of slip line is respectively less than 25 μm.
Embodiment
5
The wafer that deposition is had polycrystalline film put into temperature be 70 DEG C, mass fraction be 35% KOH solution in corrode 30min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature 95 DEG C, mass fraction is to corrode 5min in 48% KOH solution thoroughly polycrystalline film to be stripped clean.
Observe 80% wafer by microscope and do not produce the width slip line more than 5 μm；The wafer generation width 5-25 μm slip line of 20% and quantity are within 50, and the width of slip line is respectively less than 25 μm.
Embodiment
6
The wafer that deposition is had polycrystalline film put into temperature be 50 DEG C, mass fraction be 45% KOH solution in corrode 60min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 90 DEG C, mass fraction be 48% KOH solution in corrode 15min and thoroughly polycrystalline film be stripped clean.
Observe 65% wafer by microscope and do not produce the width slip line more than 5 μm；The wafer generation width 5-40 μm slip line of 35% and quantity are within 60, and the width of slip line is respectively less than 25 μm.
Embodiment
7
The wafer that deposition is had polycrystalline film put into temperature be 50 DEG C, mass fraction be 45% KOH solution in corrode 60min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 100 DEG C, mass fraction be 48% KOH solution in corrode 10min and thoroughly polycrystalline film be stripped clean.
Observing 50% wafer by microscope and do not produce the width slip line more than 5 μm, 50% wafer produces width 5-60 μm slip line and quantity within 60.
Embodiment
8
The wafer that deposition is had polycrystalline film put into temperature be 70 DEG C, mass fraction be 40% KOH solution in corrode 25min and slowly peel off the polycrystalline film of crystal column surface；Then wafer is put into temperature be 110 DEG C, mass fraction be 48% KOH solution in corrode 5min and thoroughly polycrystalline film be stripped clean.
Observing 75% wafer by microscope and do not produce the width slip line more than 5 μm, 25% wafer produces width 5-60 μm slip line and quantity within 60.
Comparative example
Process before is to use the corrosion of single chemical reaction speed to peel off the polycrystalline film of wafer surface deposition and reaction rate is very fast, and the fast erosion in 48% KOH solution that the wafer of polycrystalline film puts into 90 DEG C that deposition had of its method peels off 15min.Processing, by this film layer stripping technology, the wafer that obtains quickly to peel off due to polycrystalline film, stress is concentrated quickly release to cause surface to produce more than 100 crisscross to run through whole crystal face and the degree of depth and width reaches the close-packed lattice skid wire of more than 70 μm.
Claims (3)
1. a silicon returns the stripping means throwing sheet multilamellar polycrystalline film, it is characterised in that:
(1) wafer containing multilamellar polycrystalline film is soaked in temperature more than 50 DEG C and less than 70 DEG C, mass fraction more than 35% less than corrosion treatmentCorrosion Science 15 ~ 30min preliminary in the KOH solution of 45%；
(2) wafer of preliminary corrosion treatmentCorrosion Science is soaked in temperature again, and more than 90 DEG C and mass fraction carries out deep erosions 8 ~ 12min more than in the KOH solution of 45%；
(3) cleaned, obtain polished silicon and return throwing sheet.
2. according to the stripping means described in claims 1, it is characterised in that described can be the polycrystalline film of extension, polycrystalline membranous layer of silicon oxide containing multilamellar polycrystalline film.
3. according to the stripping means described in claims 1, it is characterised in that described silicon returns the width the throwing sheet surface bar number more than the skid wire of 5 μm less than 50.
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| CN201610267921.3A CN105895584B (en) | 2016-04-27 | 2016-04-27 | Silicon returns the stripping means for throwing piece polycrystalline film |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6276997B1 (en) * | 1998-12-23 | 2001-08-21 | Shinhwa Li | Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers |
| US20100227432A1 (en) * | 2009-03-03 | 2010-09-09 | Kashkoush Ismail I | Method for selective under-etching of porous silicon |
| CN103794467A (en) * | 2014-02-21 | 2014-05-14 | 上海超硅半导体有限公司 | Recycle method for thin silicon wafers |
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2016
- 2016-04-27 CN CN201610267921.3A patent/CN105895584B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6276997B1 (en) * | 1998-12-23 | 2001-08-21 | Shinhwa Li | Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers |
| US20100227432A1 (en) * | 2009-03-03 | 2010-09-09 | Kashkoush Ismail I | Method for selective under-etching of porous silicon |
| CN103794467A (en) * | 2014-02-21 | 2014-05-14 | 上海超硅半导体有限公司 | Recycle method for thin silicon wafers |
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Address after: 201604 No. 88, Yangshi Road, Shihudang Town, Songjiang District, Shanghai Patentee after: Shanghai Chaosi Semiconductor Co.,Ltd. Address before: 201604 No. 88, Yangshi Road, Shihudang Town, Songjiang District, Shanghai Patentee before: SHANGHAI ADVANCED SILICON TECHNOLOGY Co.,Ltd. |