CN105892221B - The production method of half-tone mask plate and TFT substrate - Google Patents
The production method of half-tone mask plate and TFT substrate Download PDFInfo
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- CN105892221B CN105892221B CN201610402645.7A CN201610402645A CN105892221B CN 105892221 B CN105892221 B CN 105892221B CN 201610402645 A CN201610402645 A CN 201610402645A CN 105892221 B CN105892221 B CN 105892221B
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/26—Phase shift masks [PSM]; PSM blanks; Preparation thereof
- G03F1/32—Attenuating PSM [att-PSM], e.g. halftone PSM or PSM having semi-transparent phase shift portion; Preparation thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
Abstract
The present invention provides the production method of a kind of half-tone mask plate and TFT substrate.Half-tone mask plate of the invention, including for respectively and corresponding first, second light tight region of the source of thin film transistor (TFT), drain locations, the semi-transparent region for U-shaped corresponding with the U-shaped channel zone position of the active layer of the thin film transistor (TFT), the semi-transparent region opening positioned at the U-shaped and the two semi-transparent elongated areas extended to outside the opening and remaining full transmission region；The semi-transparent elongated area can cause to show and cross to carve to avoid draining in forms mask plate and generating edge effect when channel region, to eliminate the problem that yields is insufficient, yield is too low in the prior art.The production method of TFT substrate provided by the invention can cause to show and cross to carve using above-mentioned half-tone mask plate to avoid edge effect is generated when composition forms channel region, to eliminate the problem that yields is insufficient, yield is too low in the prior art.
Description
Technical field
The present invention relates to field of display technology more particularly to the production methods of a kind of half-tone mask plate and TFT substrate.
Background technique
Liquid crystal display is widely used in various lives and uses because having many advantages, such as that low energy consumption, radiation is small, light, thin
In product, office appliance, such as computer, mobile phone, bulletin display board.
Liquid crystal display include thin film transistor (TFT) (Thin Film Transist, TFT) array substrate, color membrane substrates and
Inject the liquid crystal layer between two plates.Usually pass through 4~6 wheel mask (Mask) techniques when making thin film transistor base plate, passes through
Film deposition, mask plate exposure, development, etching etc. techniques and be made.With the development of science and technology, half-tone mask plate go out
Through the manufacture craft of liquid crystal display panel has been reduced to 4Mask technology.
As shown in figs. 1-7, the existing method using 5Mask technique production TFT substrate, includes the following steps:
Step 1, as shown in Figure 1, provide a substrate 10, deposit gate metal layer on the substrate 10, use a mask
Plate is patterned processing to the gate metal layer using one of optical cover process, obtains grid 25；
Step 2, as Figure 2-3, be sequentially depositing gate insulating layer 30, semiconductor on the grid 25 and substrate 10
Layer 40 carries out ion doping processing to the semiconductor layer 40, and the upper surface portion of the semiconductor layer 40 is made to form Ohmic contact
Layer 41 is patterned processing to the semiconductor layer 40 using one of optical cover process using a mask plate, obtains active layer 45；
Step 3, as illustrated in figures 4-5, the sedimentary origin drain metal on the both ends of the gate insulating layer 30 and active layer 45
Layer is patterned processing to the source-drain electrode metal layer using one of optical cover process using a mask plate, obtain source, drain 51,
52；51,52 be shielding layer with source, drain electrode, active layer 45 performed etching, by the active layer 45 not by source, drain electrode 51,52
The surface etch through ion processing of covering is fallen, and obtains the channel region 46 on active layer 45, and respectively correspond positioned at the source, leakage
Source, the drain contact region 47,48 of 51,52 lower section of pole；
Step 4 is passivated as shown in fig. 6, depositing on the source electrode 51, drain electrode 52, active layer 45 and gate insulating layer 30
Layer 70 is patterned processing to the passivation layer 70 using one of optical cover process using a mask plate, obtains corresponding to the leakage
First via hole 71 of 52 top of pole；
Step 5 deposits transparent electrode layers as shown in fig. 7, going up at 70 layers of the passivation layer, uses a mask plate using together
Optical cover process is patterned processing to the transparent electrode layer, obtains pixel electrode 81.
And 4Mask technique is compared with above-mentioned 5Mask technique, after carrying out ion doping processing to the semiconductor layer, no
It is patterned, and Direct precipitation source-drain electrode metal layer on it, it then need to only use a half-tone mask plate (Half
Tone Mask) it can be completed in above-mentioned 5Mask technique two used in step 2 and step 3 using one of halftone mask processing procedure
Road optical cover process is formed by pattern.Wherein, as shown in figure 8, half-tone mask plate 90 used in existing 4Mask technique includes
The first, second light tight region 91,92 corresponding with the source of thin film transistor (TFT), drain locations and the thin film transistor (TFT) respectively
Active layer the corresponding U-shaped of U-shaped channel zone position semi-transparent region 93 and remaining full transmission region 94, halftoning is covered
Between the semi-transparent region 93 for being used to form U-shaped channel region in template 90 is between the first, second light tight region 91,92
Gap and be in U-shape, 93 opening of semi-transparent region of the U-shaped is directly connected to full transmission region 94, therefore uses in 4Mask technique
When the half-tone mask plate 90 is exposed development to photoresist, the part of corresponding first, second light tight region 91,92 is
Not exposure region, the part in corresponding semi-transparent region 93 are half-exposure area, and other parts are full exposure region, are passed through on photoresist complete
A large amount of developer solution is consumed in the area in the part short time of exposure, and the part Jing Guo half-exposure only consumes part
Developer solution, therefore there is partial development liquid to penetrate into full exposure region from half-exposure area, intersection is increased in developer solution flow process
Development increased source electrode at this so that the opening when forming source electrode in the channel region of corresponding U-shaped is easy to show and cross to carve
Locate the risk of fracture, this kind of phenomenon will cause the unstability of subsequent technique, reduces production capacity, also reduces the quality of product.
Summary of the invention
The purpose of the present invention is to provide a kind of half-tone mask plates, can leak to avoid in forms mask plate
Edge effect and causing is generated when pole and channel region showing and crossing and carve, to eliminate in the prior art, yields is not
The too low problem of foot, yield.
It, can be with using above-mentioned half-tone mask plate the object of the invention is also to provide a kind of production method of TFT substrate
It avoids generating edge effect and causing when composition forms channel region showing and crossing and carve, yields is not to eliminate in the prior art
The too low problem of foot, yield.
To achieve the above object, present invention firstly provides a kind of half-tone mask plates, including for brilliant with film respectively
The source of body pipe, corresponding first, second light tight region of drain locations, for the U-shaped of the active layer with the thin film transistor (TFT)
The semi-transparent region of the corresponding U-shaped of channel zone position, positioned at the U-shaped semi-transparent region opening and extend to outside the opening
Two semi-transparent elongated areas and remaining full transmission region；
First light tight region include a bar shaped portion, second light tight region include a U-shaped portion, described first
The one end in the bar shaped portion of light tight region is protruded into the opening of the U-shaped portion of second light tight region and does not connect with it, from
And form a U-shaped gap；
The semi-transparent region is located at and fills up between the U-shaped between first light tight region and the second light tight region
Gap, the semi-transparent region includes a vertical bar portion and the two horizontal stripe portions for being connected to vertical bar portion both ends, to form U-shaped knot
Structure；
The semi-transparent elongated area perpendicular to first light tight region bar shaped portion and to the semi-transparent region
U-shaped structure outside extend, connect with the semi-transparent region and block first light tight region and the second light tight region
Between U-shaped gap opening；
The length of the semi-transparent elongated area is greater than the width in the horizontal stripe portion in the semi-transparent region.
The length of the semi-transparent elongated area is 1~3 μm bigger than the width in horizontal stripe portion in the semi-transparent region.
The width in vertical bar portion and the width in horizontal stripe portion are all larger than 1 μm in the semi-transparent region.
The width in vertical bar portion is equal with the width in horizontal stripe portion in the semi-transparent region.
The two semi-transparent elongated area is arranged one layer of semi-permeable membrane by the semi-transparent region opening in the U-shaped and obtains
It arrives, the semi-permeable membrane is chromium oxide film or molybdenum silicon thin film.
The present invention also provides a kind of production methods of TFT substrate, include the following steps:
Step 1 provides a substrate, deposits gate metal layer on the substrate, uses one of light shield using a mask plate
Processing procedure is patterned processing to the gate metal layer, obtains grid；
Step 2 is sequentially depositing gate insulating layer and semiconductor layer on the grid and substrate, to the semiconductor layer into
The processing of row ion doping makes the upper surface portion of the semiconductor layer form ohmic contact layer；
Step 3, the sedimentary origin drain metal layer on the semiconductor layer coat one layer of light on the source-drain electrode metal layer
Material is hindered, this layer of photoresist is exposed using a half-tone mask plate；
The half-tone mask plate includes the first, second light tight region, is located at first light tight region and second
The semi-transparent region of the U-shaped in gap between light tight region, positioned at the U-shaped semi-transparent region opening and to the opening extension
The semi-transparent elongated area of two stretched and remaining full transmission region；First light tight region includes a bar shaped portion, described
Second light tight region includes a U-shaped portion, and it is opaque that the one end in the bar shaped portion of first light tight region protrudes into described second
Do not connect in the opening of the U-shaped portion in region and with it, to form a U-shaped gap；The semi-transparent region is located at and fills up institute
It states the U-shaped gap between the first light tight region and the second light tight region, including a vertical bar portion and is connected to vertical bar portion
The two horizontal stripe portions at both ends, so that U-shaped structure is formed, item of the semi-transparent elongated area perpendicular to first light tight region
Shape portion simultaneously extends to outside the U-shaped structure in the semi-transparent region, connect with the semi-transparent region and blocks described first and is impermeable
The opening in the U-shaped gap between light region and the second light tight region；The length of the semi-transparent elongated area is greater than described half
The width in the horizontal stripe portion of transmission region；
Then developed with developer solution to the photoresist after exposed, obtain the photoresist layer with graphic structure, it should
Photoresist layer includes that the first photoresist section, corresponding second light tight region of the corresponding first light tight region formation are formed
The of the U-shaped between the first photoresist section and the second photoresist section that second photoresist section and the corresponding semi-transparent region are formed
The thickness of three photoresist sections, the first photoresist section and the second photoresist section is greater than the thickness of third photoresist section；
Step 4 performs etching the source-drain electrode metal layer, obtain corresponding to the first photoresist segment figure source electrode,
And the drain electrode corresponding to the second photoresist segment figure, the semiconductor layer is performed etching, obtains corresponding to the photoresist layer pattern
Active layer, by the ohmic contact layer of the semiconductor layer upper surface correspond to third photoresist section partial etching fall, obtain
Channel region on active layer, and obtain respectively corresponding source, the drain contact region positioned at the source, drain electrode lower section；
Step 5, the deposit passivation layer on the source electrode, drain electrode, active layer and gate insulating layer, are adopted using a mask plate
Processing is patterned to the passivation layer with one of optical cover process, obtains corresponding to the first via hole above the drain electrode；
Step 6 deposits transparent electrode layer on the passivation layer, saturating to this using one of optical cover process using a mask plate
Prescribed electrode layer is patterned processing, obtains pixel electrode.
Optionally, the step 4 specifically includes the following steps:
Step 41 carries out dry etching to the source-drain electrode metal layer using photoresist layer as shielding layer, obtains corresponding to described
The transition source-drain electrode metal layer of photoresist layer pattern carries out wet etching to the semiconductor layer, obtains corresponding to the photoresist layer
The active layer of figure；
Step 42 carries out ashing processing to photoresist layer, and thinning the first, second photoresist section simultaneously removes third photoresist section；Using
Dry etch process removes part uncovered on transition source-drain electrode metal layer, obtains corresponding to the first photoresist segment figure
Source electrode and drain electrode corresponding to the second photoresist segment figure；It is connect using ohm of wet-etching technology removal active layer upper surface
Uncovered part in contact layer, obtains the channel region on active layer, and obtains respectively corresponding below the source, drain electrode
Source, drain contact region remove remaining photoresist.
Optionally, the step 4 specifically includes the following steps:
Step 41 ', using photoresist layer be that shielding layer carries out dry etching to the source-drain electrode metal layer, obtain corresponding to described
The transition source-drain electrode metal layer of photoresist layer pattern；
Step 42 ', to photoresist layer, semiconductor layer and transition source-drain electrode metal layer carry out wet etching so that semiconductor layer
Uncovered partial etching falls, and the active layer corresponding to the photoresist layer pattern is obtained, so that the first, second photoresist section is thinning
And third photoresist section is etched away, so that the part that third photoresist section is corresponded on transition source-drain electrode metal layer is etched away,
The drain electrode corresponding to the source electrode of the first photoresist segment figure and corresponding to the second photoresist segment figure is obtained, so that on active layer
The part that third photoresist section is corresponded on the ohmic contact layer on surface is etched away, and obtains the channel region on active layer, and divided
Source, the drain contact region in the source, drain electrode lower section Dui Ying be located at, remove remaining photoresist.
The length of the semi-transparent elongated area is 1~3 μm bigger than the width in horizontal stripe portion in the semi-transparent region；Described half
The width in vertical bar portion and the width in horizontal stripe portion are all larger than 1 μm in transmission region.
The width in vertical bar portion is equal with the width in horizontal stripe portion in the semi-transparent region.
Beneficial effects of the present invention: half-tone mask plate provided by the invention, including for respectively with thin film transistor (TFT)
Source, corresponding first, second light tight region of drain locations, the U-shaped channel region for the active layer with the thin film transistor (TFT)
The semi-transparent region of the corresponding U-shaped in position, positioned at the U-shaped semi-transparent region opening and extend to outside the opening two semi-transparent
Light elongated area and remaining full transmission region；The semi-transparent elongated area can drain and ditch to avoid in forms mask plate
Edge effect is generated when road area and caused to show and cross to carve, to eliminate, yields is insufficient, yield is too low in the prior art is asked
Topic.The production method of TFT substrate provided by the invention can form channel using above-mentioned half-tone mask plate to avoid in composition
Edge effect is generated when area and caused to show and cross to carve, to eliminate the problem that yields is insufficient, yield is too low in the prior art.
For further understanding of the features and technical contents of the present invention, it please refers to below in connection with of the invention detailed
Illustrate and attached drawing, however, the drawings only provide reference and explanation, is not intended to limit the present invention.
Detailed description of the invention
With reference to the accompanying drawing, by the way that detailed description of specific embodiments of the present invention, technical solution of the present invention will be made
And other beneficial effects are apparent.
In attached drawing,
Fig. 1 is the schematic diagram of the existing step 1 that TFT substrate is made of 5Mask technique；
Fig. 2-3 is the schematic diagram of the existing step 2 that TFT substrate is made of 5Mask technique；
Fig. 4-5 is the schematic diagram of the existing step 3 that TFT substrate is made of 5Mask technique；
Fig. 6 is the schematic diagram of the existing step 4 that TFT substrate is made of 5Mask technique；
Fig. 7 is the schematic diagram of the existing step 5 that TFT substrate is made of 5Mask technique；
Fig. 8 is a kind of structural schematic diagram of existing half-tone mask plate that TFT substrate is made for 4Mask technique；
Fig. 9 is the structural schematic diagram of half-tone mask plate of the invention；
Figure 10 is the flow diagram of the production method of TFT substrate of the invention；
Figure 11 is the schematic diagram of the step 1 of the production method of TFT substrate of the invention；
Figure 12 is the schematic diagram of the step 2 of the production method of TFT substrate of the invention；
Figure 13 is the schematic diagram of the step 3 of the production method of TFT substrate of the invention；
Figure 14-16 is the schematic diagram of the step 4 of the production method of TFT substrate of the invention；
Figure 17 is the schematic diagram of the step 5 of the production method of TFT substrate of the invention；
Figure 18 is the schematic diagram of the step 6 of the production method of TFT substrate of the invention.
Specific embodiment
Further to illustrate technological means and its effect adopted by the present invention, below in conjunction with preferred implementation of the invention
Example and its attached drawing are described in detail.
Referring to Fig. 9, present invention firstly provides a kind of half-tone mask plate, including for respectively with thin film transistor (TFT)
Corresponding first, second light tight region of source, drain locations 910,920, for the U-shaped of the active layer with the thin film transistor (TFT)
The semi-transparent region 930 of the corresponding U-shaped of channel zone position, positioned at the U-shaped 930 opening of semi-transparent region and to outside the opening
The two semi-transparent elongated areas 940 extended and remaining full transmission region 950.
Specifically, first light tight region 910 includes a bar shaped portion 911, and second light tight region 920 includes
The U of second light tight region 920 is protruded into one U-shaped portion 921, the one end in the bar shaped portion 911 of first light tight region 910
Do not connect in the opening in shape portion 921 and with it, to form a U-shaped gap.
Specifically, the semi-transparent region 930 is located at and fills up first light tight region 910 and the second opaque area
U-shaped gap between domain 920, the semi-transparent region 930 is including a vertical bar portion 931 and is connected to 931 both ends of vertical bar portion
Two horizontal stripe portions 932, to form U-shaped structure.
Specifically, the semi-transparent elongated area 940 perpendicular to first light tight region 910 bar shaped portion 911 simultaneously
Extend to outside the U-shaped structure in the semi-transparent region 930, connect with the semi-transparent region 930 and block described first and is impermeable
The opening in the U-shaped gap between light region 910 and the second light tight region 920.
Specifically, the length L of the semi-transparent elongated area 940 is greater than the horizontal stripe portion 932 in the semi-transparent region 930
Width D.
Specifically, the length L of the semi-transparent elongated area 940 than in the semi-transparent region 930 horizontal stripe portion 932 it is wide
It is 1~3 μm big to spend D.
Specifically, the width in vertical bar portion 931 and the width D in horizontal stripe portion 932 are all larger than 1 μm in the semi-transparent region 930.
Specifically, the width in vertical bar portion 931 is equal with the width D in horizontal stripe portion 932 in the semi-transparent region 930.
Specifically, described two semi-transparent elongated areas 940 pass through 930 opening of the semi-transparent region setting in the U-shaped
One layer of semi-permeable membrane obtains, and the semi-permeable membrane is chromium oxide film or molybdenum silicon thin film.
Two semi-transparent extensions are arranged by the opening in the semi-transparent region 930 of U-shaped in half-tone mask plate of the invention
Region 940, so that full transmission region 950 and the engagement edge in semi-transparent region 930 extend on half-tone mask plate, partly using this
When tone mask plate is exposed display to photoresist, the developer solution that is exaggerated on photoresist is equivalent to from half-exposure region
Area is flowed to full exposure area, the generation of edge effect is avoided and caused to show and cross to carve, to eliminate the prior art
The problem that middle yields is insufficient and yield is too low.
Referring to Fig. 10, the present invention also provides a kind of production method of TFT substrate using above-mentioned half-tone mask plate, packet
Include following steps:
Step 1, as shown in figure 11, a substrate 100 is provided, on the substrate 100 deposit gate metal layer 200, use
One mask plate is patterned processing to the gate metal layer 200 using one of optical cover process, obtains grid 250.
Step 2, as shown in figure 12, is sequentially depositing gate insulating layer 300 and half on the grid 250 and substrate 100
Conductor layer 400 carries out ion doping processing to the semiconductor layer 400, and the upper surface portion of the semiconductor layer 400 is made to form Europe
Nurse contact layer 410.
Step 3, as shown in figure 13, the sedimentary origin drain metal layer 500 on the semiconductor layer 400, in the source-drain electrode
One layer of photoresist is coated on metal layer 500, this layer of photoresist is exposed using a half-tone mask plate 900.
Specifically, as shown in figure 9, the half-tone mask plate 900 includes the first, second light tight region 910,920, position
Between first light tight region 910 and the second light tight region 920 the semi-transparent region 930 of the U-shaped in gap, be located at should
930 opening of semi-transparent region of U-shaped and the two semi-transparent elongated areas 940 extended to outside the opening and remaining full impregnated
Light region 950.
Then developed with developer solution to the photoresist after exposed, obtain the photoresist layer 600 with graphic structure,
The photoresist layer 600 is impermeable including corresponding to the first photoresist section 610, corresponding described second that first light tight region 910 is formed
The first photoresist section 610 that the second photoresist section 620 and the corresponding semi-transparent region 930 that light region 920 is formed were formed be located at
The third photoresist section 630 of U-shaped between second photoresist section 620, the thickness of the first photoresist section 610 and the second photoresist section 620
Greater than the thickness of third photoresist section 630.
Specifically, first light tight region 910 includes a bar shaped portion 911, and second light tight region 920 includes
The U of second light tight region 920 is protruded into one U-shaped portion 921, the one end in the bar shaped portion 911 of first light tight region 910
Do not connect in the opening in shape portion 921 and with it, to form a U-shaped gap.
Specifically, the semi-transparent region 930 is located at and fills up first light tight region 910 and the second opaque area
U-shaped gap between domain 920, the semi-transparent region 930 is including a vertical bar portion 931 and is connected to 931 both ends of vertical bar portion
Two horizontal stripe portions 932, to form U-shaped structure.
Specifically, the semi-transparent elongated area 940 perpendicular to first light tight region 910 bar shaped portion 911 simultaneously
Extend to outside the U-shaped structure in the semi-transparent region 930, connect with the semi-transparent region 930 and block described first and is impermeable
The opening in the U-shaped gap between light region 910 and the second light tight region 920；The length L of the semi-transparent elongated area 940
Greater than the width D in the horizontal stripe portion 932 in the semi-transparent region 930.
Specifically, the length L of the semi-transparent elongated area 940 than in the semi-transparent region 930 horizontal stripe portion 932 it is wide
It is 1~3 μm big to spend D.
Specifically, the width in vertical bar portion 931 and the width D in horizontal stripe portion 932 are all larger than 1 μm in the semi-transparent region 930.
Specifically, the width in vertical bar portion 931 is equal with the width D in horizontal stripe portion 932 in the semi-transparent region 930.
Specifically, described two semi-transparent elongated areas 940 pass through 930 opening of the semi-transparent region setting in the U-shaped
One layer of semi-permeable membrane obtains, and the semi-permeable membrane is chromium oxide film or molybdenum silicon thin film.
It should be noted that the half-tone mask plate 900 as used in the step 3, is corresponding to the U-shaped of channel region
The opening in semi-transparent region 930 is provided with two semi-transparent elongated areas 940, so that full impregnated light on the half-tone mask plate 900
The engagement edge in region 950 and semi-transparent region 930 extends, and is exposed using the half-tone mask plate 900 to photoresist
When display, it is equivalent to the developer solution being exaggerated on photoresist and flows to area from half-exposure region to full exposure area, avoid
The generation of edge effect, the opening so as to avoid the first photoresist section 610 in the third photoresist section 630 of U-shaped are excessively shown
Shadow, and then avoid the hair that source-drain electrode metal layer 500 is caused source electrode to be broken by excessive etch when subsequent etching forms source electrode
It is raw.
Step 4, as illustrated in figures 14-16, performs etching the source-drain electrode metal layer 500, obtains corresponding to described first
The source electrode 510 of 610 figure of photoresist section and drain electrode 520 corresponding to 620 figure of the second photoresist section, to the semiconductor layer 400 into
Row etching, obtains the active layer 450 corresponding to 600 figure of photoresist layer, ohm of 400 upper surface of semiconductor layer is connect
Partial etching in contact layer 410 corresponding to third photoresist section 630 falls, and obtains the channel region 453 on active layer 450, and divided
Source, the drain contact region 451,452 in the source, 510,520 lower section of drain electrode Dui Ying be located at.
Specifically, the step 4 can add wet etching realization twice by dry etching twice, following step is specifically included
It is rapid:
Step 41 is that shielding layer carries out dry etching to the source-drain electrode metal layer 500 with photoresist layer 600, is corresponded to
In the transition source-drain electrode metal layer 500 ' of 600 figure of photoresist layer, wet etching is carried out to the semiconductor layer 400, is obtained
Active layer 450 corresponding to 600 figure of photoresist layer.
Step 42 carries out ashing processing to photoresist layer 600, and the first, second photoresist of thinning section 610,620 simultaneously removes third light
Hinder section 630；Using part uncovered on dry etch process removal transition source-drain electrode metal layer 500 ', obtain corresponding to institute
State the source electrode 510 of 610 figure of the first photoresist section and the drain electrode 520 corresponding to 620 figure of the second photoresist section；Using wet etching
Technique removes part uncovered on the ohmic contact layer 410 of 450 upper surface of active layer, obtains the channel on active layer 450
Area 453, and obtain respectively corresponding source, the drain contact region 451,452 positioned at the source, 510,520 lower section of drain electrode, removal is remaining
Photoresist.
Alternatively, the step 4 can also add a wet etching to realize by a dry etching, following step is specifically included
It is rapid:
Step 41 ', with photoresist layer 600 be shielding layer to the source-drain electrode metal layer 500 carry out dry etching, corresponded to
In the transition source-drain electrode metal layer 500 ' of 600 figure of photoresist layer；
Step 42 ', to photoresist layer 600, semiconductor layer 400 and transition source-drain electrode metal layer 500 ' carry out wet etching, make
It obtains partial etching uncovered on semiconductor layer 400 to fall, obtains the active layer 450 corresponding to 600 figure of photoresist layer, make
The first, second photoresist section 610,620 is thinning and third photoresist section 630 is etched away so that transition source-drain electrode metal layer
The part that third photoresist section 630 is corresponded on 500 ' is etched away, and obtains the source electrode corresponding to 610 figure of the first photoresist section
510 and corresponding to 620 figure of the second photoresist section drain electrode 520 so that right on the ohmic contact layer 410 of 450 upper surface of active layer
It answers the part of third photoresist section 630 to be etched away, obtains the channel region 453 on active layer 450, and obtain respectively corresponding positioned at institute
Source, the drain contact region 451,452 for stating source, 510,520 lower section of drain electrode, remove remaining photoresist.
Step 5, as shown in figure 17, sinks on the source electrode 510, drain electrode 520, active layer 450 and gate insulating layer 300
Product passivation layer 700 is patterned processing to the passivation layer 700 using one of optical cover process using a mask plate, is corresponded to
The first via hole 710 above the drain electrode 520；
Step 6, as shown in figure 18, deposit transparent electrode layer on the passivation layer 700, use a mask plate using together
Optical cover process is patterned processing to the transparent electrode layer, obtains pixel electrode 810.
In conclusion the present invention provides a kind of half-tone mask plate, including for respectively with the source of thin film transistor (TFT), drain electrode
Corresponding first, second light tight region in position, for corresponding with the U-shaped channel zone position of the active layer of the thin film transistor (TFT)
U-shaped semi-transparent region, the semi-transparent region opening positioned at the U-shaped and the two semi-transparent extension areas that extend to outside the opening
Domain and remaining full transmission region；The semi-transparent elongated area can be to avoid draining and production when channel region in forms mask plate
Raw edge effect and caused to show and cross to carve, to eliminate the problem that yields is insufficient, yield is too low in the prior art.The present invention
The production method of the TFT substrate of offer can generate side using above-mentioned half-tone mask plate to avoid when composition forms channel region
Edge effect and causing shows and crosses and carves, to eliminate the problem that yields is insufficient, yield is too low in the prior art.
The above for those of ordinary skill in the art can according to the technique and scheme of the present invention and technology
Other various corresponding changes and modifications are made in design, and all these change and modification all should belong to the claims in the present invention
Protection scope.
Claims (9)
1. a kind of half-tone mask plate, which is characterized in that including for corresponding with the source of thin film transistor (TFT), drain locations respectively
First, second light tight region (910,920), for corresponding with the U-shaped channel zone position of the active layer of the thin film transistor (TFT)
U-shaped semi-transparent region (930), positioned at the U-shaped semi-transparent region (930) opening and the two halves that extend to outside the opening
Light transmission elongated area (940) and remaining full transmission region (950)；
First light tight region (910) includes a bar shaped portion (911), and second light tight region (920) includes a U-shaped
Second light tight region (920) is protruded into portion (921), the one end in the bar shaped portion (911) of first light tight region (910)
U-shaped portion (921) opening in and do not connect with it, to form a U-shaped gap；
The semi-transparent region (930) is located at and fills up first light tight region (910) and the second light tight region (920)
Between U-shaped gap, the semi-transparent region (930) includes a vertical bar portion (931) and is connected to vertical bar portion (931) two
The two horizontal stripe portions (932) at end, to form U-shaped structure；
The semi-transparent elongated area (940) perpendicular to first light tight region (910) bar shaped portion (911) and to described
Extend outside the U-shaped structure of semi-transparent region (930), connect with the semi-transparent region (930) and block described first and is opaque
The opening in the U-shaped gap between region (910) and the second light tight region (920)；
The length (L) of the semi-transparent elongated area (940) is greater than the width in the horizontal stripe portion (932) of the semi-transparent region (930)
It spends (D)；
The two semi-transparent elongated area (940) is semi-transparent by one layer of semi-transparent region (930) the opening setting in the U-shaped
Film obtains, and the semi-permeable membrane is chromium oxide film or molybdenum silicon thin film.
2. half-tone mask plate as described in claim 1, which is characterized in that the length of the semi-transparent elongated area (940)
(L) width (D) than horizontal stripe portion (932) in the semi-transparent region (930) is 1~3 μm big.
3. half-tone mask plate as described in claim 1, which is characterized in that vertical bar portion in the semi-transparent region (930)
(931) width (D) of width and horizontal stripe portion (932) is all larger than 1 μm.
4. half-tone mask plate as described in claim 1, which is characterized in that vertical bar portion in the semi-transparent region (930)
(931) width is equal with width (D) of horizontal stripe portion (932).
5. a kind of production method of TFT substrate, which comprises the steps of:
Step 1 provides a substrate (100), deposits gate metal layer on the substrate (100), uses one using a mask plate
Road optical cover process is patterned processing to the gate metal layer, obtains grid (250)；
Step 2 is sequentially depositing gate insulating layer (300) and semiconductor layer on the grid (250) and substrate (100)
(400), ion doping processing is carried out to the semiconductor layer (400), the upper surface portion of the semiconductor layer (400) is made to form Europe
Nurse contact layer (410)；
Step 3, the sedimentary origin drain metal layer (500) on the semiconductor layer (400), in the source-drain electrode metal layer (500)
One layer of photoresist of upper coating, is exposed this layer of photoresist using a half-tone mask plate (900)；
The half-tone mask plate (900) include the first, second light tight region (910,920), be located at it is described first opaque
The semi-transparent region (930) of the U-shaped in gap between region (910) and the second light tight region (920), positioned at the semi-transparent of the U-shaped
Light region (930) opening and the two semi-transparent elongated areas (940) extended to outside the opening and remaining full transmission region
(950)；First light tight region (910) includes a bar shaped portion (911), and second light tight region (920) includes a U
Second light tight region is protruded into the one end in shape portion (921), the bar shaped portion (911) of first light tight region (910)
(920) do not connect in the opening of U-shaped portion (921) and with it, to form a U-shaped gap；Semi-transparent region (930) position
In and fill up the U-shaped gap between first light tight region (910) and the second light tight region (920), including a vertical bar
Portion (931) and the two horizontal stripe portions (932) for being connected to vertical bar portion (931) both ends, so that U-shaped structure is formed, it is described semi-transparent
Elongated area (940) perpendicular to first light tight region (910) bar shaped portion (911) and to the semi-transparent region
(930) extend outside U-shaped structure, connect with the semi-transparent region (930) and block first light tight region (910) with
The opening in the U-shaped gap between the second light tight region (920)；The length (L) of the semi-transparent elongated area (940) is greater than institute
State the width (D) in the horizontal stripe portion (932) in semi-transparent region (930)；
Then developed with developer solution to the photoresist after exposed, obtain the photoresist layer (600) with graphic structure, it should
Photoresist layer (600) includes the first photoresist section (610) of corresponding first light tight region (910) formation, corresponding described second
What the second photoresist section (620) and the corresponding semi-transparent region (930) that light tight region (920) is formed were formed is located at first
The third photoresist section (630) of U-shaped between photoresist section (610) and the second photoresist section (620), the first photoresist section (610) with
The thickness of second photoresist section (620) is greater than the thickness of third photoresist section (630)；
Step 4 performs etching the source-drain electrode metal layer (500), obtains corresponding to the first photoresist section (610) figure
Source electrode (510) and the drain electrode (520) for corresponding to second photoresist section (620) figure, perform etching the semiconductor layer (400),
The active layer (450) corresponding to the photoresist layer (600) figure is obtained, ohm of the semiconductor layer (400) upper surface is connect
Partial etching in contact layer (410) corresponding to third photoresist section (630) falls, and obtains the channel region (453) on active layer (450),
And obtain respectively corresponding source, drain contact region (451,452) below the source, drain electrode (510,520)；
Step 5, the deposit passivation layer on the source electrode (510), drain electrode (520), active layer (450) and gate insulating layer (300)
(700), processing is patterned to the passivation layer (700) using one of optical cover process using a mask plate, obtains corresponding to institute
State the first via hole (710) above drain electrode (520)；
Step 6 deposits transparent electrode layer on the passivation layer (700), using a mask plate using one of optical cover process to this
Transparent electrode layer is patterned processing, obtains pixel electrode (810)；
The two semi-transparent elongated area (940) is semi-transparent by one layer of semi-transparent region (930) the opening setting in the U-shaped
Film obtains, and the semi-permeable membrane is chromium oxide film or molybdenum silicon thin film.
6. the production method of TFT substrate as claimed in claim 5, which is characterized in that the step 4 specifically includes following step
It is rapid:
Step 41 is that shielding layer carries out dry etching to the source-drain electrode metal layer (500) with photoresist layer (600), is corresponded to
In the transition source-drain electrode metal layer (500 ') of the photoresist layer (600) figure, are carried out to the semiconductor layer (400) wet process quarter
Erosion obtains the active layer (450) corresponding to the photoresist layer (600) figure；
Step 42 carries out ashing processing to photoresist layer (600), and the first, second photoresist of thinning section (610,620) simultaneously removes third light
It hinders section (630)；Using part uncovered in dry etch process removal transition source-drain electrode metal layer (500 '), corresponded to
Source electrode (510) in the first photoresist section (610) figure and the drain electrode (520) corresponding to second photoresist section (620) figure；
Uncovered part, is had on ohmic contact layer (410) using wet-etching technology removal active layer (450) upper surface
Channel region (453) in active layer (450), and obtain respectively corresponding the source below the source, drain electrode (510,520), drain electrode
Contact zone (451,452), removes remaining photoresist.
7. the production method of TFT substrate as claimed in claim 5, which is characterized in that the step 4 specifically includes following step
It is rapid:
Step 41 ', with photoresist layer (600) be shielding layer to the source-drain electrode metal layer (500) carry out dry etching, corresponded to
In the transition source-drain electrode metal layer (500 ') of the photoresist layer (600) figure；
Step 42 ', to photoresist layer (600), semiconductor layer (400) and transition source-drain electrode metal layer (500 ') carry out wet etching,
So that partial etching uncovered on semiconductor layer (400) falls, the active layer corresponding to the photoresist layer (600) figure is obtained
(450), so that the first, second photoresist section (610,620) is thinning and be etched away third photoresist section (630), so that transition
The part that third photoresist section (630) is corresponded on source-drain electrode metal layer (500 ') is etched away, and obtains corresponding to first photoresist
The source electrode (510) of section (610) figure and the drain electrode (520) for corresponding to second photoresist section (620) figure, so that active layer (450)
The part that third photoresist section (630) is corresponded on the ohmic contact layer (410) of upper surface is etched away, and is obtained on active layer (450)
Channel region (453), and obtain respectively corresponding the source below the source, drain electrode (510,520), drain contact region (451,
452) remaining photoresist, is removed.
8. the production method of TFT substrate as claimed in claim 5, which is characterized in that the semi-transparent elongated area (940)
Length (L) is 1~3 μm bigger than the width (D) in horizontal stripe portion (932) in the semi-transparent region (930)；The semi-transparent region
(930) width of vertical bar portion (931) and the width (D) of horizontal stripe portion (932) are all larger than 1 μm in.
9. the production method of TFT substrate as claimed in claim 5, which is characterized in that vertical bar in the semi-transparent region (930)
The width in portion (931) is equal with width (D) of horizontal stripe portion (932).
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610402645.7A CN105892221B (en) | 2016-06-07 | 2016-06-07 | The production method of half-tone mask plate and TFT substrate |
| PCT/CN2016/089958 WO2017210958A1 (en) | 2016-06-07 | 2016-07-14 | Halftone mask and method for manufacturing tft substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610402645.7A CN105892221B (en) | 2016-06-07 | 2016-06-07 | The production method of half-tone mask plate and TFT substrate |
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| CN105892221A CN105892221A (en) | 2016-08-24 |
| CN105892221B true CN105892221B (en) | 2019-10-01 |
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| CN106783953B (en) * | 2016-12-26 | 2019-05-31 | 武汉华星光电技术有限公司 | Thin film transistor and its manufacturing method |
| CN111048525A (en) * | 2019-11-27 | 2020-04-21 | Tcl华星光电技术有限公司 | Preparation method of array substrate and array substrate |
| CN111562717A (en) * | 2020-04-30 | 2020-08-21 | 南昌欧菲显示科技有限公司 | Photomask, touch module and preparation method thereof, and electronic equipment |
| CN111540757B (en) * | 2020-05-07 | 2024-03-05 | 武汉华星光电技术有限公司 | Display panel, preparation method thereof and display device |
| CN112526818A (en) * | 2020-12-02 | 2021-03-19 | 北海惠科光电技术有限公司 | Half-tone mask and manufacturing method of thin film transistor array substrate |
| CN113267955B (en) * | 2021-05-17 | 2023-05-09 | 京东方科技集团股份有限公司 | Semi-permeable mask plate and array substrate manufacturing method |
| CN113467179B (en) * | 2021-06-23 | 2022-06-03 | 惠科股份有限公司 | Mask, manufacturing method of array substrate and display panel |
| CN113488517B (en) * | 2021-06-28 | 2022-09-27 | 深圳市华星光电半导体显示技术有限公司 | Manufacturing method of display panel and photomask |
| CN113759655A (en) * | 2021-08-19 | 2021-12-07 | 惠科股份有限公司 | Mask, manufacturing method of array substrate and display panel |
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| JP4522660B2 (en) * | 2003-03-14 | 2010-08-11 | シャープ株式会社 | Method for manufacturing thin film transistor substrate |
| CN2862120Y (en) * | 2005-10-13 | 2007-01-24 | 鸿富锦精密工业（深圳）有限公司 | Producing device for thin film transistor and light shield employed |
| KR101211086B1 (en) * | 2006-02-03 | 2012-12-12 | 삼성디스플레이 주식회사 | Thin film transistor substrate and metho of manufacturing the same and mask for manufacturing thin film transistor substrate |
| TWI309089B (en) * | 2006-08-04 | 2009-04-21 | Au Optronics Corp | Fabrication method of active device array substrate |
| CN101315517A (en) * | 2007-05-30 | 2008-12-03 | 北京京东方光电科技有限公司 | Mask plate of image element groove section and thin-film transistor using the same |
| US9720295B2 (en) * | 2011-09-27 | 2017-08-01 | Lg Display Co., Ltd. | Liquid crystal display device and method for manufacturing the same |
| CN102799059B (en) * | 2012-08-15 | 2014-10-15 | 京东方科技集团股份有限公司 | Grayscale mask, array substrate and its preparation method thereof, and display device |
| CN105137710A (en) * | 2015-07-15 | 2015-12-09 | 深圳市华星光电技术有限公司 | Mask and fabrication method of thin film transistor |
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| CN105892221A (en) | 2016-08-24 |
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