CN105868114B - FPGA software systems and its each module test system and method - Google Patents
FPGA software systems and its each module test system and method Download PDFInfo
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- CN105868114B CN105868114B CN201610199882.8A CN201610199882A CN105868114B CN 105868114 B CN105868114 B CN 105868114B CN 201610199882 A CN201610199882 A CN 201610199882A CN 105868114 B CN105868114 B CN 105868114B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3684—Test management for test design, e.g. generating new test cases
Abstract
The invention belongs to technical field of integrated circuits, specially FPGA software systems and its each module test system and method.Present system includes the script file and test case of software test platform, whole script file, modules；First by building test platform, test environment needed for building Run Script file；By script file, the modules of FPGA software design process are connected in sequence；It is constantly running test circuit, realizes the test to FPGA software systems and each module.The present invention can be good at completing the test to FPGA software, have the characteristics that testing cost is low, portable good, versatile.
Description
Technical field
The invention belongs to technical field of integrated circuits, and in particular to a kind of FPGA software testing system and method.
Background technique
Field programmable gate array FPGA(Field Programmable Gate Array) be PAL, GAL,
The product further developed on the basis of the programming devices such as CPLD.It is as one in the field specific integrated circuit (ASIC)
It plants semi-custom circuit and occurs.Fpga chip is the main hardware platform of current Design of Digital System, and main feature is exactly
It can be configured and be programmed by software by user completely, to complete certain specific function, and can be repeatedly erasable.?
It when modification and upgrading, is not required to extraly change hardware design, only modification on computers and more new procedures, make hardware design work
It is made for software development work, the period of system design is shortened, improves the flexibility of realization and reduce costs.
FPGA software design process uses top down design method, and entire design cycle is followed successively by comprehensive by module division
The modules such as conjunction, packing, layout, wiring, static timing analysis, bit stream generation.It is usually hardware configuration description language that it, which is inputted,
(Hardware Description Language, HDL) or circuit design drawing (Schematic).Integration module be responsible for by
The comprehensive basic hardware unit for being FPGA of user-in file.Packetization module is responsible for multiple basic logic units being bundled to granularity
In thicker programmable logic resource.Layout modules are responsible for for the circuit meshwork list after being packaged being placed on the rational position of chip,
And it is made to meet given constraint.Interconnection module utilizes programmable interconnection resource, determines the specific connection mode between pin.It is quiet
State Time-Series analysis module is responsible for calculating the maximum operation frequency that configuration circuit can achieve on FPGA.Bit stream generation module be responsible for by
Net meter file is converted to bit stream file after wiring.
FPGA scale is increasing at present, and which is embedded various IP kernels, such as DSP, BRAM, CPU, cad tools are answered
Miscellaneous degree is also higher and higher, also increasing in software overall operation time and the finally influence to circuit realization performance.This is just needed
It wants easily to test FPGA software systems and modules, to improve software performance.Domestic and foreign literature pair at present
It is relatively fewer in the research of FPGA software test.How at low cost, easily carrying out FPGA software test is one and is worth grinding
The problem of studying carefully.
Summary of the invention
The purpose of the present invention is to provide a kind of portability it is good, at low cost, versatile to FPGA software systems and
The system and method that its each module is tested.
The present invention proposes that FPGA software systems and its each module test system, block diagram are as shown in Figure 1, comprising: software is surveyed
Try the script file and test case of platform, whole script file, modules；Wherein, software test platform is for providing survey
Trial run environment；Sequence of the whole script file according to FPGA software flow, modules of connecting, and provide needed for modules
Operating parameter, the connection type of module and sequence can be as shown in Figure 3；The script file of modules respectively specifies that respectively
Execution program, command line parameter inspection, log generate etc.；Test case provides the letter of all test circuits under test platform
Breath.
The module script file, comprising: integration module script, packetization module script, layout modules script are routed mould
Block script, bit stream generation module, static timing analysis module, etc..
The present invention proposes FPGA software systems and its each module test method, is using software test platform, firstly, passing through
The script file of modules determines that respective execution program, command line parameter inspection, log generate；Then, it is determined that test is real
Example list provides the information of all test circuits under test platform；Finally, by whole script file, by FPGA software flow
All modules connect in sequence, and successively provide the operating parameter of modules, realize batch testing circuit from
Dynamicization test, completes the test to FPGA software systems.
The present invention can complete the test to FPGA software systems, and the content of test includes: the function of modules, interface
Test, the test of software systems allomeric function, software systems runing time, memory consumption, resource utilization, maximum operation frequency
Equal performance tests.
Compared to traditional single FPGA software test, the present invention can carry out batch example after configuring running environment
Automatic test, reduce the human cost and time cost of test significantly, and correlation report can be provided for software
Analysis, it is portable good, at low cost, versatile to have the characteristics that.
Detailed description of the invention
Fig. 1 is FPGA software testing system block diagram.
Fig. 2 is one of the interface of test macro.
One of Fig. 3 module and the connection type of sequence.
Specific embodiment
System of the invention realizes that block diagram is as shown in Figure 1 substantially.
Software test platform be by operation Microsoft Windows operating system computer, test platform
Building can be there are many mode, such as the tcl script test platform constructed using Cygwin, here Cygwin be one
The class UNIX simulated environment run on windows platform is the free software of cygnus solutions company exploitation.Operation
The shell environment that a similar linux can be obtained after Cygwin, can run tcl script later.And tcl(Tool Command
Language it is) a kind of general scripting language, is often used in Script Programming and test etc..System is tested in this way in situation
The interface of system is as shown in Figure 2.
Whole script file is the core of entire test platform, it is responsible for all modules FPGA software flow according to suitable
Sequence is connected, and provides the operating parameter of modules.Wherein all modules and sequence can be there are many modes, as Fig. 3 is
One of them, i.e., successively are as follows: integration module script, packetization module script, layout modules script, interconnection module script, bit stream are raw
At module and static timing analysis module.The output file of each module is the input file of next module, software systems fortune
The bit stream file that can be used for FPGA program downloads can be generated after row.Each module can export corresponding log text simultaneously
Part, for correlation output information in logging software operational process.
The script file of modules successively specifies the execution program of separate modular, command line parameter in FPGA software flow
It checks, log generation, and be called and execute in whole script file.
The absolute path of all test examples under test platform is provided in test case list, wherein example covers FPGA
Middle different scales, different function and different resource service condition.
Testing process: opening test platform, enter under the catalogue of associated documents, real using above-mentioned test script and test
Example carries out automatic test.Test platform can execute next test case automatically after having executed a test case, until
All examples in specified test list all complete by operation.After end of run, test platform, which counts, to be successfully tested and surveys
The example number of failure, i.e. Total pass/fail are tried, and provides runing time, memory consumption, resource utilization, maximum work
The information such as working frequency, it is convenient that the function and performance of software are improved and promoted.
The present invention is especially convenient to the realization of FPGA software test, has testing cost low, portable good, versatile
The features such as.
Claims (1)
1. a kind of FPGA software systems and its each module test system, characterized by comprising: software test platform, whole script
The script file and test case of file, modules；Wherein, software test platform is for providing test run environment；It is whole
Sequence of the script file according to FPGA software flow, modules of connecting, and operating parameter needed for providing modules, module
And the connection type of sequence；The script file of modules respectively specifies that respective execution program, command line parameter inspection and day
Will generates；Test case provides the information of all test circuits under test platform with tabular form；
The module script file, comprising: integration module script, packetization module script, layout modules script, interconnection module foot
This, bit stream generation module, static timing analysis module；
Wherein, the content of test includes: the function and interface testing of modules, the test of software systems allomeric function, software
The test of system operation time, memory consumption, resource utilization and maximum operation frequency；
The process of test are as follows: software test platform is utilized, firstly, determining respective execution by the script file of modules
Program, command line parameter inspection and log generate；Then, it is determined that test case list, provides all test electricity under test platform
The information on road；Finally, all modules of FPGA software flow are connected in sequence by whole script file, and according to
The secondary operating parameter for providing modules realizes the automatic test of batch testing circuit, completes the survey to FPGA software systems
Examination.
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| CN105868114B true CN105868114B (en) | 2019-04-05 |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107977312B (en) * | 2017-11-21 | 2020-07-14 | 北京临近空间飞行器系统工程研究所 | Software system test verification method based on complex interface time sequence |
| CN109614339B (en) * | 2018-12-27 | 2020-01-21 | 四川新网银行股份有限公司 | Automatic expansion method based on multiple sets of test environments |
| CN109885438A (en) * | 2019-02-27 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of FPGA method for testing reliability, system, terminal and storage medium |
| CN110750462A (en) * | 2019-10-29 | 2020-02-04 | 西安奇维科技有限公司 | FPGA white box test platform |
| CN111123084B (en) * | 2019-12-11 | 2022-03-01 | 中国电子科技集团公司第二十研究所 | TCL language-based digital circuit rapid test method |
| CN111428431B (en) * | 2020-02-28 | 2024-02-02 | 中科亿海微电子科技（苏州）有限公司 | Automatic test and recording method and system supporting EDA software |
| CN111338326B (en) * | 2020-04-07 | 2022-11-11 | 华北水利水电大学 | FPGA general IO interface test device and method |
| CN113435149B (en) * | 2021-06-25 | 2023-08-18 | 无锡中微亿芯有限公司 | Test case automatic generation method for optimizing FPGA comprehensive effect |
| CN114661615B (en) * | 2022-04-11 | 2024-01-30 | 成都迪真计算机科技有限公司 | FPGA software testing method and device |
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