CN105866519B - A kind of zero cross detection circuit being compatible with a variety of DC-to-DC switching circuits - Google Patents
A kind of zero cross detection circuit being compatible with a variety of DC-to-DC switching circuits Download PDFInfo
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- CN105866519B CN105866519B CN201610219282.3A CN201610219282A CN105866519B CN 105866519 B CN105866519 B CN 105866519B CN 201610219282 A CN201610219282 A CN 201610219282A CN 105866519 B CN105866519 B CN 105866519B
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Abstract
The invention discloses a kind of zero cross detection circuits for being compatible with a variety of DC-to-DC switching circuits.Wherein, the circuit includes: DC power level circuit, mode switch circuit and zero current detection core circuit, wherein, mode switch circuit, it is electrically connected with DC power level circuit, for receiving the first signal group of DC power level circuit output, and according to the corresponding circuit-mode of the first signal group selection, wherein, circuit-mode includes: Buck conversion circuit and boost chopper；Zero current detection core circuit, is electrically connected with mode switch circuit, the signal of the circuit output for selecting in acquisition mode switching circuit.The present invention is solved due to needing to separately design two kinds of frameworks of at least BUCK or BOOST two kinds of circuits in same circuit in the prior art, and caused design cost is high, realizes the high technical problem of circuit integration difficulty.
Description
Technical field
The present invention relates to circuit design field, a variety of DC-to-DC switching circuits are compatible in particular to a kind of
Zero cross detection circuit.
Background technique
It include simultaneously buck in existing Power Management Unit (Power Management Unit, abbreviation PMU) system
Two kinds of DC-DC circuits (DC-DC) of translation circuit (BUCK) and boost type translation circuit (BOOST).But PMU system is logical
It often needs to realize BUCK electricity using two kinds of zero current detecting circuits (Zero Current Detect, abbreviation ZCD) to meet respectively
The requirement on road and BOOST circuit.
For above-mentioned due to being separately designed in the prior art in same circuit needs to two kinds of frameworks of at least BUCK or BOOST
Two kinds of circuits, caused design cost is high, realizes the difficult problem of circuit integration, not yet proposes effective solution side at present
Case.
Summary of the invention
The embodiment of the invention provides a kind of zero cross detection circuits for being compatible with a variety of DC-to-DC switching circuits, at least
It solves to lead due to separately designing two kinds of circuits to two kinds of frameworks of at least BUCK or BOOST in same circuit needs in the prior art
The design cost of cause is high, realizes the high technical problem of circuit integration difficulty.
According to an aspect of an embodiment of the present invention, a kind of zero passage for being compatible with a variety of DC-to-DC switching circuits is provided
Detection circuit, comprising: DC power level circuit, mode switch circuit and zero current detection core circuit, wherein mode switch electricity
Road is electrically connected with DC power level circuit, is believed for receiving the first signal group of DC power level circuit output, and according to first
Number corresponding circuit-mode of group selection, wherein circuit-mode includes: Buck conversion circuit and boost chopper；Zero current
Core circuit is detected, is electrically connected with mode switch circuit, the signal of the circuit output for being selected in acquisition mode switching circuit.
In embodiments of the present invention, it by mode switch circuit, is electrically connected with DC power level circuit, for receiving direct current
First signal group of power stage circuit output, and according to the corresponding circuit-mode of the first signal group selection, wherein circuit-mode packet
It includes: Buck conversion circuit and boost chopper；Zero current detection core circuit, is electrically connected with mode switch circuit, is used for
The signal of the circuit output selected in acquisition mode switching circuit has reached two kinds of different circuits while being compatible with same circuit structure
Purpose under frame reduces the technical effect of circuit integration difficulty to realize saving design cost, and then solves due to existing
Have in technology and two kinds of circuits are separately designed to two kinds of frameworks of at least BUCK or BOOST in same circuit needs, it is caused to be designed to
This height realizes the high technical problem of circuit integration difficulty.
Detailed description of the invention
The drawings described herein are used to provide a further understanding of the present invention, constitutes part of this application, this hair
Bright illustrative embodiments and their description are used to explain the present invention, and are not constituted improper limitations of the present invention.In the accompanying drawings:
Fig. 1 is the structure of the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility according to an embodiment of the present invention
Schematic diagram；
Fig. 2 is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
Structural schematic diagram；
Fig. 3 is in a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
Simulation BOOST mode structural schematic diagram；
Fig. 4 is in a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
BOOST power stage circuit structural schematic diagram；
Fig. 5 is in a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
Simulation BUCK mode structural schematic diagram；
Fig. 6 is in a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
BUCK power stage circuit structural schematic diagram；
Fig. 7 a is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit first stage schematic illustration；
Fig. 7 b is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit second stage schematic illustration；
Fig. 8 a is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit in first order circuit first stage schematic illustration；
Fig. 8 b is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit in first order circuit second stage schematic illustration；
Fig. 9 a is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit in second level circuit first stage schematic illustration；
Fig. 9 b is a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
In zero current detection core circuit in second level circuit second stage schematic illustration.
Specific embodiment
In order to enable those skilled in the art to better understand the solution of the present invention, below in conjunction in the embodiment of the present invention
Attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is only
The embodiment of a part of the invention, instead of all the embodiments.Based on the embodiments of the present invention, ordinary skill people
The model that the present invention protects all should belong in member's every other embodiment obtained without making creative work
It encloses.
It should be noted that description and claims of this specification and term " first " in above-mentioned attached drawing, "
Two " etc. be to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should be understood that using in this way
Data be interchangeable under appropriate circumstances, so as to the embodiment of the present invention described herein can in addition to illustrating herein or
Sequence other than those of description is implemented.In addition, term " includes " and " having " and their any deformation, it is intended that cover
Cover it is non-exclusive include, for example, the process, method, system, product or equipment for containing a series of steps or units are not necessarily limited to
Step or unit those of is clearly listed, but may include be not clearly listed or for these process, methods, product
Or other step or units that equipment is intrinsic.
According to embodiments of the present invention, it is real to provide a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits
Example is applied, Fig. 1 is that the structure of the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility according to an embodiment of the present invention is shown
It is intended to, as shown in Figure 1, the circuit includes: DC power level circuit 12, mode switch circuit 14 and zero current detection core circuit
16, wherein
Mode switch circuit 14 is electrically connected with DC power level circuit 12, is exported for receiving DC power level circuit 12
The first signal group, and according to the corresponding circuit-mode of the first signal group selection, wherein circuit-mode includes: buck converter
Circuit and boost chopper；
Zero current detection core circuit 16 is electrically connected with mode switch circuit 14, in acquisition mode switching circuit 14
The signal of the circuit output of selection.
Specifically, the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility provided by the embodiments of the present application can be with
Applied to zero current detecting circuit (Zero Current Detect, abbreviation ZCD), mode switch circuit 14 by with direct current function
Rate grade circuit 12 is electrically connected, and receives the first signal group that DC power level circuit 12 exports, and according to the first signal group selection pair
The circuit-mode answered, wherein circuit-mode includes: Buck conversion circuit and boost chopper, passes through the correspondence chosen
Circuit-mode export corresponding vp, vcom and vn signal, zero current detection core circuit 16 is electrically connected with mode switch circuit 14
It connects, vp, vcom and vn signal that acquisition mode switching circuit 14 exports, and is sampled and compared according to vp, vcom and vn signal
Compared with, finally export zero cross detection circuit output signal.Fig. 2 is a variety of DC to DC of a kind of compatibility according to an embodiment of the present invention
The structural schematic diagram of the zero cross detection circuit of conversion circuit divides as shown in Figure 2 as shown in Fig. 2, ZCD system includes two parts
It Wei not zcd mode switch (zcd mode switch) and zcd core (zcd_core).DC to DC (Direct in Fig. 2
Current, abbreviation DCDC) power stage circuit be controll plant, zcd mode switch circuit acquire DCDC power stage circuit it is defeated
VOUT, SW and GND signal out is (that is, the first signal group in the embodiment of the present application is that mode switch circuit 14 receives direct current function
VOUT, SW and the GND signal that rate grade circuit 12 exports), it is selected by the circuit-mode of zcd mode switch circuit, output
Vp, vcom and vn signal of zcd_core circuit are triggered, is finally believed by zcd_core circuit according to vp, vcom and the vn received
It number is sampled and is compared, the zero-current point of output zero cross detection circuit output signal zcd_out reversion, wherein direct current function
Rate grade circuit 12 is denoted as DCDC Power stage, and mode switch circuit 14 is denoted as zcd mode switch, zero current detection core
Electrocardio road 16 is denoted as zcd_core.
Herein it should be noted that the circuit-mode via zcd mode switch circuit selects, output triggering zcd_
Vp, vcom and vn signal of core circuit, respectively positive pressure input signal, common mode input signal and the negative pressure of zcd_core circuit
Input signal.
To sum up, the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility provided by the embodiments of the present application can answer
For Power Management Unit (Power Management Unit, abbreviation PMU) system, especially by mode switch circuit 14
Switch conversion so that can in the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility provided by the embodiments of the present application
Simultaneously to include two kinds of DC circuit DCDC frameworks of BUCK Buck conversion circuit and BOOST boost chopper, solve existing
Design cost can not be reduced, and realize collection in same circuit framework while compatible BUCK and BOOST circuit by having in technology
At the difficulty of circuit.
From the foregoing, it will be observed that the zero cross detection circuit of a variety of DC-to-DC switching circuits of the compatibility provided in the embodiment of the present application
It can be converted in BUCK circuit and BOOST circuit both of which by the switching in mode switch circuit 14.Simultaneously originally
Apply for that embodiment in such a way that zero current detection core circuit 16 samples and disappears reconciliation AC signal coupling, eliminates comparator
The influence of error itself and DCDC output ripple and Earth noise to zero passage detection point precision.
In the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility provided in an embodiment of the present invention, pass through mode
Switching circuit is electrically connected with DC power level circuit, for receiving the first signal group of DC power level circuit output, and foundation
The corresponding circuit-mode of first signal group selection, wherein circuit-mode includes: Buck conversion circuit and boost chopper；
Zero current detection core circuit, is electrically connected with mode switch circuit, the circuit output for selecting in acquisition mode switching circuit
Signal, achieved the purpose that two kinds of different circuits while being compatible under same circuit architecture, be designed to realize saving
This, reduces the technical effect of circuit integration difficulty, and then solves due to needing in the prior art in same circuit at least
Two kinds of frameworks of BUCK or BOOST separately design two kinds of circuits, and caused design cost is high, realize the high technology of circuit integration difficulty
Problem.
Optionally, include voltage output signal, exchange at least two groups signal in signal or ground signalling in the first signal group
In the case where, mode switch circuit 14 includes: first switch group or second switch group, wherein
When the signal in the first signal group received is voltage output signal and exchange signal, it is closed first switch
Group disconnects second switch group；
When the signal in the first signal group received is exchange signal and ground signalling, first switch group is disconnected, is closed
Close second switch group.
Specifically, opening and closing simulation BUCK or BOOST by control switch in mode switch circuit 14 in the embodiment of the present application
Two kinds of circuits, wherein when simulating BOOST circuit, mode switch circuit 14 is by reception voltage output signal and exchanges signal,
First switch group closure is controlled, and disconnects second switch group simulation BOOST circuit；When simulating BUCK circuit, mode switch electricity
Road 14 is disconnected by receiving exchange signal and ground signalling, control first switch group, and is closed second switch group simulation BUCK electricity
Road.
Optionally, one end in first switch group and the voltage output end in DC power level circuit and signal end electricity is exchanged
It connects, the other end in first switch group is electrically connected with zero current detection core circuit, for being to rise in the circuit-mode selected
When pressing chopper circuit, to the triggering of zero current detection core circuit to the sample detecting of boost chopper.
Further, optionally, first switch group includes: first switch, second switch and third switch, wherein
One end in first switch and the second switch is electrically connected with the voltage output end in DC power level circuit 12, and first
The other end in switch and second switch respectively in zero current detection core circuit 16 the end vp and the end vcom be electrically connected,
DC power level circuit 12 for will receive output voltage input zero current detection core circuit 16 in the end vp and
The end vcom；
One end in third switch is electrically connected with the signal end that exchanges in DC power level circuit, another in third switch
End is electrically connected with the end vn in zero current detection core circuit, and the exchange signal of the DC power level circuit for will receive is defeated
Enter the end vn in zero current detection core circuit.
Specifically, Fig. 3 is a kind of zero passage inspection for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
The structural schematic diagram of simulation BOOST mode in slowdown monitoring circuit, as shown in figure 3, first switch, second switch in first switch group
It can be K1, K3 and K5 in Fig. 3 with third switch, as shown in figure 3, connecing the voltage output of DC power level circuit 12 on the left of K1
It holds (that is, vout in Fig. 3), right side connects the end vp in zero current detection core circuit 16 (that is, zcd_core shown in Fig. 3)；Its
In, the end vp is the positive pressure input signal end of zero current detection core circuit 16；
The voltage output end (that is, vout in Fig. 3) of DC power level circuit 12 is connect on the left of K3, right side connects zero current detection
The end vcom in core circuit 16 (that is, zcd_core shown in Fig. 3)；Wherein, the end vcom is zero current detection core circuit 16
Common mode input signal end；
The exchange signal end (that is, end sw in Fig. 3) of DC power level circuit 12 is connect on the left of K5, right side connects zero current detection
The end vn in core circuit 16 (that is, zcd_core shown in Fig. 3).To sum up, it is closed in BOOST mode lower switch K1, K3 and K5,
K2, K4 and K6 are disconnected.Phase2 inductance release can the stage, by detection MN pipe drain terminal (SW) and source (GND) voltage difference come
Triggering zero current protection, (when the electric current in inductive current is 0,0) pressure difference between SW and GND is；Wherein, vn is zero current
Detect the negative pressure input signal end of core circuit 16.
From the foregoing, it will be observed that zcd mode switch circuit shown in Fig. 3 simulates BOOST simulation, Fig. 4 is to implement according to the present invention
The structural representation of BOOST power stage circuit in a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits of example
Figure, in Fig. 4, the variation of signal occurs according to clock signal ck for BOOST circuit, as shown in figure 4, BOOST circuit is according to clock
The variation of signal occurs for signal ck, as shown in figure 4, inductance L1 connects with MP pipe, wherein L1 connects the drain electrode of MP pipe, the grid of MP pipe
Pole is electrically connected with clock signal ck, and the source electrode of MP pipe is electrically connected with capacitor Cout, and the grid of MN pipe is electrically connected with ck, and L1 connects MN pipe
Drain electrode electrical connection, the source electrode of MN pipe respectively with capacitor and be electrically connected, for power stage circuit, phase phase1 is that inductance stores up
Energy stage, phase phase2 are that inductance releases the energy stage.
Optionally, one end in second switch group in DC power level circuit exchange signal end and ground terminal is electrically connected
It connects, the other end in second switch group is electrically connected with zero current detection core circuit, for being decompression in the circuit-mode selected
When formula translation circuit, to the triggering of zero current detection core circuit to the sample detecting of Buck conversion circuit.
Further, optionally, second switch group includes: the 4th switch, the 5th switch and the 6th switch, wherein
4th switch one end in DC power level circuit exchange signal end electrical connection, the 4th switch the other end and
The end vp electrical connection in zero current detection core circuit, the exchange signal input zero of the DC power level circuit for will receive
The end vp in current detecting core circuit；
One end of 5th switch and the 6th switch is electrically connected with the ground terminal in DC power level circuit, and the 5th switchs and the
Six switch the other ends respectively in zero current detection core circuit the end vcom and the end vn be electrically connected, for straight by what is received
Flow the end vcom and the end vn in the ground signalling input zero current detection core circuit of power stage circuit.
Specifically, Fig. 5 is a kind of zero passage inspection for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
The structural schematic diagram of simulation BUCK mode in slowdown monitoring circuit, as shown in figure 5, the in second switch group the 4th switchs, the 5th switch
It can be K2, K4 and K6 in Fig. 5 with the 6th switch, as shown in figure 5, connecing the exchange signal of DC power level circuit 12 on the left of K2
It holds (that is, sw in Fig. 5), right side connects the end vp in zero current detection core circuit 16 (that is, zcd_core shown in Fig. 5)；
The ground terminal (that is, gnd in Fig. 5) of DC power level circuit 12 is connect on the left of K4, right side connects zero current detection core
The end vcom in circuit 16 (that is, zcd_core shown in Fig. 5)；
The ground terminal (that is, gnd in Fig. 5) of DC power level circuit 12 is connect on the left of K6, right side connects zero current detection core
The end vn in circuit 16 (that is, zcd_cord shown in Fig. 5).It is closed in BUCK mode lower switch K2, K4 and K6, K1, K3 and K5 are disconnected
It opens.The energy stage is released in phase2 inductance, zero current is triggered by the voltage difference of detection MP pipe drain terminal (SW) and source (VOUT)
(when the electric current in inductive current is 0,0) pressure difference between SW and VOUT is for protection.
From the foregoing, it will be observed that zcd mode switch shown in fig. 5 simulates BUCK simulation, Fig. 6 is according to an embodiment of the present invention one
The structural schematic diagram of BUCK power stage circuit in the zero cross detection circuit of the compatible a variety of DC-to-DC switching circuits of kind, is scheming
In 6, the variation of signal occurs according to clock signal ck for BUCK circuit, as shown in fig. 6, the grid of MP pipe connects ck signal, drain electrode point
Be not electrically connected with the drain electrode of inductance L1 and MN pipe, the source electrode of MN pipe respectively with capacitor Cout and be electrically connected, MP pipe source electrode with it is defeated
Enter Vin is held to be electrically connected, wherein phase phase1 is the inductive energy storage stage, and phase phase2 is that inductance releases the energy stage.
Optionally, zero current detection core circuit includes: first order circuit, second level circuit, third switching group, the 4th opens
Pass group, first capacitor and the second capacitor, wherein
One end of first switch in third switching group is electrically connected with the end vp, the first switch in third switching group it is another
End respectively in the 4th switching group first switch and first capacitor be electrically connected, one end of the second switch in third switching group and
The electrical connection of the end vn, the other end of the second switch in third switching group respectively with the second switch and the second electricity in the 4th switching group
Hold electrical connection, wherein the first switch and the second switch series connection in the 4th switching group, and vcom is terminated in the 4th switching group
Between first switch and the second switch；
First capacitor respectively in the 4th switching group third switch and first order circuit be electrically connected, the second capacitor respectively with
The 4th switch and the electrical connection of first order circuit, first order circuit in 4th switching group are electrically connected with second level circuit, wherein the
Third switch and the 4th switch and first order circuit in parallel in four switching groups；
When controlling first order circuit and second level circuit in the first stage, third switching group is disconnected, is closed the 4th switching group,
For eliminating the relative error in first order circuit and second level circuit；
When second stage controls first order circuit and second level circuit, it is closed third switching group, disconnects the 4th switching group,
For triggering the sampling process in first order circuit and second level circuit.
Specifically, in the first stage, Fig. 7 a is a kind of a variety of DC to DC conversions of compatibility according to an embodiment of the present invention
The schematic illustration of the first stage of zero current detection core circuit in the zero cross detection circuit of circuit, as shown in Figure 7a, the
First switch and the second switch in three switching groups can be the S5 and S6 in Fig. 7 a, first switch in the 4th switching group, the
Two switches, third switch and the 4th switch can be S3, S4, S1 and S2 in Fig. 7 a, and first capacitor can be the C1 in Fig. 7 a,
Second capacitor can be denoted as stage1 for the C2 in Fig. 7 a, first order circuit, and second level circuit is denoted as stage2；In the first stage
Phase1, switch S1, S2, S3 and S4 closure, S5 and S6 are disconnected, and zcd enters the disappearance tune stage.Eliminate the comparison of comparator itself
Error.Wherein, s1p and s1n is respectively the differential input signal of vp Yu vcom and vn and vcom, that is, s1p is the difference of vp and vcom
Divide input signal；S1n is the differential input signal of vn and vcom.
In second stage, Fig. 7 b is a kind of mistake for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
The schematic illustration of the second stage of zero current detection core circuit in zero detection circuit, as shown in Figure 7b, corresponding above-mentioned figure
It shown in 7a, is disconnected in second stage phase2, switch S1, S2, S3 and S4, S5 and S6 closure, zcd enter sampling comparison phase.
Further, optionally, first order circuit includes: that the first transistorlike group, the second transistorlike group and the 7th are opened
It closes, wherein
The first transistor, second transistor, third transistor and the 4th coupled in parallel in first transistorlike group,
In, second transistor is connected with the 7th switch, and third transistor is connected with the first transistor in the second transistorlike, and the 4th is brilliant
Body pipe is connected with the second transistor in the second transistorlike, for the closure and unlatching by the 7th switch of control, control the
Primary circuit is adjusted to the sampling process in second stage by the elimination relative error of first stage.
Specifically, in the first stage, Fig. 8 a is that a kind of compatibility according to an embodiment of the present invention is a variety of referring to Fig. 7 a and Fig. 7 b
The first stage of first order circuit in zero current detection core circuit in the zero cross detection circuit of DC-to-DC switching circuit
Schematic illustration, as shown in Figure 8 a, phase1 in the first stage, switch Sa are opened, and are introduced one and are pretended offset voltage Vos0
The tune stage.Vos0 triggers ZCD in advance, can compensate error caused by ZCD transient response in this way；
In second stage, Fig. 8 b is a kind of mistake for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
The schematic illustration of the second stage of first order circuit in zero current detection core circuit in zero detection circuit, such as Fig. 8 b institute
Show, is closed in second stage phase2, switch Sa, ZCD enters comparison phase.
Wherein, as figures 8 a and 8 b show, the first transistor in the first transistorlike group, second transistor, third are brilliant
Body pipe and the 4th transistor are denoted as respectively: MP1, MP2, MP3 and MP4；The first transistor and second in second transistorlike is brilliant
Body pipe is denoted as respectively: MN1 and MN2, and the 7th switch is denoted as Sa.
Optionally, second level circuit includes: third transistorlike group, the 4th transistorlike group and the 8th switch, wherein
The first transistor and second transistor in third transistorlike group is in parallel, wherein the first transistor and the 4th class
The first transistor series connection in transistor group, second transistor are connected with the second transistor in the 4th transistorlike group, and the 8th
Closure and unlatching in parallel with second transistor group, for switching by control the 8th are switched, controls second level circuit by first
The elimination relative error in stage is adjusted to the sampling process in second stage.
Specifically, circuit one double-width grinding in the second level turns the circuit of Single-end output, in conjunction with Fig. 8 a and Fig. 8 b, in the second level
First stage in circuit, Fig. 9 a are a kind of zero passages for being compatible with a variety of DC-to-DC switching circuits according to an embodiment of the present invention
The schematic illustration of the first stage of second level circuit in zero current detection core circuit in detection circuit, as illustrated in fig. 9,
Phase1 in the first stage, switch Sb closure, before entering phase2, the initial state level of fixed signal so2 and zcd_out；
First stage in the circuit of the second level, Fig. 9 b are that a variety of direct currents of a kind of compatibility according to an embodiment of the present invention turn straight
The principle for flowing the second stage of second level circuit in the zero current detection core circuit in the zero cross detection circuit of conversion circuit is shown
It is intended to, as shown in figure 9b, is opened in second stage phase2, switch Sb, second level circuit enters amplification stage, and zcd_so2 is defeated
High level out.
Wherein, as shown in figures 9 a and 9b, the first transistor in third transistorlike and second transistor be denoted as MP5 and
MP6, the first transistor and second transistor in the 4th transistorlike are denoted as MN3 and MN4, and the 8th switch is denoted as Sb.
Optionally, the zero cross detection circuit of a variety of DC-to-DC switching circuits of compatibility provided by the embodiments of the present application also wraps
It includes: phase inverter, wherein phase inverter is electrically connected with zero current detection core circuit, for exporting zero current detection core circuit
Signal the second logical order is converted to by the first logical order.
The serial number of the above embodiments of the invention is only for description, does not represent the advantages or disadvantages of the embodiments.
In the above embodiment of the invention, it all emphasizes particularly on different fields to the description of each embodiment, does not have in some embodiment
The part of detailed description, reference can be made to the related descriptions of other embodiments.
In several embodiments provided herein, it should be understood that disclosed technology contents can pass through others
Mode is realized.Wherein, the apparatus embodiments described above are merely exemplary, such as the division of the unit, Ke Yiwei
A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or
Person is desirably integrated into another system, or some features can be ignored or not executed.Another point, shown or discussed is mutual
Between coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or communication link of unit or module
It connects, can be electrical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
On unit.It can some or all of the units may be selected to achieve the purpose of the solution of this embodiment according to the actual needs.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.Above-mentioned integrated list
Member both can take the form of hardware realization, can also realize in the form of software functional units.
If the integrated unit is realized in the form of SFU software functional unit and sells or use as independent product
When, it can store in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially
The all or part of the part that contributes to existing technology or the technical solution can be in the form of software products in other words
It embodies, which is stored in a storage medium, including some instructions are used so that a computer
Equipment (can for personal computer, server or network equipment etc.) execute each embodiment the method for the present invention whole or
Part steps.And storage medium above-mentioned includes: that USB flash disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
Reservoir (RAM, Random Access Memory), mobile hard disk, magnetic or disk etc. be various to can store program code
Medium.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (7)
1. a kind of zero cross detection circuit for being compatible with a variety of DC-to-DC switching circuits characterized by comprising DC power level
Circuit, mode switch circuit and zero current detection core circuit, wherein
The mode switch circuit is electrically connected with the DC power level circuit, defeated for receiving the DC power level circuit
The first signal group out, and according to the corresponding circuit-mode of the first signal group selection, wherein the circuit-mode includes:
Buck conversion circuit and boost chopper；
The zero current detection core circuit, is electrically connected with the mode switch circuit, for acquiring the mode switch circuit
The signal of the circuit output of middle selection；
Wherein, the mode switch circuit receives the DC power level electricity by being electrically connected with the DC power level circuit
The first signal group of road output, and according to the corresponding circuit-mode of the first signal group selection, pass through pair chosen
The circuit-mode answered exports corresponding vp, vcom and vn signal, the zero current detection core circuit and mode switch electricity
Road electrical connection, acquires vp, vcom and vn signal of the mode switch circuit output, and carries out according to vp, vcom and vn signal
It samples and compares, finally export zero cross detection circuit output signal；
The first signal group include the case where voltage output signal, exchange signal or ground signalling at least two groups signal
Under, the mode switch circuit includes: first switch group or second switch group, wherein
When the signal in the first signal group received is the voltage output signal and the exchange signal, it is closed institute
First switch group is stated, the second switch group is disconnected；
When the signal in the first signal group received is the exchange signal and the ground signalling, disconnection described the
One switching group is closed the second switch group；
It one end in the first switch group and the voltage output end in the DC power level circuit and exchanges signal end and is electrically connected
It connects, the other end in the first switch group is electrically connected with the zero current detection core circuit, for the circuit mould in selection
When formula is the boost chopper, Xiang Suoshu zero current detection core circuit triggers the sampling to the boost chopper and examines
It surveys；
One end in the second switch group exchanges signal end and ground terminal electrical connection, institute with the DC power level circuit
The other end stated in second switch group is electrically connected with the zero current detection core circuit, for being institute in the circuit-mode selected
When stating Buck conversion circuit, Xiang Suoshu zero current detection core circuit triggers the sampling to the Buck conversion circuit and examines
It surveys；
Wherein, the end vp is the positive pressure input signal end of the zero current detection core circuit；The end vcom is the zero current detection
The common mode input signal end of core circuit；Vn is the negative pressure input signal end of the zero current detection core circuit.
2. circuit according to claim 1, which is characterized in that the first switch group includes: first switch, second switch
It is switched with third, wherein
The voltage output end in one end and the DC power level circuit in the first switch and the second switch
It is electrically connected, the other end in the first switch the and described second switch is respectively and in the zero current detection core circuit
The end vp and the electrical connection of the end vcom, for the output voltage of the DC power level circuit received to be inputted the zero current
Detect the end vp and the end vcom in core circuit；
One end in the third switch is electrically connected with the signal end that exchanges in the DC power level circuit, the third
The other end in switch is electrically connected with the end vn in the zero current detection core circuit, the direct current function for will receive
The exchange signal of rate grade circuit inputs the end vn in the zero current detection core circuit.
3. circuit according to claim 1, which is characterized in that the second switch group includes: the 4th switch, the 5th switch
With the 6th switch, wherein
One end of 4th switch exchanges signal end electrical connection with described in the DC power level circuit, and the described 4th opens
The other end of pass is electrically connected with the end vp in the zero current detection core circuit, the DC power level for will receive
The exchange signal of circuit inputs the end vp in the zero current detection core circuit；
One end of 5th switch and the 6th switch is electrically connected with the ground terminal in the DC power level circuit,
It is described 5th switch and it is described 6th switch the other end respectively in the zero current detection core circuit the end vcom and vn
End electrical connection, for the ground signalling of the DC power level circuit received to be inputted the zero current detection core
The end vcom and the end vn in circuit.
4. circuit according to claim 2 or 3, which is characterized in that the zero current detection core circuit includes: the first order
Circuit, second level circuit, third switching group, the 4th switching group, first capacitor and the second capacitor, wherein
One end of first switch in the third switching group is electrically connected with the end vp, and first in the third switching group opens
The other end of pass respectively in the 4th switching group first switch and the first capacitor be electrically connected, the third switching group
In one end of second switch be electrically connected with the end vn, the other end of the second switch in the third switching group respectively with institute
State the second switch in the 4th switching group and second capacitor electrical connection, wherein described first in the 4th switching group
Switch and second switch series connection, and the vcom terminates the first switch in the 4th switching group and described the
Between two switches；
The first capacitor respectively in the 4th switching group third switch and the first order circuit be electrically connected, described the
Two capacitors respectively in the 4th switching group the 4th switch and the first order circuit be electrically connected, the first order circuit and
Second level circuit electrical connection, wherein third switch and the described 4th in the 4th switching group switch with it is described
First order circuit in parallel；
When controlling the first order circuit and the second level circuit in the first stage, the third switching group is disconnected, is closed institute
The 4th switching group is stated, for eliminating the relative error in the first order circuit and the second level circuit；
When second stage controls the first order circuit and the second level circuit, it is closed the third switching group, disconnects institute
The 4th switching group is stated, for triggering the sampling process in the first order circuit and the second level circuit.
5. circuit according to claim 4, which is characterized in that the first order circuit includes: the first transistorlike group,
Two transistorlike groups and the 7th switch, wherein
The first transistor, second transistor, third transistor and the 4th coupled in parallel in the first transistorlike group,
In, the second transistor is connected with the 7th switch, first in the third transistor and second transistorlike
Transistor series connection, the 4th transistor are connected with the second transistor in second transistorlike, for passing through control institute
The closure and unlatching for stating the 7th switch control the first order circuit and are adjusted by the elimination relative error of the first stage
To the sampling process in the second stage.
6. circuit according to claim 4, which is characterized in that the second level circuit includes: third transistorlike group,
Four transistorlike groups and the 8th switch, wherein
The first transistor and second transistor in the third transistorlike group is in parallel, wherein the first transistor and institute
State the first transistor series connection in the 4th transistorlike group, the second transistor and second in the 4th transistorlike group
Transistor series connection, the 8th switch is in parallel with the second transistor in the 4th transistorlike group, for passing through control institute
The closure and unlatching for stating the 8th switch control the second level circuit and are adjusted by the elimination relative error of the first stage
To the sampling process in the second stage.
7. circuit according to claim 1, which is characterized in that the circuit further include: phase inverter, wherein the reverse phase
Device is electrically connected with the zero current detection core circuit, and the signal for exporting the zero current detection core circuit is by first
Logical order is converted to the second logical order.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610219282.3A CN105866519B (en) | 2016-04-08 | 2016-04-08 | A kind of zero cross detection circuit being compatible with a variety of DC-to-DC switching circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610219282.3A CN105866519B (en) | 2016-04-08 | 2016-04-08 | A kind of zero cross detection circuit being compatible with a variety of DC-to-DC switching circuits |
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| Publication Number | Publication Date |
|---|---|
| CN105866519A CN105866519A (en) | 2016-08-17 |
| CN105866519B true CN105866519B (en) | 2019-09-20 |
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| CN201610219282.3A Active CN105866519B (en) | 2016-04-08 | 2016-04-08 | A kind of zero cross detection circuit being compatible with a variety of DC-to-DC switching circuits |
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| CN103929048A (en) * | 2014-04-29 | 2014-07-16 | 中国科学院上海微系统与信息技术研究所 | Zero-crossing detection circuit of switching power supply |
| CN104333225A (en) * | 2014-10-28 | 2015-02-04 | 无锡中星微电子有限公司 | Step-up DC/DC converter |
| CN205620463U (en) * | 2016-04-08 | 2016-10-05 | 北京集创北方科技股份有限公司 | Compatible multiple direct current changes direct current converting circuit's zero cross detection circuit |
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|---|---|---|---|---|
| WO2006117732A2 (en) * | 2005-05-04 | 2006-11-09 | Nxp B.V. | A peak or zero current comparator |
| CN103424605A (en) * | 2012-05-19 | 2013-12-04 | 快捷半导体(苏州)有限公司 | Zero-current detection circuit and method, and voltage conversion circuit |
| CN103675426A (en) * | 2013-12-24 | 2014-03-26 | 矽力杰半导体技术(杭州)有限公司 | Inductive current zero-crossing detection method, circuit and switch power supply with circuit |
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| CN105866519A (en) | 2016-08-17 |
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