CN103944375B - PFC control circuit and PFC circuit with same used - Google Patents
PFC control circuit and PFC circuit with same used Download PDFInfo
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- CN103944375B CN103944375B CN201410174832.5A CN201410174832A CN103944375B CN 103944375 B CN103944375 B CN 103944375B CN 201410174832 A CN201410174832 A CN 201410174832A CN 103944375 B CN103944375 B CN 103944375B
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Abstract
The invention discloses a PFC control circuit which is applied to a PFC circuit with a filter capacitor. On the basis of an existing PFC control circuit, a sampling circuit and a differential processing circuit are added on the PFC circuit. The sampling circuit generates a first sampling signal positively related to a current signal of the filter capacitor, the differential processing circuit conducts differential processing on the first sampling signal to obtain a compensating signal, and the compensating signal is input into a comparison circuit of the PFC control circuit. Compared with the prior art, according to the PFC control circuit, input currents are lower in the period that the compensating signal is not zero, and the input currents are higher in the period that the compensating signal is zero, therefore, peak points of the input currents are made to move backwards, the phase difference between input voltage and the input currents is reduced, namely the current signal can follow changes of a voltage signal in a more matched mode, and the power factor of the PFC circuit is increased. The invention further discloses the PFC circuit comprising the PFC control circuit.
Description
Technical Field
The application relates to the technical field of power electronics, in particular to a PFC control circuit and a PFC circuit applying the same.
Background
A Power Factor Correction (PFC) circuit includes a Direct Current (DC)/DC conversion circuit and a PFC control circuit, and is applied to an Alternating Current (AC)/DC rectification conversion device (such as a switching Power supply, an electronic rectifier, etc.). The input end of the DC/DC conversion circuit is connected with a power grid through a rectifier bridge, and the output end of the DC/DC conversion circuit provides corresponding direct-current voltage for a load; the PFC control circuit improves the Power Factor (PF) of the voltage conversion process by controlling the on-off time of a main switching tube S1 in the DC/DC conversion circuit. In the prior art, the control modes of the PFC control circuit mainly include switching current control and switching on time control.
In order to reduce the high-frequency pollution to the power grid, a filter capacitor is generally connected in parallel at the input end and/or the output end of a rectifier bridge; fig. 1 and fig. 2 show waveforms of an input voltage Vin and an input current Iin of the PFC circuit before and after the filter capacitance is increased, respectively; comparing fig. 1 and fig. 2, it can be seen that, due to the characteristic that the capacitor current leads the voltage by 90 °, after the filter capacitor is added, the input current Iin at the ac side of the PFC circuit also leads the input voltage Vin, and the Iin waveform is distorted, which results in the reduction of the power factor of the PFC circuit and the increase of the power loss.
Disclosure of Invention
In view of the above, the present disclosure is directed to a PFC control circuit and a PFC circuit using the same, so as to suppress an input current lead phenomenon in an ac/dc voltage conversion circuit caused by a filter capacitor and improve a power factor of the voltage conversion circuit.
In order to achieve the above purpose, the present application provides the following technical solutions:
a PFC control circuit is applied to a PFC circuit; the PFC control circuit controls the on-off of a main switching tube of a direct current DC/DC conversion circuit in the PFC circuit; the PFC circuit further includes: the two wiring ports on the output side of the rectifier bridge are correspondingly connected with the two wiring ports on the input side of the DC/DC conversion circuit; a filter capacitor is connected in series between two wiring ports on the input side of the rectifier bridge and/or between two wiring ports on the output side of the rectifier bridge; the PFC control circuit includes: the device comprises a sampling circuit, a differential processing circuit, a reference signal generating circuit, a comparison circuit and a drive control circuit;
the sampling circuit is used for generating a first sampling signal positively correlated with the current signal of the filter capacitor and outputting the first sampling signal to the differential processing circuit;
the differential processing circuit is used for receiving the first sampling signal and carrying out differential processing on the first sampling signal to obtain a compensation signal;
the reference signal generating circuit includes: the device comprises a voltage sampling circuit, an error amplifying circuit and a multiplier;
the voltage sampling circuit is used for sampling the output voltage of the rectifier bridge and outputting a corresponding voltage sampling signal;
the error amplifying circuit is used for receiving the output signal of the DC/DC conversion circuit, comparing the output signal with a preset reference signal, and obtaining and outputting a corresponding error signal;
the multiplier is used for receiving the voltage sampling signal and the error signal, performing product operation on the voltage sampling signal and the error signal to obtain a reference signal, and outputting the reference signal to the comparison circuit;
the comparison circuit is used for receiving the compensation signal, the reference signal and the current sampling signal of the main switching tube, generating a switching tube control signal according to the compensation signal, the reference signal and the current sampling signal, and outputting the switching tube control signal to the drive control circuit;
the driving control circuit is used for receiving the switch tube control signal and generating a driving signal for controlling the on-off of the main switch tube.
Preferably, the comparison circuit is specifically configured to superimpose the compensation signal and the current sampling signal, compare the superimposed signal with a reference signal, and generate and output the switch control signal according to a comparison result; or,
the comparison circuit subtracts the compensation signal from the reference signal, compares the subtracted signal with the current sampling signal, and generates and outputs the switch control signal according to the comparison result.
Preferably, the sampling circuit includes: the first sampling resistor is connected with the output filter capacitor in series; the common end of the first sampling resistor and the output filter capacitor is connected with the input end of the differential processing circuit; the first sampling signal comprises a voltage signal of a common end of the first sampling resistor and the output filter capacitor; the output filter capacitor is connected in series between two wiring ports on the output side of the rectifier bridge;
or,
the sampling circuit includes: the sampling capacitor and the second sampling resistor are connected in series; a series branch consisting of the sampling capacitor and the second sampling resistor is connected with the output end of the rectifier bridge in parallel, and the common end of the sampling capacitor and the second sampling resistor is connected with the input end of the differential processing circuit; the first sampling signal includes: and the voltage signal of the common end of the sampling capacitor and the second sampling resistor.
Preferably, the differential processing circuit includes a differential circuit and a signal conversion circuit;
the differential circuit is used for receiving the first sampling signal, differentiating the first sampling signal to obtain a corresponding differential signal and outputting the differential signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the differential signal and converting the differential signal to obtain the compensation signal.
Preferably, the differentiating circuit includes a differentiating capacitor and a differentiating resistor; one end of the differential capacitor is used as the input end of the differential circuit, and the other end of the differential capacitor is grounded through the differential resistor; and the common end of the differential capacitor and the differential resistor is used as the output end of the differential circuit.
Preferably, the signal conversion circuit includes: a switch, a discharge resistor and a discharge capacitor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential; and the third terminal of the switch is used as the output end of the signal conversion circuit.
Preferably, the reference signal generating circuit, the comparing circuit and the driving control circuit are integrated circuits.
A PFC control circuit is applied to a PFC circuit; the PFC control circuit controls the on-off of a main switching tube of a DC/DC conversion circuit in the PFC circuit; the PFC circuit further includes: the rectifier bridge is used for rectifying the power grid voltage, and the output end of the rectifier bridge is correspondingly connected with the input end of the DC/DC conversion circuit; a filter capacitor is connected in series between two input ends of the rectifier bridge and/or between two output ends of the rectifier bridge; the PFC control circuit includes: the device comprises a sampling circuit, a differential processing circuit, a reference signal generating circuit, a charging circuit, a comparison circuit and a drive control circuit;
the sampling circuit is used for generating a first sampling signal positively correlated with the current signal of the filter capacitor and outputting the first sampling signal to the differential processing circuit;
the differential processing circuit is used for receiving the first sampling signal and carrying out differential processing on the first sampling signal to obtain a compensation signal;
the reference signal generating circuit includes: an error amplification circuit;
the error amplifying circuit is used for receiving the output signal of the DC/DC conversion circuit, comparing the output signal with a preset reference signal to obtain a corresponding error signal, and outputting the error signal serving as a reference signal to the comparison circuit;
the charging circuit includes: the constant current source and the charging capacitor are connected in series and used for charging the charging capacitor through the constant current source;
the comparison circuit is used for receiving the compensation signal, the reference signal and the voltage signal of the charging capacitor, generating a switch tube control signal according to the compensation signal, the reference signal and the voltage signal of the charging capacitor, and outputting the switch tube control signal to the drive control circuit;
the driving control circuit is used for receiving the switch tube control signal and generating a driving signal for controlling the on-off of the main switch tube.
Preferably, the sampling circuit includes: the first sampling resistor is connected with the output filter capacitor in series; the common end of the first sampling resistor and the output filter capacitor is connected with the input end of the differential processing circuit; the first sampling signal comprises a voltage signal of a common end of the first sampling resistor and the output filter capacitor; the output filter capacitor is connected in series between two wiring ports on the output side of the rectifier bridge;
or,
the sampling circuit includes: the sampling capacitor and the second sampling resistor are connected in series; a series branch consisting of the sampling capacitor and the second sampling resistor is connected with the output end of the rectifier bridge in parallel, and the common end of the sampling capacitor and the second sampling resistor is connected with the input end of the differential processing circuit; the first sampled signal further includes: and the voltage signal of the common end of the sampling capacitor and the second sampling resistor.
Preferably, the differential processing circuit includes a differential circuit and a signal conversion circuit;
the differential circuit is used for receiving the first sampling signal, differentiating the first sampling signal to obtain a corresponding differential signal and outputting the differential signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the differential signal and converting the differential signal to obtain the compensation signal.
Preferably, the differentiating circuit includes a differentiating capacitor and a differentiating resistor; one end of the differential capacitor is used as the input end of the differential circuit, and the other end of the differential capacitor is grounded through the differential resistor; and the common end of the differential capacitor and the differential resistor is used as the output end of the differential circuit.
Preferably, the comparison circuit subtracts the compensation signal from a reference signal, compares the subtracted signal with a voltage signal of the charging capacitor, and generates and outputs the switch control signal according to a comparison result;
correspondingly, the signal conversion circuit comprises: a switch, a discharge resistor and a discharge capacitor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential; and the third terminal of the switch is used as the output end of the signal conversion circuit.
Preferably, the comparison circuit is specifically configured to superimpose the compensation signal and a voltage signal of the charging capacitor, compare the superimposed signal with a reference signal, and generate and output the switch control signal according to a comparison result;
correspondingly, the signal conversion circuit comprises: the device comprises a switch, a discharge resistor, a discharge capacitor and a conversion resistor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential;
one end of the conversion resistor is connected with the third wiring end of the switch, and the other end of the conversion resistor is used as the output end of the signal conversion circuit.
Preferably, the reference signal generating circuit, the charging circuit, the comparing circuit and the driving control circuit are integrated circuits.
A PFC circuit comprises a rectifier bridge, a direct current DC/DC conversion circuit and the PFC control circuit.
According to the technical scheme, the sampling circuit and the differential processing circuit are added on the basis of the conventional PFC control circuit, a compensation signal is obtained by sampling and differential processing of the current after the rectifier bridge and is input into one input end of the comparison circuit; furthermore, the compensation signal is present during a period preceding one cycle. In the time when the compensation signal Is not zero, the main switching tube current Is of the DC/DC conversion circuit Is reduced due to the existence of the compensation signal, so that the input current Iin Is reduced; after the switching current Is reduced, the reference signal Is increased, so that the main switching tube current Is of the DC/DC conversion circuit Is increased and the input current Iin Is increased in the time when the compensation signal Is zero; that is, in one cycle, the input current Iin decreases in a previous period and increases in a subsequent period; thus, in general, compared with the prior art, the input current waveform in the embodiment of the present application is decreased in a period before one cycle (in a period when the compensation signal exists) and increased in other periods, which is equivalent to that the peak point of the current is moved backward, the phase difference between the input voltage and the current is decreased, that is, the current signal more closely follows the change of the voltage signal, and the PF is increased.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is an ideal waveform diagram of an input voltage Vin and an input current Iin under the condition that no filter capacitor is arranged on two sides of a rectifier bridge in the prior art;
fig. 2 is a waveform diagram of an input voltage Vin and an input current Iin under the condition that a filter capacitor is connected in parallel at an input end and/or an output end of a rectifier bridge in the prior art;
fig. 3 is a waveform diagram of a rectifier bridge input voltage Vin and a first sampling signal I1 in a PFC circuit provided in an embodiment of the present application;
fig. 4 is a waveform diagram of an input voltage Vin and a compensation signal Ix of a rectifier bridge in a PFC circuit according to an embodiment of the present disclosure;
FIG. 5 is a waveform comparison diagram of an input current Iin when the embodiment of the present application and the prior art are applied;
fig. 6(a) is a circuit diagram of a PFC control circuit according to an embodiment of the present disclosure;
fig. 6(b) is a circuit diagram of a comparison circuit in the PFC control circuit shown in fig. 6 (a);
fig. 6(c) is another circuit diagram of a comparison circuit in the PFC control circuit shown in fig. 6 (a);
fig. 7(a) is a circuit diagram of a sampling circuit in a PFC control circuit according to an embodiment of the present disclosure;
fig. 7(b) is another circuit diagram of a sampling circuit in the PFC control circuit according to the embodiment of the present disclosure;
fig. 8(a) is a circuit diagram of a differential processing circuit in the PFC control circuit according to an embodiment of the present application;
fig. 8(b) is another circuit diagram of a differential processing circuit in the PFC control circuit according to the embodiment of the present disclosure;
fig. 9(a) is a circuit diagram of another PFC control circuit according to the second embodiment of the present application;
fig. 9(b) is a circuit diagram of a comparison circuit in the PFC control circuit shown in fig. 9 (a);
fig. 9(c) is another circuit diagram of the comparison circuit in the PFC control circuit shown in fig. 9 (a).
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a PFC control circuit and a PFC circuit using the same, so that the input current advance phenomenon in an alternating current-direct current voltage conversion circuit caused by a filter capacitor is suppressed, and the power factor of the voltage conversion circuit is improved.
The PFC circuit of the embodiment of the application includes: rectifier Bridge (BD) for rectifying a mains voltage, and a direct current (DC/DC) conversion circuit for converting an output direct voltage of the rectifier bridge, wherein: two wiring ports on the output side of the rectifier bridge are correspondingly connected with two wiring ports on the input side of the DC/DC conversion circuit; and an input filter capacitor C1 is connected in series between the two input ends of the rectifier bridge and/or an output filter capacitor C2 is connected in series between the two output ends of the rectifier bridge.
The first embodiment of the application provides a PFC control circuit, which improves the power factor of a corresponding PFC circuit by controlling the on/off of a main switching tube S1 in the DC/DC conversion circuit. As shown in fig. 6(a), the PFC control circuit includes: a reference signal generating circuit 100a, a comparing circuit 200, a drive control circuit 300, a sampling circuit 500, and a differential processing circuit 600.
The sampling circuit 500 is configured to sample the current after the rectifier bridge, obtain a first sampling signal I1 positively correlated to the current signal of the filter capacitor, and output the first sampling signal I1 to the differential processing circuit 600.
The differential processing circuit 600 is configured to receive the first sampling signal I1, and perform differential processing on the first sampling signal I1 to obtain a compensation signal Ix, which is output to one of the input terminals of the comparing circuit 200.
The reference signal generating circuit 100a is configured to generate a reference signal according to an output signal of a rectifier bridge in the PFC circuit and an output signal of the DC/DC conversion circuit, and output the reference signal to another input terminal of the comparing circuit 200.
The comparison circuit 200 is configured to receive the compensation signal Ix, the reference signal, and the current sampling signal of the main switching tube, generate a switching tube control signal according to the compensation signal, the reference signal, and the current sampling signal, and output the switching tube control signal to the driving control circuit 300.
The driving control circuit 300 is configured to receive the switching tube control signal and generate a driving signal for controlling the on/off of the main switching tube S1 in the DC/DC conversion circuit.
Specifically, in the PFC control circuit of the first embodiment, the reference signal generating circuit 100a includes: a voltage sampling circuit 120, an error amplifying circuit 110, and a multiplier 130. The voltage sampling circuit 120 is configured to sample the output voltage Vdc of the rectifier bridge BD to obtain and output a corresponding voltage sampling signal Vs, and the error amplifying circuit 110 is configured to receive an output signal (an output voltage Vo or an output current Io) of the DC/DC conversion circuit, compare the output signal with a preset reference signal Vref, and obtain and output a corresponding error signal Ve; the multiplier 130 is configured to receive Vs and Ve, perform a multiplication operation on the Vs and Ve to obtain a signal Vx, and use Vx as the reference signal. Meanwhile, the main switching tube S1 Is connected in series with a ground resistor Rs for sampling the current of the main switching tube to obtain a corresponding current sampling signal Is (i.e., a common terminal voltage signal of S1 and Rs), and the current sampling signal Is output to the comparison circuit 200.
In the embodiment of the present application, waveforms of the input voltage Vin and the first sampling signal I1 are as shown in fig. 3, waveforms of the input voltages Vin and Ix are as shown in fig. 4, and a waveform of the input current Iin when the embodiment of the present application and the prior art are applied is as shown in fig. 5 (in fig. 5, Iin1 is an input current in the prior art, Iin2 is an input current in the embodiment of the present application). The principle of the PFC control circuit according to the embodiment of the present application for suppressing Iin advance is described below with reference to fig. 3 to 5.
In the embodiment of the present application, the basic principle of the PFC control circuit is as follows: the control signal of the switching tube Is obtained by superposing the current sampling signal Is of the main switching tube with the compensation signal Ix and comparing the reference signal Vx generated by the reference signal generating circuit 100 with the superposed signal of the current sampling signal Is and the Ix by using the comparing circuit 200; because filter capacitors (including 3 cases: only an input filter capacitor C1, only an output filter capacitor C2, and both C1 and C2 exist in the PFC circuit), when an input voltage Vin crosses zero, the instantaneous value of Vin is smaller than a bias voltage generated by the output filter capacitor, so that a rectifier bridge is cut off, when Vin gradually increases to be larger than the bias voltage, the current Ic behind the rectifier bridge suddenly changes, a signal generation circuit generates a signal I1 positively correlated with the suddenly-changed current, and a compensation signal Ix is obtained through differential processing; meanwhile, in the closed state of S1, Is increases with the increase of the current of S1, and when Is + Ix > Vx, the output level of the comparison circuit 200 Is inverted, and a corresponding switch tube control signal Is output to the drive control circuit 300 to control the disconnection of S1. Because the PFC control circuit in the prior art does not have the sampling circuit 500 and the differential processing circuit 600, i.e., does not have the compensation signal Ix, when the output level of the comparison circuit 200 is inverted, the magnitude of the current sampling signal is equal to the reference signal; for the first embodiment, due to the existence of the compensation signal Ix, when the output level of the comparison circuit 200 is inverted, the magnitude of the current sampling signal is no longer equal to the reference signal, but is equal to the difference between the reference signal and the compensation signal. That is, when the output level of the comparison circuit 200 is inverted, the current sampling signal in the first embodiment is smaller than the current sampling signal in the prior art at the same time, and the current after the corresponding rectifier bridge is also smaller, and further the input current Iin2 of the PFC circuit in the first embodiment is also smaller than the input current Iin1 at the same time in the prior art, as shown by the waveform in the time period from 0 to t1 in fig. 5.
Meanwhile, in the time period when Ix Is not zero, Is in the embodiment Is smaller than that in the prior art, so that the error signal Ve generated by the error amplifying circuit 110 Is larger, and further the reference signal Vx Is larger; therefore, in the period when Ix is zero, the current of the main switching tube S1 is larger in this embodiment compared with the prior art, so that the input current Iin is larger.
That is, as shown in fig. 5 (in fig. 5, Iin1 is the input current in the prior art, Iin2 is the input current in the embodiment of the present application): compared with the prior art, the waveform peak value of the input current Iin2 in the embodiment is shifted to the right relative to the waveform peak value of Iin1 in the prior art, and the input current more closely follows the change of the input voltage, so that the power factor of AC/DC voltage conversion is improved.
According to the structure and the working principle, the embodiment of the application is additionally provided with the sampling circuit and the differential processing circuit on the basis of the conventional PFC control circuit, and a compensation signal is obtained by sampling and differential processing of the filter capacitor current behind the rectifier bridge and is input into one input end of the comparison circuit; due to the existence of the compensation current, the current of the switching tube is reduced, so that the input current is reduced, and in other time periods of a switching cycle, due to the reduction of the previous switching current, the reference signal is increased, the current of the corresponding switching tube is increased, and the input current is increased; therefore, compared with the prior art, the input current peak value in the embodiment of the application is shifted to the right, the input current peak value is more consistent with the change of the input voltage, the lead degree and the distortion degree of the input current are reduced, and the power factor of alternating current-direct current voltage conversion is improved. In addition, the current flowing through the output filter capacitor C2 Is unchanged, so that the Iin and the Is are changed in a consistent manner, and the accuracy of cycle control Is ensured.
In the PFC control circuit provided in the embodiment of the application, to obtain a correct switching tube control signal, the comparison circuit 200 needs to perform subtraction operation Vx-Is-Ix on three signals Vx, Is, and Ix, and specific circuit implementation manners of the comparison circuit at least include two types, namely fig. 6(b) and fig. 6 (c).
In the structure shown in fig. 6(b), the comparison circuit 200 includes a comparator 201 and an adder 202; is and Ix are respectively connected to the input end of the adder 202, the output end of the adder 202 Is connected to the inverting input end of the comparator 201, Vx Is directly input to the non-inverting input end of the comparator 201, that Is: the comparison circuit 200 superimposes the compensation signal and the current sampling signal by an adder 202, compares the superimposed signal with a reference signal by a comparator 201, and generates and outputs the switching control signal according to the comparison result.
In the structure shown in fig. 6(c), the comparison circuit 200 includes a comparator 201 and a subtractor 203; vx and Ix are respectively input into the input end of the subtracter 203 to realize subtraction operation Vx-Ix, the operation result Is input into the non-inverting input end of the comparator 201, and Is directly input into the inverting input end of the comparator 201, namely: the comparison circuit 200 subtracts the compensation signal from the reference signal by the subtractor 203, compares the subtracted signal with the current sampling signal by the comparator 201, and generates and outputs the switching control signal according to the comparison result.
In the PFC control circuit provided in the embodiment of the present application, the sampling circuit 500 includes at least two structures shown in fig. 7(a) and fig. 7 (b).
In the structure shown in fig. 7(a), the sampling circuit 500 includes a first sampling resistor R1 connected in series with an output filter capacitor C2, and a common terminal of the first sampling resistor R1 and the output filter capacitor C2 is connected to an input terminal of the differential processing circuit 600; due to the voltage signal V of the common terminalR1Is proportional to the current signal of C2, so V can be adjustedR1As the first sampled signal I1.
In the structure shown in fig. 7(b), the sampling circuit 500 includes a sampling capacitor C3 and a second sampling resistor R2 connected in series, a series branch formed by a sampling capacitor C3 and a second sampling resistor R2 is connected in parallel with the output filter capacitor C2, and a common terminal of the sampling capacitor C3 and the second sampling resistor R2 is connected to an input terminal of the differential processing circuit 600; since the currents of C2 and C3 are proportional, the current of C3 is proportional to the voltage signal V at the common end of C3 and R2R2Is in direct proportion, so VR2Proportional to C3, V can beR2As the first sampled signal I1.
Further, referring to fig. 8(a), based on the PFC control circuit described above, the differential processing circuit 600 in the embodiment of the present application includes a differential circuit 610 and a signal conversion circuit 620 a; the differentiating circuit 610 receives the first sampling signal I1 output by the capacitance current sampling circuit 500, differentiates the first sampling signal I1 to obtain a corresponding differentiated signal Id, and outputs the differentiated signal Id to the signal converting circuit 620 a; the signal conversion circuit 620a receives the differential signal Id and converts it to obtain the compensation signal Ix.
The differentiating circuit 610 includes a differentiating capacitor Cd and a differentiating resistor Rd; one end of the differential capacitor Cd is used as an input end of the differential circuit 610, and the other end is grounded through a differential resistor Rd; the common terminal of Cd and Rd serves as the output terminal of the differentiating circuit 610.
The signal conversion circuit 620a includes: a switch Q1, a discharge resistor Rw and a discharge capacitor Cw; the first terminal of the switch Q1 is connected to a power source VDC, and the second terminal is used as the input terminal of the signal conversion circuit 620 and is connected to the differential signal Id; the discharge resistor and the discharge capacitor are connected in parallel to form an RC discharge circuit, and the RC discharge circuit is connected between the third terminal of the switch Q1 and the ground potential; the third terminal of the switch Q1 is used as the output terminal of the signal conversion circuit 620a, i.e. the voltage signal at the third terminal is used as the compensation signal Ix. When the current of the filter capacitor suddenly changes, the I1 suddenly changes, the slope is increased, and therefore the differential signal Id increases to reach the turn-on voltage of Q1, so that the first terminal and the third terminal of Q1 are conducted, and Ix is generated and is the maximum value (namely the difference between the maximum voltage of the power supply VDC and the conduction voltage drop of Q1); after Q1 turns on, power source VDC discharges through the RC discharge circuit, and the voltage gradually decreases, so that Ix gradually decreases from the maximum value to 0.
In the PFC control circuit provided in the embodiment of the present application, the switch Q1 of the signal conversion circuit 620a may specifically adopt an element such as a triode or a field effect transistor; for example, the Q1 may be an NPN type triode, the Q1 has a first terminal that is a collector of the NPN type triode, a second terminal that is a base of the triode, and a third terminal that is an emitter of the triode, and when the differential signal Id is greater than a conduction voltage of the triode, the collector and the emitter of the triode are conducted; for another example, the Q1 may also adopt an N-channel MOS transistor, where the first terminal of the Q1 is a drain of the P-channel MOS transistor, the second terminal is a gate of the N-channel MOS transistor, and the third terminal is a source of the N-channel MOS transistor, and when the differential signal Id makes a gate-source voltage of the N-channel MOS transistor greater than its turn-on voltage, the drain and the source of the N-channel MOS transistor are conducted.
In addition, the reference signal generating circuit 100a, the comparing circuit 200 and the driving control circuit 300 according to the first embodiment of the present invention can be integrated into a switch current control type PFC chip.
On the other hand, the second embodiment of the present application provides another PFC control circuit, which is configured to perform on-off control on the main switching tube S1 in the DC/DC conversion circuit; referring to fig. 9(a), the PFC control circuit includes: a reference signal generating circuit 100b, a comparing circuit 200, a drive control circuit 300, a charging circuit 400, a sampling circuit 500, and a differential processing circuit 600.
The sampling circuit 500 is configured to sample the current after the rectifier bridge, obtain a first sampling signal I1 positively correlated to the current signal of the filter capacitor, and output the first sampling signal I1 to the differential processing circuit 600.
The differential processing circuit 600 is configured to receive the first sampling signal I1, perform differential processing on the first sampling signal I1 to obtain a compensation signal Ix, and output the compensation signal Ix to the comparing circuit 200.
The reference signal generating circuit 100b is configured to generate a reference signal according to an output signal of a rectifier bridge in the PFC circuit and an output signal of the DC/DC conversion circuit, and output the reference signal to the comparing circuit 200.
The charging circuit 400 comprises a constant current source Icharge and a charging capacitor C connected in seriesTC is obtained by constant current source IcharTCharging; cTVoltage signal V ofCTInput to the comparison circuit 200.
The comparison circuit 200 is used for receiving the compensation signal Ix, the reference signal and CTVoltage signal V ofCTBased on the compensation signal Ix, the reference signal and CTVoltage signal V ofCTGenerates a switching tube control signal and outputs the switching tube control signal to the driving control circuit 300.
The driving control circuit 300 is configured to receive the switching tube control signal and generate a driving signal for controlling the on/off of the main switching tube S1 in the DC/DC conversion circuit.
Specifically, in the PFC control circuit of the second embodiment, the reference signal generating circuit 100b includes an error amplifying circuit 110; the error amplifying circuit 110 is configured to receive an output signal (an output voltage Vo or an output current Io) of the DC/DC conversion circuit, compare the output signal with a preset reference signal Vref to obtain a corresponding error signal Ve, and output the error signal Ve as a reference signal to the comparing circuit 200.
In the second embodiment of the present application, the waveforms of the output voltage Vdc of the rectifier bridge and the first sampling signal I1, the waveforms of the input currents Vin and Ix, and the waveforms of the input current Iin when the second embodiment of the present application and the prior art are applied can also refer to fig. 3 to 5.
The second embodiment provides a PFC control circuit based on the following basic principle: by charging the voltage signal V of the capacitorCTSuperposed with the compensation signal Ix, the reference signal Ve generated by the reference signal generation circuit 100 and the comparison signal V are compared by the comparison circuit 200CTAnd Ix to obtain the sum signalTurning off the control signal; because filter capacitors (including 3 cases: only an input filter capacitor C1, only an output filter capacitor C2, and both C1 and C2 exist in the PFC circuit), when an input voltage Vin crosses zero, the instantaneous value of Vin is smaller than a bias voltage generated by the filter capacitors, so that a rectifier bridge is cut off, the current Ic after the rectifier bridge suddenly changes, when Vin gradually increases to be larger than the bias voltage, the current Ic after the rectifier bridge suddenly changes, and a signal I1 positively correlated with the suddenly changed current is generated by a signal generation circuit and then is subjected to differential processing to obtain a compensation signal Ix; meanwhile, in the closed state of S1, V is increased with the increase of the charging timeCTIncrease when VCT+Ix>At Ve, the output level of the comparator 200 is inverted, and a corresponding switching tube control signal is output to the drive control circuit 300, so that S1 is controlled to be turned off. Because the PFC control circuit in the prior art does not have the sampling circuit 500 and the differential processing circuit 600, i.e., does not have the compensation signal Ix, when the output level of the comparison circuit 200 is inverted, the magnitude of the comparison signal is equal to the reference signal; for the first embodiment, due to the existence of the compensation signal Ix, when the output level of the comparing circuit 200 is inverted, the magnitude of the comparison signal is no longer equal to the reference signal, but is equal to the difference between the reference signal and the compensation signal. That is, when the output level of the comparison circuit 200 is inverted, V in the second embodimentCTCompared with the V in the prior art at the same timeCTThe current after the corresponding rectifier bridge is smaller, and further the input current Iin2 of the PFC circuit in this embodiment is also smaller than the input current Iin1 at the same time in the prior art, as shown by the waveform in the time period 0 to t1 in fig. 5.
Meanwhile, in the time period when Ix Is not zero, Is in the embodiment Is smaller than that in the prior art, so that the error signal Ve generated by the error amplifying circuit 110 Is larger; therefore, in the period when Ix is zero, the current of the main switching tube S1 is larger in this embodiment compared with the prior art, so that the input current Iin is larger.
As can be seen from the above control principle, compared with the prior art, the waveform peak value of the input current in the second embodiment is shifted to the right relative to the waveform peak value of the input current in the prior art, and the input current more closely follows the change of the input voltage, so that the power factor of the ac/dc voltage conversion is improved.
In the PFC control circuit provided in the embodiment of the present application, to obtain a correct switching tube control signal, the comparison circuit 200 needs to compare Ve and VCTThe sum Ix three signals realize the subtraction operation Ve-VCTIx, specific circuit implementations of which include at least two of fig. 9(b) and 9 (c).
In the structure shown in fig. 9(b), the comparison circuit 200 includes a comparator 201 and an adder 202; vCTAnd Ix are respectively connected to the input end of the adder 202, the output end of the adder 202 is connected to the inverting input end of the comparator 201, Ve is directly input to the non-inverting input end of the comparator 201, that is: the comparison circuit 200 compares the compensation signal Ix with a voltage signal V of a charging capacitorCTThe superimposed signal is compared with a reference signal by a comparator 201, and the switching control signal is generated and output according to the comparison result.
In the structure shown in fig. 9(c), the comparison circuit 200 includes a comparator 201 and a subtractor 203; ve and Ix are respectively input to the input terminal of the subtractor 203 to realize the subtraction operation Ve-Ix, the operation result is input to the non-inverting input terminal of the comparison circuit 201, and VCTDirectly input to the inverting input of comparator 201, i.e.: the comparison circuit 200 subtracts the compensation signal Ix and the reference signal Ve by a subtracter 203, and compares the subtracted signal with a voltage signal V of the charging capacitor by a comparator 201CTAnd comparing, and generating and outputting the switch control signal according to the comparison result.
As in the first embodiment, in the PFC control circuit provided in the second embodiment of the present application, the sampling circuit 500 may also adopt any one of the structures shown in fig. 7(a) and fig. 7 (b); the corresponding circuit principle is also the same as the above embodiment, and is not described herein again.
For the PFC control circuit using the comparison circuit shown in fig. 9(c), the compensation signal Ix is a voltage signal, so the corresponding differential processing circuit 600 can also use the structure shown in fig. 8 (a); the corresponding circuit principle is also the same as the above embodiment.
In particular, in the PFC control circuit of the comparison circuit shown in fig. 9(b), the compensation signal Ix and Icharge are C in commonTCharging, so Ix should be a current signal; for this reason, a conversion resistor R3 may be added to the signal conversion circuit 620a shown in fig. 8(a), resulting in a signal conversion circuit 620b shown in fig. 8 (b); one end of the conversion resistor R3 is connected to the third terminal of the switch Q1, and the other end is used as the output end of the signal conversion circuit 620; converting the voltage signal of the third terminal of the Q1 into a current signal through a conversion resistor R3, and taking the current signal as a compensation signal Ix which is C together with a constant current source IchargeTCharging, when Ix is present, CTThe charging time of (2) is reduced, resulting in a reduced input current; resulting in an increase in the error signal Ve, C when Ix disappears due to the increase in VeTThe charging time of (a) increases and thus the input current increases.
Similarly, in the signal conversion circuit 620b shown in fig. 8(b), the switch Q1 may specifically adopt an element such as a triode or a field effect transistor; for example, the Q1 may be an NPN type triode, the Q1 has a first terminal that is a collector of the NPN type triode, a second terminal that is a base of the triode, and a third terminal that is an emitter of the triode, and when the differential signal Id is greater than a conduction voltage of the triode, the collector and the emitter of the triode are conducted; for another example, the Q1 may also adopt an N-channel MOS transistor, where the first terminal of the Q1 is a drain of the N-channel MOS transistor, the second terminal is a gate of the N-channel MOS transistor, and the third terminal is a source of the N-channel MOS transistor, and when the differential signal Id makes a gate-source voltage of the N-channel MOS transistor greater than its turn-on voltage, the drain and the source of the N-channel MOS transistor are conducted.
In addition, the reference signal generating circuit 100b, the charging circuit 400, the comparing circuit 200 and the driving control circuit 300 described in the second embodiment above may be integrated into one switch on-time control type PFC chip.
In addition, the embodiment of the application also provides a PFC circuit, which comprises a rectifier Bridge (BD), a direct current (DC/DC) conversion circuit and a PFC control circuit, wherein two wiring ports on the output side of the rectifier bridge are correspondingly connected with two wiring ports on the input side of the DC/DC conversion circuit; the DC/DC conversion circuit is internally provided with a main switching tube S1, and when the main switching tube S1 is conducted, the DC/DC conversion circuit can realize DC/DC conversion; the PFC control circuit can adopt the structure of any one of the embodiments to realize on-off control of the main switching tube S1 in the DC/DC conversion circuit. In the embodiment, the PFC control circuit samples and differentiates the current after the rectifier bridge through the sampling circuit and the differential processing circuit to obtain a compensation signal, and inputs the compensation signal to the inverting input end of the comparison circuit; when the input current suddenly changes, the current of the switching tube is reduced due to the existence of the compensation current, so that the input current is reduced, and in other time periods of a switching cycle, the current of the filter capacitor behind the rectifier bridge does not suddenly change, so that the compensation signal is 0, the current of the corresponding switching tube is increased, and the input current is increased; therefore, in the embodiment of the application, compared with the prior art, the waveform of the input current is shifted to the right, the phase difference between the waveform of the input current and the input voltage is reduced, the lead degree of the input current is reduced, and the power factor of alternating current-direct current voltage conversion is improved.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (15)
1. A PFC control circuit is applied to a PFC circuit; the PFC control circuit controls the on-off of a main switching tube of a direct current DC/DC conversion circuit in the PFC circuit; the PFC circuit further includes: the two wiring ports on the output side of the rectifier bridge are correspondingly connected with the two wiring ports on the input side of the DC/DC conversion circuit; a filter capacitor is connected in series between two wiring ports on the input side of the rectifier bridge and/or between two wiring ports on the output side of the rectifier bridge; characterized in that, the PFC control circuit includes: the device comprises a sampling circuit, a differential processing circuit, a reference signal generating circuit, a comparison circuit and a drive control circuit;
the sampling circuit is used for generating a first sampling signal positively correlated with the current signal of the filter capacitor and outputting the first sampling signal to the differential processing circuit;
the differential processing circuit is used for receiving the first sampling signal and carrying out differential processing on the first sampling signal to obtain a compensation signal;
the reference signal generating circuit includes: the device comprises a voltage sampling circuit, an error amplifying circuit and a multiplier;
the voltage sampling circuit is used for sampling the output voltage of the rectifier bridge and outputting a corresponding voltage sampling signal;
the error amplifying circuit is used for receiving the output signal of the DC/DC conversion circuit, comparing the output signal with a preset reference signal, and obtaining and outputting a corresponding error signal;
the multiplier is used for receiving the voltage sampling signal and the error signal, performing product operation on the voltage sampling signal and the error signal to obtain a reference signal, and outputting the reference signal to the comparison circuit;
the comparison circuit is used for receiving the compensation signal, the reference signal and the current sampling signal of the main switching tube, generating a switching tube control signal according to the compensation signal, the reference signal and the current sampling signal, and outputting the switching tube control signal to the drive control circuit;
the driving control circuit is used for receiving the switch tube control signal and generating a driving signal for controlling the on-off of the main switch tube.
2. The PFC control circuit of claim 1, wherein the comparison circuit is specifically configured to superimpose the compensation signal and a current sampling signal, compare the superimposed signal with a reference signal, and generate and output the switching control signal according to a comparison result; or,
the comparison circuit subtracts the compensation signal from the reference signal, compares the subtracted signal with the current sampling signal, and generates and outputs the switch control signal according to the comparison result.
3. The PFC control circuit of claim 1 or 2, wherein the sampling circuit comprises: the first sampling resistor is connected with the output filter capacitor in series; the common end of the first sampling resistor and the output filter capacitor is connected with the input end of the differential processing circuit; the first sampling signal comprises a voltage signal of a common end of the first sampling resistor and the output filter capacitor; the output filter capacitor is connected in series between two wiring ports on the output side of the rectifier bridge;
or,
the sampling circuit includes: the sampling capacitor and the second sampling resistor are connected in series; a series branch consisting of the sampling capacitor and the second sampling resistor is connected with the output end of the rectifier bridge in parallel, and the common end of the sampling capacitor and the second sampling resistor is connected with the input end of the differential processing circuit; the first sampling signal includes: and the voltage signal of the common end of the sampling capacitor and the second sampling resistor.
4. The PFC control circuit of claim 1 or 2, wherein the differentiation processing circuit comprises a differentiation circuit and a signal conversion circuit;
the differential circuit is used for receiving the first sampling signal, differentiating the first sampling signal to obtain a corresponding differential signal and outputting the differential signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the differential signal and converting the differential signal to obtain the compensation signal.
5. The PFC control circuit of claim 4, wherein the differentiating circuit comprises a differential capacitor and a differential resistor; one end of the differential capacitor is used as the input end of the differential circuit, and the other end of the differential capacitor is grounded through the differential resistor; and the common end of the differential capacitor and the differential resistor is used as the output end of the differential circuit.
6. The PFC control circuit of claim 4, wherein the signal conversion circuit comprises: a switch, a discharge resistor and a discharge capacitor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential; and the third terminal of the switch is used as the output end of the signal conversion circuit.
7. The PFC control circuit of claim 1 or 2, wherein the reference signal generation circuit, the comparison circuit and the drive control circuit are an integrated circuit.
8. A PFC control circuit is applied to a PFC circuit; the PFC control circuit controls the on-off of a main switching tube of a DC/DC conversion circuit in the PFC circuit; the PFC circuit further includes: the rectifier bridge is used for rectifying the power grid voltage, and the output end of the rectifier bridge is correspondingly connected with the input end of the DC/DC conversion circuit; a filter capacitor is connected in series between two input ends of the rectifier bridge and/or between two output ends of the rectifier bridge; characterized in that, the PFC control circuit includes: the device comprises a sampling circuit, a differential processing circuit, a reference signal generating circuit, a charging circuit, a comparison circuit and a drive control circuit;
the sampling circuit is used for generating a first sampling signal positively correlated with the current signal of the filter capacitor and outputting the first sampling signal to the differential processing circuit;
the differential processing circuit is used for receiving the first sampling signal and carrying out differential processing on the first sampling signal to obtain a compensation signal, wherein when the current of the filter capacitor changes suddenly, the compensation signal is generated and is a maximum value, and then the compensation signal is gradually reduced to 0 from the maximum value;
the reference signal generating circuit includes: an error amplification circuit;
the error amplifying circuit is used for receiving the output signal of the DC/DC conversion circuit, comparing the output signal with a preset reference signal to obtain a corresponding error signal, and outputting the error signal serving as a reference signal to the comparison circuit;
the charging circuit includes: the constant current source and the charging capacitor are connected in series and used for charging the charging capacitor through the constant current source;
the comparison circuit is used for receiving the compensation signal, the reference signal and the voltage signal of the charging capacitor, generating a switch tube control signal according to the compensation signal, the reference signal and the voltage signal of the charging capacitor, and outputting the switch tube control signal to the drive control circuit;
the driving control circuit is used for receiving the switch tube control signal and generating a driving signal for controlling the on-off of the main switch tube.
9. The PFC control circuit of claim 8, wherein the sampling circuit comprises: the first sampling resistor is connected with the output filter capacitor in series; the common end of the first sampling resistor and the output filter capacitor is connected with the input end of the differential processing circuit; the first sampling signal comprises a voltage signal of a common end of the first sampling resistor and the output filter capacitor; the output filter capacitor is connected in series between two wiring ports on the output side of the rectifier bridge;
or,
the sampling circuit includes: the sampling capacitor and the second sampling resistor are connected in series; a series branch consisting of the sampling capacitor and the second sampling resistor is connected with the output end of the rectifier bridge in parallel, and the common end of the sampling capacitor and the second sampling resistor is connected with the input end of the differential processing circuit; the first sampled signal further includes: and the voltage signal of the common end of the sampling capacitor and the second sampling resistor.
10. The PFC control circuit of any of claims 8 to 9, wherein the differentiation processing circuit comprises a differentiation circuit and a signal conversion circuit;
the differential circuit is used for receiving the first sampling signal, differentiating the first sampling signal to obtain a corresponding differential signal and outputting the differential signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the differential signal and converting the differential signal to obtain the compensation signal.
11. The PFC control circuit of claim 10, wherein the differentiating circuit comprises a differential capacitance and a differential resistance; one end of the differential capacitor is used as the input end of the differential circuit, and the other end of the differential capacitor is grounded through the differential resistor; and the common end of the differential capacitor and the differential resistor is used as the output end of the differential circuit.
12. The PFC control circuit of claim 10, wherein the comparison circuit subtracts the compensation signal from a reference signal, compares the subtracted signal with a voltage signal of the charging capacitor, and generates and outputs the switching control signal according to the comparison result;
correspondingly, the signal conversion circuit comprises: a switch, a discharge resistor and a discharge capacitor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential; and the third terminal of the switch is used as the output end of the signal conversion circuit.
13. The PFC control circuit of claim 10, wherein the comparison circuit is specifically configured to superimpose the compensation signal with a voltage signal of the charging capacitor, compare the superimposed signal with a reference signal, and generate and output the switching control signal according to a comparison result;
correspondingly, the signal conversion circuit comprises: the device comprises a switch, a discharge resistor, a discharge capacitor and a conversion resistor;
the first terminal of the switch is connected with a power supply, and the second terminal of the switch is used as the input end of the signal conversion circuit and is connected with the differential signal;
the discharge resistor and the discharge capacitor are connected in parallel and are connected between the third terminal of the switch and the ground potential;
one end of the conversion resistor is connected with the third wiring end of the switch, and the other end of the conversion resistor is used as the output end of the signal conversion circuit.
14. The PFC control circuit of any one of claims 8 to 9, wherein the reference signal generation circuit, the charging circuit, the comparison circuit and the drive control circuit are an integrated circuit.
15. A PFC circuit comprising a rectifier bridge, a DC/DC converter circuit and a PFC control circuit according to any one of claims 1 to 14.
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| CN108663558B (en) * | 2017-03-29 | 2020-06-23 | 株式会社村田制作所 | PFC (Power factor correction) equipment, current detection method and current detection device thereof |
| CN108809072B (en) * | 2017-04-26 | 2020-10-30 | 泰达电子股份有限公司 | Phase compensation method suitable for power factor correction circuit |
| CN108768156A (en) * | 2018-08-17 | 2018-11-06 | 英飞特电子（杭州）股份有限公司 | A kind of power supply unit and its power factor correction circuit |
| US10778088B2 (en) * | 2019-01-04 | 2020-09-15 | Infineon Technologies Austria Ag | Enhanced power factor correction |
| CN110572023B (en) * | 2019-09-29 | 2021-06-22 | 英麦科（厦门）微电子科技有限公司 | PFC circuit, current compensation method of input capacitor of PFC circuit and power conversion circuit |
| CN111464015B (en) * | 2020-03-24 | 2023-05-16 | 杭州电子科技大学 | PFC converter error amplifying circuit |
| CN111969843B (en) * | 2020-08-27 | 2021-12-14 | 矽力杰半导体技术(杭州)有限公司 | Power factor correction circuit and current compensation method of input capacitor thereof |
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