CN108152749A - A kind of high pressure monitoring system of BMS multifunctional units - Google Patents
A kind of high pressure monitoring system of BMS multifunctional units Download PDFInfo
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- CN108152749A CN108152749A CN201711426750.5A CN201711426750A CN108152749A CN 108152749 A CN108152749 A CN 108152749A CN 201711426750 A CN201711426750 A CN 201711426750A CN 108152749 A CN108152749 A CN 108152749A
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- 238000012544 monitoring process Methods 0.000 title claims abstract description 17
- 238000002955 isolation Methods 0.000 claims abstract description 57
- 238000009413 insulation Methods 0.000 claims description 14
- 230000005611 electricity Effects 0.000 claims description 8
- 238000009530 blood pressure measurement Methods 0.000 abstract description 6
- 238000001514 detection method Methods 0.000 abstract description 6
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 238000005183 dynamical system Methods 0.000 abstract description 3
- 230000036632 reaction speed Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
- G01R31/3644—Constructional arrangements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/70—Energy storage systems for electromobility, e.g. batteries
Abstract
The invention discloses a kind of BMS multifunctional units high-pressure system monitoring scheme, including high-voltage acquisition circuit, HIGH PRESSURE TREATMENT circuit, DC/DC isolation circuits and SPI isolation circuits.The high-voltage acquisition circuit is for the acquisition of battery pack total current and the acquisition of battery pack medial and lateral total voltage；The HIGH PRESSURE TREATMENT circuit is used for the millivolt level voltage value for acquiring the high-voltage acquisition circuit and carries out A/D conversions；The DC/DC isolation circuits are used to provide isolation stable voltage to A/D chips and SPI isolating chips；The SPI isolation circuits are used to A/D chip calculated values being reported to MCU by the way that spi bus is isolated, and actual value is calculated by MCU；By BMS multifunctional unit high-pressure system monitoring schemes, electric automobile high-voltage dynamical system total pressure measurement can be effectively carried out simultaneously（Including the total pressure measurement of battery pack medial and lateral）, insulating monitoring and total current detection（Using current divider scheme）.Entire resolution circuitry form is simple, and flexible design, accuracy of detection is high, and circuit reaction speed is fast, and cost is relatively low.
Description
Technical field
The invention belongs to cell management system of electric automobile technical fields, concretely relate to a kind of BMS Multifunctional centralizeds
Into high pressure monitoring system.
Background technology
At present, an important feature of electric vehicle is interior equipped with the high-tension battery group for ensureing enough power performance, and
Form the power loop with high voltage, high current.High-tension battery group is made of multiple battery cell connection in series-parallel, operating voltage
Major part is all in more than 300V, and for running current up to tens of, even hundreds of amperes, transient short-circuit current is even more into multiplication
Add.Particularly when failure of insulation failure occurs for high tension loop, high voltage and high current pacify the person of passenger on entail dangers to vehicle
Entirely, the normal work of low-voltage electrical apparatus, vehicle control device and other equipment while can also be influenced.Therefore, for electric vehicle
Reliability and security consideration have pole for the detection of the total pressure measurement of electric automobile high-voltage system, insulating monitoring and total current
Its important meaning.
There are many for the total pressure measurement of electric automobile high-voltage dynamical system, insulating monitoring and total current detection both at home and abroad
Method：Such as using voltage sensor, either electric resistance partial pressure method measures battery pack medial and lateral stagnation pressure using exchange injection method or opens
Concern changes method and measures the battery pack system class of insulation and measure total current using current sensor or current divider.Three above work(
Most of energy module is completed using independent alternative, has small part to integrate two function modules, above scheme circuit framework is answered
It is miscellaneous, cost is higher.
Invention content
The object of the present invention is to provide a kind of high pressure monitoring systems of BMS multifunctional units, and circuit structure is simple, cost
Low, precision and reliability are high.
In order to solve the above technical problems, the object of the present invention is achieved like this：
A kind of BMS multifunctional units high-pressure system monitoring scheme, including high-voltage acquisition circuit, HIGH PRESSURE TREATMENT circuit, DC/DC isolation
Circuit, SPI isolation circuits and MCU；
The high-voltage acquisition circuit includes switch S0, switch S1, resistance R1, resistance R2, resistance R3, resistance R4, switch S3, resistance
R5, resistance R6, switch S4, switch S5, resistance R7 and resistance R8.The switch S0 mono- termination electric automobile chassis, the other end
With connecing A/D chips；The switch S1 mono- is terminating battery pack PACK just, another described resistance R1 one end of termination；The resistance R1 is another
One described resistance R2 one end of termination, while 7 foot of A/D chips is connect, another termination A/D chips of resistance R2, the electricity
Hinder R3 mono- with terminating A/D chips, another described resistance R4 one end of termination, while 8 foot of A/D chips is connect, the resistance R4 is another
The described switch S2 one end of one termination, switch another termination battery pack PACK of S2 are born, and the switch S3 mono- terminates battery pack
Just, another described resistance R5 one end of termination, the resistance R5 is another with terminating A/D chips, and the resistance R6 mono- terminates A/D by PACK
Chip, another described switch S4 one end of termination, switch another termination battery pack PACK of S4 are born, and the switch S5 mono- is terminated
Just, another described resistance R7 one end of termination, the resistance R7 is another to terminate described resistance R8 one end, while meet institute to battery pack LINK
9 foot of A/D chips is stated, another termination battery pack LINK of resistance R8 are born；
High-voltage acquisition circuit is for the acquisition of battery pack total current and the acquisition of battery pack medial and lateral total voltage；
The HIGH PRESSURE TREATMENT circuit includes A/D chips U2, capacitance C1, capacitance C2, capacitance C3.10 foot of A/D chips, 14 feet, 6
With connecing the A/D chips, 11 foot of A/D chips connects 14 foot of SPI isolating chips to foot, and 13 foot of A/D chips connects described
11 foot of SPI isolating chips, 12 foot of A/D chips connect 13 foot of SPI isolating chips, and 18 foot of A/D chips meets the SPI
12 foot of isolating chip, 4 foot of A/D chips, 20 feet, 19 feet, 17 feet, 16 feet are hanging, and 1 foot of A/D chips connects current divider one
End, 2 foot of A/D chips connect the current divider other end, and 3 foot of A/D chips connects described capacitance C1 one end, and the capacitance C1 is another
With holding the A/D chips, 15 foot of A/D chips connects described capacitance C2 one end, while meets 5 foot of DC/DC isolation modules, institute
With stating another termination A/D chips of capacitance C2,5 foot of A/D chips connects described capacitance C3 one end, while meet the DC/DC
5 foot of isolation module, another termination A/D chips of capacitance C3；
HIGH PRESSURE TREATMENT circuit is used for the millivolt level voltage value for acquiring the high-voltage acquisition circuit and carries out A/D conversions；
The DC/DC isolation circuits include capacitance C1, capacitance C2, inductance L1, DC/DC isolation module U1, resistance R1, capacitance C3,
Capacitance C4.The capacitance C1 mono- is terminating the MCU power supplys just, another termination MCU power supplys, the capacitance C2 mono- terminates institute
State MCU power supplys just, another termination MCU power supplys, the inductance L1 mono- is terminating the MCU power supplys just, described in another termination
2 foot of DC/DC isolation modules, with connecing the MCU power supplys, 8 foot of DC/DC isolation modules hangs 1 foot of DC/DC isolation modules
Sky, 4 foot of DC/DC isolation modules with connecing the A/D chips, 5 foot of DC/DC isolation modules connect described resistance R1 one end,
Described capacitance C3 one end and described capacitance C4 one end, another termination A/D chips of resistance R1, the capacitance C3 is another
With terminating the A/D chips, the capacitance C3 is another with terminating the A/D chips；
DC/DC isolation circuits are used to provide isolation stable voltage to A/D chips and SPI isolating chips；
The SPI isolation circuits include isolating chip U1, capacitance C1, capacitance C50.2 foot of isolating chip, 8 feet meet the MCU
Power supply, with connecing the A/D chips, 1 foot of isolating chip, 7 feet connect the MCU power supplys for 9 foot of isolating chip, 15 feet
Just, while described capacitance C50 one end is connect, the capacitance C50 is another with terminating the MCU power supplys, 10 foot of isolating chip, 16
Foot connects 5 foot of DC/DC isolation modules, while connects described capacitance C1 one end, another termination A/D chips of capacitance C1
Ground, 3 foot of isolating chip connect the MCU SPI ports CS feet, and 4 foot of isolating chip meets the MCU SPI ports SCLK
Foot, 5 foot of isolating chip connect the MCU SPI ports SDI feet, and 6 foot of isolating chip meets the MCU SPI ports SDO
Foot.
SPI isolation circuits are used to A/D chip calculated values being reported to MCU by the way that spi bus is isolated, and reality is calculated by MCU
Actual value.
On the basis of said program and as the preferred embodiment of said program：Current divider selects in the high-voltage acquisition circuit
It must meet≤160mV with range.
On the basis of said program and as the preferred embodiment of said program：R1, R4 in the high-voltage acquisition circuit,
R5, R6, R7 are composed in series by multiple resistance.
On the basis of said program and as the preferred embodiment of said program：Resistance R1 in the high-voltage acquisition circuit,
R2, R3, R4, R5, R6, R7, R8 resistance value are changed according to battery pack actual platform voltage and relevant laws and regulations, need further to note
Meaning ground is that electric resistance partial pressure value, which need to meet A/D chips, can allow maximum value, i.e. ± 160mV.
On the basis of said program and as the preferred embodiment of said program：Resistance R1 in the high-voltage acquisition circuit,
The resistance of same levels can be selected for convenience of calculation in R4, R5, R6, R7.Further, resistance in the high-voltage acquisition circuit
The resistance of similar resistance can be selected for circuit symmetrical in R2, R3.
On the basis of said program and as the preferred embodiment of said program：In the high-voltage acquisition circuit switch S0,
S1, S2, S3, S4, S5 are optically isolated relay or high pressure optocoupler.
On the basis of said program and as the preferred embodiment of said program：ETR, ETS in the high-voltage acquisition circuit,
VBAT_IN partial pressure value ranges are ± 160mV.
On the basis of said program and as the preferred embodiment of said program：K1, K2 connect in the high-voltage acquisition circuit
Tentaculum is just bearing contactor for battery pack master with main.
On the basis of said program and as the preferred embodiment of said program：A/D chips in the HIGH PRESSURE TREATMENT circuit
Model is AS8510.
On the basis of said program and as the preferred embodiment of said program：In the DC/DC isolation circuits DC/DC every
It is F0503XT-1WR from module model.
On the basis of said program and as the preferred embodiment of said program：Resistance R1 in the DC/DC isolation circuits
It is to increase circuit load, specific resistance value is adjusted according to practice.
On the basis of said program and as the preferred embodiment of said program：Isolating chip in the SPI isolation circuits
Model is ADUM1401.
On the basis of said program and as the preferred embodiment of said program：Further include to battery pack insulating resistance value,
The step of total voltage acquisition of battery pack medial and lateral and calculating：
S1：S5 is disconnected, disconnects S3, disconnects S4, is closed S0, S1 is closed, measures battery pack PACK anodes, negative terminal divides chassis
Pressure value Va, Vb obtains formula 1：Va / [Rn //（R1+R2）]=Vb / [Rp //（R3+R4）]；
S2：If step S1 measured value Va≤Vb, S5 is disconnected, disconnects S4, is closed S0, is closed S1, is closed S2, is closed S3, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 2：Vc / [Rn//（R1+R2）//
R5] = Vd / [Rp//（R3+R4）]；
S3：The battery pack PACK anodes that are measured twice according to formula 1 and formula 2 and step S1 and step S2, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd calculate insulation resistance Rn, insulation resistance Rp values；
S4：If step S1 measured value Va ＜ Vb, S5 is disconnected, disconnects S3, is closed S0, is closed S1, is closed S2, is closed S4, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 3：Vc / [Rn//（R1+R2）]=
Vd /[Rp//（R3+R4）//R6]；
S5：The battery pack PACK anodes that are measured twice according to formula 1 and formula 3 and step S1 and step S4, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd, insulation resistance Rn, insulation resistance Rp values can be calculated；
S6：Total voltage on the inside of battery pack can obtain to Va, Vb absolute value summation measured in step S1；
S7：Contactor K1, contactor K2 are closed, and are closed S5, disconnect S0, disconnect S1, disconnect S2, disconnect S3, disconnect S4, you can
Total voltage on the outside of to battery pack.
The present invention is prominent and beneficial compared with prior art to be had the technical effect that：It is supervised by BMS multifunctional units high-pressure system
Survey scheme can effectively carry out electric automobile high-voltage dynamical system total pressure measurement simultaneously（Including the total pressure measurement of battery pack medial and lateral）、
Insulating monitoring and total current detection（Using current divider scheme）.Entire resolution circuitry form is simple, flexible design, accuracy of detection
Height, circuit reaction speed is fast, and cost is relatively low.
Description of the drawings
Fig. 1 is the high-voltage acquisition circuit diagram of the present invention.
Fig. 2 is the HIGH PRESSURE TREATMENT circuit diagram of the present invention.
Fig. 3 is the DC/DC isolates circuit diagrams of the present invention.
Fig. 4 is the SPI isolates circuit diagrams of the present invention.
Specific embodiment
Purpose, technical scheme and advantage to make the application are clearer, below in conjunction with the attached drawing in embodiment, to reality
The technical solution applied in example is clearly and completely described, it is clear that described embodiment is only that the application part is implemented
Example rather than whole embodiments.Based on the embodiment provided, those of ordinary skill in the art are not before creative work is made
All other embodiments obtained are put, shall fall in the protection scope of this application.
A kind of BMS multifunctional units high-pressure system monitoring scheme, including high-voltage acquisition circuit, HIGH PRESSURE TREATMENT circuit, DC/DC
Isolation circuit and SPI isolation circuits.
The high-voltage acquisition circuit is for the acquisition of battery pack total current and the acquisition of battery pack medial and lateral total voltage；
The HIGH PRESSURE TREATMENT circuit is used for the millivolt level voltage value for acquiring the high-voltage acquisition circuit and carries out A/D conversions；
The DC/DC isolation circuits are used to provide isolation stable voltage to A/D chips and SPI isolating chips；
The SPI isolation circuits are used to A/D chip calculated values being reported to MCU by the way that spi bus is isolated, and reality is calculated by MCU
Actual value.
As shown in figure 1 above：The high-voltage acquisition circuit includes switch S0, switch S1, resistance R1, resistance R2, resistance R3, electricity
Hinder R4, switch S3, resistance R5, resistance R6, switch S4, switch S5, resistance R7 and resistance R8.The switch S0 mono- terminates electronic vapour
Chassis, another termination A/D chips；The switch S1 mono- is terminating battery pack PACK just, another termination resistance R1 mono-
End；Described another described resistance R2 one end of termination of resistance R1, while 7 foot of A/D chips is connect, another termination A/ of resistance R2
D chips, the resistance R3 mono- is with terminating A/D chips, another to terminate described resistance R4 one end, while connects the A/D chips 8
Foot, described described switch S2 one end of another terminations of resistance R4, switch another termination battery pack PACK of S2 are born, the switch S3
Just, another described resistance R5 one end of termination, the resistance R5 is another with terminating A/D chips, the electricity by one termination battery pack PACK
Hinder R6 mono- with terminating A/D chips, another described switch S4 one end of termination, switch another termination battery pack PACK of S4 are born, institute
It states switch S5 mono- and is terminating battery pack LINK just, another described resistance R7 one end of termination, another termination resistance of resistance R7
R8 one end, while 9 foot of A/D chips is connect, another termination battery pack LINK of resistance R8 are born.
As preference, resistance Rn described in the high-voltage acquisition circuit, the resistance Rp are battery pack insulating resistance value.
As preference, current divider selected range must meet≤160mV in the high-voltage acquisition circuit.
As preference, R1, R4, R5, R6, R7 are composed in series by multiple resistance in the high-voltage acquisition circuit.
As preference, resistance R1, R2, R3, R4, R5, R6, R7, R8 resistance value is according to battery in the high-voltage acquisition circuit
Group actual platform voltage and relevant laws and regulations change, it should be further noted that ground is, electric resistance partial pressure value need to meet A/D chips institute
It can allow maximum value, i.e. ± 160mV.
As preference, phase can be selected for convenience of calculation in resistance R1, R4, R5, R6, R7 in the high-voltage acquisition circuit
The resistance of ad eundem.
As preference, the electricity of similar resistance can be selected for circuit symmetrical in resistance R2, R3 in the high-voltage acquisition circuit
Resistance.
As preference, switched in the high-voltage acquisition circuit S0, S1, S2, S3, S4, S5 for optically isolated relay or
High pressure optocoupler.
As preference, ETR, ETS, VBAT_IN partial pressure value range are ± 160mV in the high-voltage acquisition circuit.
As preference, K1, K2 contactor are just bearing contactor for battery pack master with main in the high-voltage acquisition circuit.
As shown in figure 2 above：The HIGH PRESSURE TREATMENT circuit includes A/D chips U2, capacitance C1, capacitance C2, capacitance C3.The A/
With connecing the A/D chips, 11 foot of A/D chips meets 14 foot of SPI isolating chips, the A/ for 10 foot of D chips, 14 feet, 6 feet
13 foot of D chips connects 11 foot of SPI isolating chips, and 12 foot of A/D chips connects 13 foot of SPI isolating chips, the A/D cores
18 foot of piece connects 12 foot of SPI isolating chips, and 4 foot of A/D chips, 20 feet, 19 feet, 17 feet, 16 feet are hanging, the A/D cores
1 foot of piece connects current divider one end, and 2 foot of A/D chips connects the current divider other end, and 3 foot of A/D chips meets the capacitance C1 mono-
End, A/D chips described in the capacitance C1 other ends, 15 foot of A/D chips connects described capacitance C2 one end, while connects described
5 foot of DC/DC isolation modules, another termination A/D chips of capacitance C2,5 foot of A/D chips meets the capacitance C3 mono-
End, while 5 foot of DC/DC isolation modules is connect, another termination A/D chips of capacitance C3.
As preference, A/D chip models are AS8510 in the HIGH PRESSURE TREATMENT circuit.
As shown in figure 3 above：The DC/DC isolation circuits include capacitance C1, capacitance C2, inductance L1, DC/DC isolation module
U1, resistance R1, capacitance C3, capacitance C4.The capacitance C1 mono- is terminating the MCU power supplys just, another termination MCU power supplys,
The capacitance C2 mono- is terminating the MCU power supplys just, another termination MCU power supplys, the inductance L1 mono- terminates the MCU electricity
Source just, another termination 2 foot of DC/DC isolation modules, 1 foot of DC/DC isolation modules with connecing the MCU power supplys, the DC/
8 foot of DC isolation modules is hanging, and with connecing the A/D chips, 5 foot of DC/DC isolation modules connects 4 foot of DC/DC isolation modules
Described resistance R1 one end, described capacitance C3 one end and described capacitance C4 one end, another termination A/D chips of resistance R1
Ground, another termination A/D chips of capacitance C3, another termination A/D chips of capacitance C3.
As preference, DC/DC isolation module models are F0503XT-1WR in the DC/DC isolation circuits.
As preference, in the DC/DC isolation circuits resistance R1 be increase circuit load, specific resistance value according to
Practice adjusts.
Further, as shown in figure 4 above：The SPI isolation circuits include isolating chip U1, capacitance C1, capacitance C50.Institute
State 2 foot of isolating chip, 8 feet with connecing the MCU power supplys, 9 foot of isolating chip, 15 feet with connecing the A/D chips, the isolation
1 foot of chip, 7 feet are connecing the MCU power supplys just, while connect described capacitance C50 one end, another terminations of capacitance C50 MCU electricity
Source, 10 foot of isolating chip, 16 feet connect 5 foot of DC/DC isolation modules, while connect described capacitance C1 one end, the electricity
With holding another termination A/D chips of C1,3 foot of isolating chip connects the MCU SPI ports CS feet, the isolating chip 4
Foot connects the MCU SPI ports SCLK feet, and 5 foot of isolating chip connects the MCU SPI ports SDI feet, the isolating chip 6
Foot connects the MCU SPI ports SDO feet.
As preference, isolating chip model is ADUM1401 in the SPI isolation circuits.
It should be noted that PACK just, PACK bear, LINK just, LINK is born is general saying, wherein PACK is just, PACK bears
Represent battery pack positive terminal and negative terminal, LINK just, LINK negative indications load anode and negative terminal.
Battery pack insulating resistance value, battery pack medial and lateral total voltage are acquired and calculated based on circuit of the present invention
Step：
S1：S5 is disconnected, disconnects S3, disconnects S4, is closed S0, S1 is closed, measures battery pack PACK anodes, negative terminal divides chassis
Pressure value Va, Vb obtains formula 1：Va / [Rn //（R1+R2）]=Vb / [Rp //（R3+R4）]；
S2：If step S1 measured value Va≤Vb, S5 is disconnected, disconnects S4, is closed S0, is closed S1, is closed S2, is closed S3, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 2：Vc / [Rn//（R1+R2）//
R5] = Vd / [Rp//（R3+R4）]；
S3：The battery pack PACK anodes that are measured twice according to formula 1 and formula 2 and step S1 and step S2, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd calculate insulation resistance Rn, insulation resistance Rp values；
S4：If step S1 measured value Va ＜ Vb, S5 is disconnected, disconnects S3, is closed S0, is closed S1, is closed S2, is closed S4, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 3：Vc / [Rn//（R1+R2）]=
Vd /[Rp//（R3+R4）//R6]；
S5：The battery pack PACK anodes that are measured twice according to formula 1 and formula 3 and step S1 and step S4, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd, insulation resistance Rn, insulation resistance Rp values can be calculated；
S6：Total voltage on the inside of battery pack can obtain to Va, Vb absolute value summation measured in step S1；
S7：Contactor K1, contactor K2 are closed, and are closed S5, disconnect S0, disconnect S1, disconnect S2, disconnect S3, disconnect S4, you can
Total voltage on the outside of to battery pack.
Above-described embodiment is only presently preferred embodiments of the present invention, is not limited the scope of the invention according to this, therefore：It is all according to
The equivalence changes that structure, shape, the principle of the present invention is done, should all be covered by within protection scope of the present invention.
Claims (5)
1. a kind of BMS multifunctional units high-pressure system monitoring scheme, including high-voltage acquisition circuit, HIGH PRESSURE TREATMENT circuit, DC/DC every
From circuit, SPI isolation circuits and MCU；
The high-voltage acquisition circuit includes switch S0, switch S1, resistance R1, resistance R2, resistance R3, resistance R4, switch S3, resistance
R5, resistance R6, switch S4, switch S5, resistance R7 and resistance R8；The switch S0 mono- termination electric automobile chassis, the other end
With connecing A/D chips；The switch S1 mono- is terminating battery pack PACK just, another described resistance R1 one end of termination；The resistance R1 is another
One described resistance R2 one end of termination, while 7 foot of A/D chips is connect, another termination A/D chips of resistance R2, the electricity
Hinder R3 mono- with terminating A/D chips, another described resistance R4 one end of termination, while 8 foot of A/D chips is connect, the resistance R4 is another
The described switch S2 one end of one termination, switch another termination battery pack PACK of S2 are born, and the switch S3 mono- terminates battery pack
Just, another described resistance R5 one end of termination, the resistance R5 is another with terminating A/D chips, and the resistance R6 mono- terminates A/D by PACK
Chip, another described switch S4 one end of termination, switch another termination battery pack PACK of S4 are born, and the switch S5 mono- is terminated
Just, another described resistance R7 one end of termination, the resistance R7 is another to terminate described resistance R8 one end, while meet institute to battery pack LINK
9 foot of A/D chips is stated, another termination battery pack LINK of resistance R8 are born；
The HIGH PRESSURE TREATMENT circuit includes A/D chips U2, capacitance C1, capacitance C2, capacitance C3；10 foot of A/D chips, 14 feet, 6
With connecing the A/D chips, 11 foot of A/D chips connects 14 foot of SPI isolating chips to foot, and 13 foot of A/D chips connects described
11 foot of SPI isolating chips, 12 foot of A/D chips connect 13 foot of SPI isolating chips, and 18 foot of A/D chips meets the SPI
12 foot of isolating chip, 4 foot of A/D chips, 20 feet, 19 feet, 17 feet, 16 feet are hanging, and 1 foot of A/D chips connects current divider one
End, 2 foot of A/D chips connect the current divider other end, and 3 foot of A/D chips connects described capacitance C1 one end, and the capacitance C1 is another
With holding the A/D chips, 15 foot of A/D chips connects described capacitance C2 one end, while meets 5 foot of DC/DC isolation modules, institute
With stating another termination A/D chips of capacitance C2,5 foot of A/D chips connects described capacitance C3 one end, while meet the DC/DC
5 foot of isolation module, another termination A/D chips of capacitance C3；
The DC/DC isolation circuits include capacitance C1, capacitance C2, inductance L1, DC/DC isolation module U1, resistance R1, capacitance C3,
Capacitance C4；The capacitance C1 mono- is terminating the MCU power supplys just, another termination MCU power supplys, the capacitance C2 mono- terminates institute
State MCU power supplys just, another termination MCU power supplys, the inductance L1 mono- is terminating the MCU power supplys just, described in another termination
2 foot of DC/DC isolation modules, with connecing the MCU power supplys, 8 foot of DC/DC isolation modules hangs 1 foot of DC/DC isolation modules
Sky, 4 foot of DC/DC isolation modules with connecing the A/D chips, 5 foot of DC/DC isolation modules connect described resistance R1 one end,
Described capacitance C3 one end and described capacitance C4 one end, another termination A/D chips of resistance R1, the capacitance C3 is another
With terminating the A/D chips, the capacitance C3 is another with terminating the A/D chips；
The SPI isolation circuits include isolating chip U1, capacitance C1, capacitance C50；2 foot of isolating chip, 8 feet meet the MCU
Power supply, with connecing the A/D chips, 1 foot of isolating chip, 7 feet connect the MCU power supplys for 9 foot of isolating chip, 15 feet
Just, while described capacitance C50 one end is connect, the capacitance C50 is another with terminating the MCU power supplys, 10 foot of isolating chip, 16
Foot connects 5 foot of DC/DC isolation modules, while connects described capacitance C1 one end, another termination A/D chips of capacitance C1
Ground, 3 foot of isolating chip connect the MCU SPI ports CS feet, and 4 foot of isolating chip meets the MCU SPI ports SCLK
Foot, 5 foot of isolating chip connect the MCU SPI ports SDI feet, and 6 foot of isolating chip meets the MCU SPI ports SDO
Foot.
2. a kind of BMS multifunctional units high-pressure system monitoring scheme according to claim 1, it is characterised in that：The height
Current divider selected range must meet≤160mV in pressure Acquisition Circuit.
3. a kind of BMS multifunctional units high-pressure system monitoring scheme according to claim 1, it is characterised in that：The height
Pressing R1, R4, R5, R6, R7 in Acquisition Circuit is composed in series by multiple resistance.
4. a kind of BMS multifunctional units high-pressure system monitoring scheme according to claim 1, it is characterised in that：The height
It is optically isolated relay or high pressure optocoupler to press switch S0, S1, S2, S3, S4, S5 in Acquisition Circuit.
5. a kind of BMS multifunctional units high-pressure system monitoring scheme according to claim 1, it is characterised in that：It further includes
The step of to battery pack insulating resistance value, the acquisition of battery pack medial and lateral total voltage and calculating：
S1：S5 is disconnected, disconnects S3, disconnects S4, is closed S0, S1 is closed, measures battery pack PACK anodes, negative terminal divides chassis
Pressure value Va, Vb obtains formula 1：Va / [Rn //（R1+R2）]=Vb / [Rp //（R3+R4）]；
S2：If step S1 measured value Va≤Vb, S5 is disconnected, disconnects S4, is closed S0, is closed S1, is closed S2, is closed S3, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 2：Vc / [Rn//（R1+R2）//
R5] = Vd / [Rp//（R3+R4）]；
S3：The battery pack PACK anodes that are measured twice according to formula 1 and formula 2 and step S1 and step S2, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd calculate insulation resistance Rn, insulation resistance Rp values；
S4：If step S1 measured value Va ＜ Vb, S5 is disconnected, disconnects S3, is closed S0, is closed S1, is closed S2, is closed S4, then
Secondary battery pack PACK anodes, the negative terminal measured is to partial pressure value Vc, Vd on chassis.Obtain formula 3：Vc / [Rn//（R1+R2）]=
Vd /[Rp//（R3+R4）//R6]；
S5：The battery pack PACK anodes that are measured twice according to formula 1 and formula 3 and step S1 and step S4, negative terminal are to chassis
Partial pressure value Va, Vb and Vc, Vd, insulation resistance Rn, insulation resistance Rp values can be calculated；
S6：Total voltage on the inside of battery pack can obtain to Va, Vb absolute value summation measured in step S1；
S7：Contactor K1, contactor K2 are closed, and are closed S5, disconnect S0, disconnect S1, disconnect S2, disconnect S3, disconnect S4, you can
Total voltage on the outside of to battery pack.
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