CN105845594B - The method for checking the printed circuit board of semiconductor packages - Google Patents

The method for checking the printed circuit board of semiconductor packages Download PDF

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Publication number
CN105845594B
CN105845594B CN201610172885.2A CN201610172885A CN105845594B CN 105845594 B CN105845594 B CN 105845594B CN 201610172885 A CN201610172885 A CN 201610172885A CN 105845594 B CN105845594 B CN 105845594B
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China
Prior art keywords
installation region
pcb
visible system
chip
printed circuit
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CN201610172885.2A
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Chinese (zh)
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CN105845594A (en
Inventor
郑显权
池升龙
李贞均
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Hanmi Semiconductor Co Ltd
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Hanmi Semiconductor Co Ltd
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Priority claimed from KR1020120048631A external-priority patent/KR101325634B1/en
Priority claimed from KR1020120063195A external-priority patent/KR101372379B1/en
Application filed by Hanmi Semiconductor Co Ltd filed Critical Hanmi Semiconductor Co Ltd
Publication of CN105845594A publication Critical patent/CN105845594A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83908—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving monitoring, e.g. feedback loop

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

A kind of method for disclosing printed circuit board for checking semiconductor packages, is executed, engagement device includes: chip feed unit by engagement device；Pre-alignment unit including the 4th visible system, the system are used to shoot the installation region of printed circuit board (PCB), allow to install multiple chips respectively on installation region；Bonded stage；For each chip to be transmitted to the engagement extractor of bonded stage from chip feed unit；And first visible system, for shooting the installation region of the PCB in bonded stage, this method comprises: preparation has the PCB of multiple installation regions, wherein will install multiple chips respectively on multiple installation regions；Multiple image taking is executed by using each installation region of the 4th visible system to the PCB being set on pre-alignment unit, to obtain multiple positional values of each installation region of PCB；Multiple positional values with according to each installation region of PCB, determine the final position value of each installation region of PCB.

Description

The method for checking the printed circuit board of semiconductor packages
The application be the applying date be on May 07th, 2013, application No. is 201310164735.3, entitled " check The divisional application of the application for a patent for invention of the method for the printed circuit board of semiconductor packages ".
Technical field
The present invention relates to a kind of methods of printed circuit board (PCB) for checking semiconductor packages more particularly to one kind to mention The precision when pattern of the height shooting installation region PCB substantially ensures the general inspection time without reducing hourly output (UPH), simultaneously Quickly check the method for the PCB of the inspection semiconductor packages of the defect of the installation region PCB.
Background technique
It is generally desirable to perform with high precision the technique that semiconductor chip is fitted to PCB, PCB, which has, wherein to be fixed Multiple installation regions of semiconductor chip.
In addition, the installation region of semiconductor chip and PCB need to be electrically connected with high precision.In order to reduce ratio of defects, Semiconductor chip needs to be mounted at the exact position (pattern) of installation region.
The technique of installation semiconductor chip can be described as joint technology.The characteristic of the joint technology of precision as needed (specificity), it completes to the integral position of PCB and the wherein PCB region (installation region) of fixed semiconductor chip After the inspection of position, semiconductor chip is installed on substrate.
In this regard, the semiconductor chip formed on the location information and PCB of usable visible system (vision) acquisition PCB is solid Determine the location information of portion (installation region).It can be used multiple reference coordinates (such as reference mark) identification PCB's formed on PCB Position.In addition, location information (or the position of the installation region formed on PCB can be obtained by shooting the pattern of corresponding installation region Set value).
Mounting process needs very high precision, thus needs accurately to identify the position of all semiconductor chip fixed parts Information.It is then desired to highly precisely check the pattern of installation region.
Meanwhile flip-chip bond device may include multiple engaging heads, each engaging head may pass to flip-chip Semiconductor chip is extracted or is installed in the predetermined position of engagement device.
In this regard, by being mounted to the bench type transmission device intersected in X-axis and Y direction, engaging head be may pass to Predetermined position on X-Y plane.
Engaging head can be to accelerate at a high speed in transmit process.When repeating High Speed Transfer technique, at composition every Heat can be generated in the component of transmission line, specific components can be thermally expanded due to heat, and the precision for transmitting position is caused to reduce.
In addition, in shooting process, the transmission of engaging head has influence (such as vibration) to visible system, because of this vibration It is dynamic to be applied to visible system, so the precision of visible system reduces in shooting process.
In addition, flip-chip bond device may include multiple visible systems in different operating area, visible system can It is transferred in its entirety together with engaging head.In this regard, vibrating that by the mobile bring for the visible system being mounted in different operating area This effect, thus the precision when shooting the pattern of installation region reduces.
Therefore, it is necessary to it is a kind of can quickly accurate check pattern to obtain the inspection semiconductor package of the location information of installation region The method of the PCB of dress.
PCB has the multiple installation regions arranged in the matrix form, and can mark on PCB indicates that corresponding installation region is The no defective label of tool.
Each installation region can be made label to sense defect, check installation region before installing semiconductor chip With the presence or absence of defect, and semiconductor chip only is installed on the installation region for not having defect.
Visible system can be used to confirm this label, visible system is sent to corresponding installation region, to confirm installing zone The label in domain is simultaneously remain stationary for shooting.That is, visible system is by repeating mobile and stopping and formed on PCB The corresponding number of the quantity of installation region, sensing whether there is defect.
Thus, visible system shoots the label of each installation region with stationary state, and thus the review time of PCB increases, Entire manufacturing process is delayed by.
In addition, sensing installation region whether there is defect after, by visible system obtain PCB location information and The location information of the semiconductor chip fixed part (installation region) formed on PCB.The multiple reference coordinates formed on PCB can be used The position of (such as reference mark) identification PCB.It is formed on PCB in addition, can be obtained by shooting the pattern of corresponding installation region The location information of installation region.
Mounting process needs very high precision, thus needs accurately to identify the position of all semiconductor chip fixed parts Information.It is then desired to highly precisely check the pattern of installation region.
Therefore, it is necessary to it is a kind of can quickly accurate check mark with sense whether there is defect and quickly accurate check pattern with The method for obtaining the PCB of the inspection semiconductor packages of the location information of installation region.
Summary of the invention
Therefore, the present invention is intended to provide one caused by one kind is substantially overcomed due to limitations and shortcomings of the prior art The method of the PCB of the inspection semiconductor packages of a or multiple problems.
It is an object of the present invention to provide a kind of methods of printed circuit board (PCB) for checking semiconductor packages, can be fast The fast accurate pattern for checking the installation region PCB.
It is a further object to provide the methods of PCB for checking semiconductor packages a kind of, and shooting installation can be improved The precision when pattern in region.
A further object of the present invention is to provide the method for PCB for checking semiconductor packages a kind of, can be sufficiently ensured total inspection The time is looked into without reducing hourly output (UPH).
It is also another object of the present invention to provide the methods of PCB for checking semiconductor packages a kind of, can make the biography of transmission line Send operation it is minimized, reduce the location error as caused by the heat of generation, and prevent due to transfer operation generate vibration and Caused shooting precision reduces.
It is also another object of the present invention to provide the method for PCB for checking semiconductor packages a kind of, it can quickly check that PCB pacifies Fill the defect in region.
It is also another object of the present invention to provide the methods of PCB for checking semiconductor packages a kind of, can connect in flip-chip The defect and pattern of PCB are quickly accurately checked before closing technique.
Attendant advantages of the invention, purpose and feature will be listed in the following description, these advantages, purpose and feature A part is it will be apparent that can be from reality of the invention for one skilled in the art from following description It applies and understands.This of the invention can be realized and obtained by the structure specifically noted in specification, claims and attached drawing A little purposes and other advantages.
In order to achieve these and other advantages and intention according to the present invention, as embodied and be broadly described herein, one The method that kind checks the printed circuit board (PCB) of semiconductor packages, the method pass through engagement device and execute, the engagement device It include: chip feed unit；Bonded stage；For multiple chips to be transmitted to the engagement extractor of the bonded stage；And first Visible system, first visible system are used to shoot the installation region of the PCB, allow to pacify respectively on the installation region Fill the chip, which comprises (a) preparation has the PCB of multiple installation regions, wherein on the multiple installation region The multiple chip will be installed respectively；(b) by using first visible system to the PCB being set in the bonded stage Each installation region execute multiple image taking, to obtain multiple positional values of each installation region of the PCB；(c) According to multiple positional values of each installation region of the PCB, the final position value of each installation region of the PCB is determined.
First visible system may be provided at the side of the engagement extractor.
The final position value of each installation region can be the average value of multiple positional values of each installation region.
The final position value of each installation region can be to be obtained and filtering out the value in noise figure or preset range The average value of multiple positional values.
It can be while changing at least one condition in the set that following condition is constituted, by shooting multiple figures As executing step (b), the condition includes: light intensity, time for exposure, light source type and the distance away from the PCB.
The engagement device may also include inspection unit, and the inspection unit includes being installed on the PCB for checking Chip installation condition the second visible system, the inspection unit is installed on using the second visible system multiple checks Each chip on the PCB.
The engagement device may also include that fluxing unit, the fluxing unit pass through institute for keeping solder flux to be coated on Engagement extractor is stated from each chip that the chip feed unit transmits；And third visible system, the third are visual The side of the fluxing unit and the following table for checking each chip by the engagement extractor transmission is arranged in system Face, the fluxing unit and the third visible system may be provided at and be parallel on the axis of Y direction.
The installation region may include the first installation region and the second installation region, and step (b) further includes following step: About first installation region with the presence or absence of mark while first visible system is moved to first installation region Capable shooting is remembered into, to detect whether that there is label.
Step (b) may include following step: when sensing the label of first installation region, the described first visual system System is not parked in the reference position of first installation region, but is moved to and first peace in first visible system The label of second installation region is continuously shot while dress adjacent second installation region in region.
The installation region may include the first installation region and the second installation region, and step (b) further includes following step: will First visible system is moved to the first reference position for being formed in the at the edge part of first installation region；Described First reference position repeatedly shoots the first pattern of first installation region；And first visible system is mobile While to the second reference position of the another side edge portion for being formed in first installation region, about first installation Region is shot with the presence or absence of label.
The method may also include that when not sensing the label, and first visible system is being parked in described After second reference position of one installation region, the of first installation region is repeatedly shot in second reference position Two patterns.
The method may also include that when sensing the label, and first visible system is moved to and described First reference position of adjacent second installation region in one installation region, rather than first visible system is parked in institute State the second reference position of the first installation region.
The method may also include that by checking that the reference mark of the PCB confirms the reference position of each installation region.
The of first installation region can be determined respectively according to by the positional value of the first and second patterns of multiple checks One and second pattern position.
In another aspect of this invention, a kind of method of printed circuit board checking semiconductor packages, the method are provided It is executed by engagement device, the engagement device includes: chip feed unit；Pre-alignment unit including the 4th visible system, 4th visible system is used to shoot the installation region of the printed circuit board, allows to install respectively on the installation region Multiple chips；Bonded stage；For each chip to be transmitted to the engagement extractor of the bonded stage from the chip feed unit； And first visible system, first visible system are used to shoot the installation region of the printed circuit board in the bonded stage, The described method includes: (a) preparation has the printed circuit board of multiple installation regions, wherein will on the multiple installation region The multiple chip is installed respectively；(b) by using the 4th visible system to the print being set on the pre-alignment unit Each installation region of printed circuit board executes multiple image taking, with obtain the printed circuit board each installation region it is more A positional value；(c) according to multiple positional values of each installation region of the printed circuit board, the printed circuit board is determined Each installation region final position value.
It should be appreciated that present invention front being generally described and following detailed description be all it is illustrative and explanatory, It is intended to provide further explanation to claimed invention.
Detailed description of the invention
It is further understood to present invention offer and is incorporated into the attached drawing diagram for forming the application a part in the application Embodiments of the present invention, and be used to illustrating the principle of the present invention together with specification.In the accompanying drawings:
Fig. 1 is the plan view of flip-chip bond device according to an embodiment of the present invention；
Fig. 2 is the side view of engaging head according to an embodiment of the present invention；
Fig. 3 is the schematic diagram for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention；
Fig. 4 is the principle for the method for the PCB for describing the inspection semiconductor packages of another embodiment according to the present invention Figure；
Fig. 5 is the curve graph for describing the method for the PCB according to the present invention for checking semiconductor packages；
Fig. 6 is the plan view of PCB, for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention Method；
Fig. 7 is the effect for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention Curve graph；
Fig. 8 is the curve graph for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention；
Fig. 9 is the plan view of PCB according to an embodiment of the present invention；
Figure 10 is the plan view of the PCB of another embodiment according to the present invention；
Figure 11 is the principle for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention Figure；And
Figure 12 is the principle for the method for the PCB for describing the inspection semiconductor packages of another embodiment according to the present invention Figure.
Specific embodiment
It will be described in the preferred embodiment of the present invention now, some examples of these embodiments illustrated in attached drawing Son.To make that the same or similar component is designated by like reference numerals throughout throughout the drawings as much as possible.
Below in reference to the printed circuit of the inspection semiconductor packages of attached drawing detailed description according to an embodiment of the present invention The method of plate (PCB).Attached drawing is merely for illustration, and providing attached drawing is to fully describe embodiment party of the invention Formula.Thus, attached drawing is understood not to limit the scope of the invention.
In addition, throughout the drawings, similar reference marker indicates similar or corresponding element, to the detailed of these elements Description can only provide primary.In the accompanying drawings, for ease of description, the size and shape of element may be enlarged or reduced.
In addition, it should be understood that although describing various elements, these elements using term " first ", " second " etc. herein It should not be construed as being limited to these terms.These terms are only used for distinguishing an element and another element.
Fig. 1 is the plan view of flip-chip bond device 1000 according to an embodiment of the present invention.Fig. 2 is according to this hair The side view of the engaging head of a bright embodiment.
Flip-chip bond is such a technique, that is, chip is cut into multiple chips using sawing device, is extracted every The permission that each chip is mounted on printed circuit board (PCB) is simultaneously being distinguished each of chip with reference to engagement by a chip above On position (i.e. installation region).
Flip-chip bond technique can include: every to extract by using the top surface of extractor (picker) absorption chip A chip；By extractor rotate 180 ° so that chip on the upside of turn under overturning step；It is extracted using engagement extractor by extracting Chip is transmitted to the transfer step of engagement extractor by the chip that device extracts；Chip is impregnated by mobile engagement extractor In solder flux, thus the solder flux application step of the lower surface with solder flux coated chip；Check the extraction for being coated with the chip of solder flux The step of position；And it is transmitted to bonded stage by the way that extractor will be engaged, chip is mounted on to the phase of the PCB in bonded stage It should be with reference to the engagement step on bonding station.
Below in reference to each of attached drawing detailed description flip-chip bond device 1000 (hereinafter also referred to engagement device) Element.
Referring to Fig.1 with 2, flip-chip bond device 1000 includes: chip feed unit 100, for supplying wafer W；It is brilliant Blade unit 200, for loading the wafer W supplied by chip feed unit 100；Extractor 300 is overturn, for extracting wafer cell Multiple chip U that the wafer W loaded on 200 is cut into；Engaging head 400 (1) and 400 (2), can be in X-axis, Y-axis and Z-direction Upper movement, can be relative to Z axis with the rotation of the angle θ, and receives chip from each overturning extractor 300 to extract chip；Fluxing unit 510 (1) and 510 (2), by mobile engaging head 400 (1) and 400 (2), fluxing unit 510 (1) and 510 (2) are for keeping weldering Agent f is coated on the lower surface of the chip by engaging head 400 (1) and 400 (2) extraction；Bonded stage 700, in bonded stage 700 Lower surface is provided with PCB, and the chip U for being coated with solder flux f will be installed on PCB；And control unit, it is extracted for controlling overturning Device 300, engaging head 400 (1) and 400 (2) and fluxing unit 510 (1) and 510 (2).
In addition, engaging head 400 (1) and 400 (2) can respectively include: engagement extractor 410 (1) and 410 (2), for extracting The chip for being downwardly turned over upside by overturning extractor 300；And first visible system 430 (1) and 430 (2), at one Preset distance is spaced apart with engagement extractor 410 (1) and 410 (2) respectively in transverse direction.
In addition, flip-chip bond device 1000 includes at least one alignment information feed unit 520, alignment information supply Unit 520 includes reference mark (FM), and alignment information feed unit 520 can be to the first of each engaging head 400 (1) and 400 (2) Visible system 430 (1) and 430 (2) provide the location information about reference mark FM.
When each element for including in flip-chip bond device 1000 is (for example, overturning extractor 300, engaging head 400 (1) and 400 (2), fluxing unit 510 (1) and 510 (2), bonded stage 700, wafer cell 200, chip feed unit 100, transmission Line etc.) due to duplicate technique and the relative position of thermal deformation or each element due to flip-chip bond device 1000 generate Vibration or the vibration that generates of external factor and when changing, alignment information feed unit 520 can provide the phase about each element To the information (direction of the distance and variation that change) of change in location.
In particular, the engaging head 400 (1) of flip-chip bond device 1000 and 400 (2) pass through platform as shown in Figure 1 Frame structure or similar structures are mobile, thus generate heat for the motor of driving, in setting engaging head 400 (1) and 400 (2) It is easy to generate error due to heat when value.In addition, it is important that checking due in flip-chip bond device 1000 The vibration that is generated in operating process and in a manufacturing process caused by variation (such as degree of deformation) and correct the deformation.Below Description is used to for engaging head 400 (1) and 400 (2) being transmitted to the horse structure of any position on X-Y plane.
In addition, engaging head 400 (1) and 400 (2) are mounted in wafer cell 200, overturning extractor 300, fluxing unit It can be moved vertically, and be mounted to above 510 (1) and 510 (2), third visible system 530 (1) and 530 (2) and bonded stage 700 It can laterally be moved between wafer cell 200, bonded stage 700, fluxing unit 510 (1) and 510 (2) and overturning extractor 300 It is dynamic.In particular, as shown in fig. 1, engaging head 400 (1) and 400 (2) are mounted to along the first transmission line 1300 (1) and 1300 (2) It moves in the X-axis direction, and is mounted to move in the Y-axis direction along the second transmission line 1100 (1) and 1100 (2).
In this regard, the first transmission line 1300 (1) and 1300 (2) and the second transmission line 1100 (1) and 1100 (2) have overlapping Horse structure simultaneously can be configured to any position being transmitted to engaging head 400 (1) and 400 (2) on X-Y plane.The number of transmission line Amount can increase or decrease as needed.
In addition, wafer cell 200, fluxing unit 510 (1) and 510 (2), bonded stage 700 and overturning extractor 300 can pacify In the space limited by the first transmission line 1300 (1) and 1300 (2) and the second transmission line 1100 (1) and 1100 (2).
Referring to Fig.1, engaging head 400 (1) and 400 (2) structure having the same and can be separately mounted to be separated from each other At second transmission line 1100 (1) of preset distance and 1100 (2).
Referring to Fig. 2, engagement extractor 410 (1) includes: directly to transmit vacuum adsorption force to chip to extract the absorption of chip First 411；And connection adsorption head 411 transmits the connecting component of vacuum adsorption force with engaging head 400 (1) and to adsorption head 411 415.Adsorption head 411 can rotate clockwise and/or counterclockwise the chip of extraction relative to Z axis.Therefore, adsorption head 411 can controlled θ amendment is executed to the position of chip under the control of unit processed.
First visible system 430 (1) of engaging head 400 (1) is mounted in transverse direction (for example, Y-axis shown in Fig. 2 Direction) with engagement extractor 410 (1) be spaced apart preset distance, i.e. first distance.In order to prevent when engagement extractor 410 (1) mentions Coring piece interferes when chip is immersed in solder flux f, the first visible system 430 with the space of the first visible system 430 (1) (1) it may be mounted to the adsorption head 411 for making the lens surface of the first visible system 430 (1) be set to engagement extractor 410 (1) Above absorption surface.
In addition, the first visible system 430 (1) may include light source unit 440 (1), light source unit 440 (1) may include direct light Unit 441 and sidelight unit 442.First visible system 430 (1) obtains the benchmark of at least one alignment information feed unit 520 The PCB's of the location information of flag F M, the location information of each chip of wafer W and bonded stage 700 will install each core The location information of the reference bonding station of piece.
The location information that first visible system 430 (1) and 430 (2) obtain is sent to control unit, and control unit calculates Location information, to execute each by mobile engaging head 400 (1) and 400 (2) and/or engagement extractor 410 (1) and 410 (2) The X-axis amendment and Y-axis amendment of the position of chip.
In addition, shooting each engagement extractor 410 (1) and 410 (2) from the lower section of engagement extractor 410 (1) and 410 (2) Adsorption head 411 and the third visible system 530 (1) and 530 (2) (i.e. lower part visible system) of each chip may be provided at and be located at Each engaging head 400 (1) between fluxing unit 510 (1) and 510 (2) and bonded stage 700 and in the movement routine of 400 (2).
Third visible system 530 (1) and 530 (2) are used to engagement extractor 410 (1) and chip is collected in 410 (2) The camera of location information.In particular, third visible system 530 (1) and 530 (2) shoot each engagement extractor 410 (1) and The suction of the center of the adsorption head 411 of 410 (2) engagement extractor 410 (1) and 410 (2) whether consistent with the center of chip, each The center of attached head 411 and the offset distance at the center of chip, chip are relative to each extractor 410 (1) and 410 (2) of engaging The alignment of convex block (sphere) etc. formed in the misalignment angle of adsorption head 411, chip.
In addition, third visible system 530 (1) and 530 (2) may be provided at the movement routine of engaging head 400 (1) and 400 (2) Lower section is shot so as to look up.Third visible system 530 (1) and 530 (2) can be look up it is visual System.
By shooting the lower surface of the chip (flip-chip) adsorbed respectively by engaging head 400 (1) and 400 (2), can obtain The information of position about each chip etc..In addition, third visible system 530 (1) and 530 (2) even can be by shooting just quilt A single point on the lower surface of the chip of transmission determines the journey of deformation (rotation) according to the location information of the chip of initial input Degree and the variable quantity of chip in one direction.It is preferable, however, that 1 points of shooting, more accurately to extract image.
In addition, can be performed primary two when the visual field (FOV) that chip is located at third visible system 530 (1) and 530 (2) is interior Point shooting (once photo taking operation), with the position of each chip of image recognition from shooting.However, when chip be not located at third can When in viewing system 530 (1) and the FOV of 530 (2), two o'clock twice can be performed and shoot.As described above, lower surface be soaked in it is each Chip in fluxing unit 510 (1) and the solder flux x of 510 (2) is sent to bonded stage 700.
Meanwhile by for being passed along the first transmission line 1300 (1) and 1300 (2) and the second transmission line 1100 (1) and 1100 (2) The heat of the moving portion and driving part generation of sending each element can lead to location error, and this position caused by thermally expanding is missed Difference can reduce the precision of flip-chip bond technique.Thus, in order to minimize thermal expansion, it is contemplated that following methods, that is, make edge The biography for each element (such as third visible system 530 (1) and 530 (2)) that every transmission line transmits in X-axis or Y direction Number or transmitting range is sent to minimize.
For this operation, in flip-chip bond device 1000, third visible system 530 (1) and 530 (2) and solder flux Unit 510 (1) and 510 (2) can be respectively arranged at and the second transmission line 1100 (1) and 1100 (2) (i.e. Y-axis sides in parallel with each other To) on parallel any axis, therefore, the transmission times of element in the X-axis direction can be reduced once.In addition, when element is in X-axis side When upward transmission stops one time, heated gantry drive motors can be cooled, thus can reduce thermal deformation.
In addition, overturning extractor 300, third visible system 530 (1) and 530 (2) and fluxing unit 510 (1) and 510 (2) It can be respectively arranged in parallel with each other on any axis parallel with the second transmission line 1100 (1) and 1100 (2) (i.e. Y direction), Therefore, the transmission times of element in the X-axis direction can be reduced twice.In addition, when the transmission of element in the X-axis direction stops twice When, heated gantry drive motors can be cooled, thus can reduce thermal deformation.
Bonded stage 700 is provided with will be in the PCB of chip above.In addition, being provided in the front side of bonded stage 700 pre- Aligned units 600, pre-alignment unit 600 check position and the alignment information of PCB in advance.
Pre-alignment unit 600 may include the 4th visible system 610.(whole inspection is collected and checked to 4th visible system 610 Look into) location information and printed circuit state of each PCB, and collect the ginseng about the PCB that will install each chip above Examine the location information (such as pattern) of bonding station.
When flip-chip bond device 1000 includes pre-alignment unit 600, position and alignment information are (for example, installing zone Domain and the position of pattern etc.) PCB that has been checked in advance is sent to bonded stage 700, it thus can shorten PCB in bonded stage 700 Position and alignment information review time.That is, pre-alignment unit 600 to all installation regions of PCB each Whole inspection is executed, bonded stage 700 is only checked from shape on some installation regions for the PCB that the transmission of pre-alignment unit 600 comes or PCB At FM, from there through drawing technique obtain PCB position and alignment information.It is therefore possible to shorten in bonded stage 700 PCB position Set the review time with alignment information.
In addition, control unit control overturning extractor 300, engaging head 400 (1) and 400 (2) and fluxing unit 510 (1) and 510(2).In particular, control unit according to by the first visible system 430 (1) and 430 (2), third visible system 530 (1) and The location information that 530 (2) and the 4th visible system 610 obtain, for the reference bonding station (installing zone of the PCB of bonded stage 700 Domain) each chip of amendment position.That is, control unit is according to by the first visible system 430 (1) and 430 (2), third The X-axis of chip position is repaired in the location information that visible system 530 (1) and 530 (2) and the 4th visible system 610 obtain, execution Just, Y-axis amendment and θ amendment.
In addition, when flip-chip bond device 1000 each element (such as overturning extractor 300, engaging head 400 (1) With 400 (2), fluxing unit 510 (1) and 510 (2), bonded stage 700, wafer cell 200, chip feed unit 100, transmission line Deng) due to duplicate manufacturing process and when thermal deformation, control unit is according to by the first visible system 430 (1) and 430 (2) acquisition At least one alignment information feed unit 520 location information come deflection (error caused by calculating due to thermal deformation Value), the position of the reference engaging zones of PCB is accurately calculated, and the adjustment engagement extractor when executing flip-chip bond technique The reference coordinate of 410 (1) and 410 (2) thus corrects the position of chip.
In addition, control unit control overturning extractor 300 returns to chip after overturning extractor 300 extracts chip The predetermined position of 200 top of unit.That is, control unit control overturning extractor 300 so that pre-position always Execute the work that the chip that upside is downwardly turned over is transmitted to from overturning extractor 300 and engages extractor 410 (1) and 410 (2) Skill.In this regard, predetermined position used herein is such position, in the position, the chip that upside is downwardly turned over is sent to Engage extractor 410 (1) and 410 (2).
As described above, the pattern of the installation region of shooting PCB is extremely important to reduce ratio of defects.In particular, several in needs During the flip-chip bond device 1000 of micron accuracy is equal, since error amount caused by vibrating can also influence equipment very significantly Precision, thus be applied to accordingly for accurate camera site, the vibration of corresponding visible system and from the element just transmitted It the vibration of visible system and is minimized, is needed from applying the installation region shot when vibration by the vibration that other external force generate Location information (pattern) removal by vibrate caused by influence.
Below in reference to the side of the PCB of the inspection semiconductor packages of attached drawing detailed description according to an embodiment of the present invention Method.
Fig. 3 is the schematic diagram for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention. Fig. 4 is the schematic diagram for the method for the PCB for describing the inspection semiconductor packages of another embodiment according to the present invention.Fig. 5 is For describing the curve graph of the method for the PCB according to the present invention for checking semiconductor packages.
The method of the PCB of inspection semiconductor packages according to an embodiment of the present invention is related to shooting flip-chip bond dress The method for setting the pattern of 1000 PCB 10, flip-chip bond device 1000 include chip feed unit 100, fluxing unit 510 (1) and 510 (2), pre-alignment unit 600, bonded stage 700 and the first visible system 430 (1) and 430 (2), first can Viewing system 430 (1) and 430 (2) are used to shoot the installation region 11 of each PCB 10, will install respectively on installation region 11 Chip made of being cut as wafer W.
In addition, engagement device 1000 may include chip feed unit 100, bonded stage 700, multiple chips be transmitted to engagement The engagement extractor 410 (1) of platform 700 and the first visible system 430 (1), the shooting of the first visible system 430 (1) allow chip It is separately mounted to the installation region of PCB thereon.
The method of the PCB of inspection semiconductor packages according to an embodiment of the present invention includes: that (a) preparation has multiple peaces The PCB for filling region, will install multiple chips respectively on multiple installation regions；(b) by using the first visible system 430 (1) multiple image taking is carried out to each installation region for the PCB being set in bonded stage, to obtain each installing zone of PCB Multiple positional values in domain；And each installation region of PCB (c) is determined according to multiple positional values of each installation region of PCB Final position value.
By shooting the pattern of corresponding installation region, the positional value of the installation region formed on PCB can be obtained.
First visible system 430 (1) may be provided at the side of engagement extractor 410 (1).
The final position value of each installation region can be the average value of multiple positional values of each installation region.
The final position value of each installation region can be to be obtained and filtering out the value in noise figure or preset range The average value of multiple positional values.
It can be while changing at least one condition in the set that following condition is constituted, by shooting multiple images It executes step (b), these conditions include: light intensity, time for exposure, light source type and the distance away from PCB.
Flip-chip bond device 1000 can further comprise inspection unit 800, and inspection unit 800 includes for checking peace Second visible system 810 of the installation condition loaded on the chip on PCB, inspection unit 800 use the second visible system more than 810 times Check each chip being installed on PCB.
Engagement device can further comprise: fluxing unit 510 (1), for keeping solder flux to be applied to by engaging extractor 410 (1) are from each chip that chip feed unit 100 transmits；And third visible system 530 (1), it is arranged in fluxing unit The side of 510 (1) simultaneously passes through the lower surface for engaging each chip that extractor 410 (1) is transmitted, fluxing unit 510 for checking (1) it may be provided at and be parallel on the axis of Y direction with third visible system 530 (1).
It is described in detail by using the first visible system below in reference to attached drawing to each of the PCB being set in bonded stage Installation region executes multiple image taking (hereinafter also referred to " more continuous shootings "), to obtain multiple positions of each installation region of PCB The step of setting value.
In step (c), the final position value of each installation region 11 can be confirmed as multiple positions of each installation region Set the average value of value.Can be simple added together by the positional value of each installation region of multiple checks, can get positional value it The average value of sum.Selectively, it in order to more accurately obtain the positional value of each installation region, may filter that by each of multiple checks The positional value of a installation region.By filtering technique, can only select to be in ± 3 σ models among the positional value of each installation region Interior value is enclosed, and can get the average value for eliminating the positional value after the value except ± 3 σ ranges, so that it is determined that each The final position value of installation region.
The inspection of the positional value of each installation region can be executed by pre-alignment unit 600 as described above, or can connect The inspection of the positional value of each installation region is executed before closing the joint technology of the chip in platform 700.In particular, when by pre- right When quasi- unit 600 executes step (b), the positional value of the installation region 11 of PCB 10 can be imaged by the 4th visible system 610.
In addition, executing the step of shooting image by the 4th visible system 610 in pre-alignment unit 600.This method can wrap It includes and image is repeatedly shot by using each installation region of the 4th visible system to the PCB being set on pre-alignment unit, with The step of obtaining multiple positional values of each installation region of PCB.
It on the other hand, can by first when executing step (b) before the joint technology executed in bonded stage 700 The positional value of the installation region 11 of PCB 10 is imaged for viewing system 430 (1) and 430 (2).
In addition, pre-alignment unit 600 executes whole inspection to each installation region of PCB, bonded stage 700 is only checked from pre- The FM that is formed on some installation regions for the PCB that the transmission of aligned units 600 comes or PCB, obtains PCB's from there through drawing technique Positional value and alignment information.It is therefore possible to shorten in bonded stage 700 position of PCB and alignment information review time.
In addition, can be in engagement extractor 410 (1) and 410 (2) in period at the uniform velocity moving or to engage extractor In 410 (1) and 410 (2) static period, each figure formed on the installation region of PCB is checked using the 4th visible system 610 The positional value of case.
Each installing zone is shot using the first visible system 430 (1) and 430 (2) below in reference to the detailed description of Fig. 3 and 4 The technique of domain at least twice.
Referring to Fig. 3, when to the first visible system 430 (1) or 430 (2) input stop signal and the first visible system 430 (1) when or 430 (2) are parked at the first reference position R1, the first visible system 430 (1) or 430 (2) are according to bench type or linearly The movement of motor etc. and move, thus even all generate delicate variations in the first visible system 430 (1) or 430 (2).Thus, The vibration with predetermined amplitude d from initial position is produced, therefore is difficult mobile first visible system 430 (1) or 430 (2) Position.
In this regard, the positional value of corresponding installation region 11 can be imaged on unexpected when inputting imaging signal from control unit Position R2 and R3 at.In this case, it is difficult accurately to shoot the positional value of installation region 11, because without accurately being pacified Fill the positional value in region 11.In particular, in the flip-chip bond device 1000 for needing several micron accuracies, when according to one When the location information of a little errors executes flip-chip bond technique, ratio of defects increases, thus cannot ensure precision.
Referring to Fig. 5, as time T is passed, the vibration of the first visible system 430 (1) and 430 (2) (430) reduces, therefore, Amplitude A reduces, and the positional value of installation region 11 has the data for converging on a certain value, however can not predict when generation By external factor generate vibration and when vibrate reduction.Thus, as shooting operation number increases, can get more accurate Value.
<table 1>
Table 1, which is shown, to be executed five continuous shootings by each installation region to PCB and repeats this ten knot obtained of operation Fruit value.In table 1, the positional value that 1 expression of taking pictures is taken pictures for the first time among five continuous shootings takes pictures 2 expressions among five continuous shootings The secondary positional value taken pictures, the positional value that 3 expressions third time of taking pictures is taken pictures, the 4th positional value taken pictures of 4 expressions of taking pictures are taken pictures 5 indicate the 5th positional value taken pictures.
According to the above-mentioned data listed, the 1 variable quantity difference of positional value of taking pictures is 9.8, take pictures 5 positional value variation Measuring difference is 9.2.The result shown in the table 1 can confirm that the positional value caused by vibrating will not restrain, until completing the 5th bat According to until.On the contrary, can get the average value of the sum of positional value of each operation of 10 repetitive operations, mean change amount is 3.6, This indicates that change rate reduces.
In addition, the result shown in the table 1 can confirm, when with obtaining average value by executing primary more continuous shootings to single PCB It compares, when by executing more continuous shootings acquisition average values at least twice to single PCB, the error of positional value can reduce more.
In this regard, two methods can be used to obtain being averaged for the positional value measured and repeating more continuous shootings at least twice Value.
As first method, by each position value obtained and executing primary more continuous shootings to PCB and by being held to PCB Row second and the more continuous shootings of third time and each position value that obtains is added together, can the sum of calculated location value average value, thus Obtain final position value.
As second method, primary more continuous shootings are executed to PCB, calculate the average value of shooting value, and obtain using average value Obtain the positional value of the first installation region.Repeatedly, more continuous shootings are executed to PCB, calculates the average value of shooting value, and use average value Obtain the positional value of the second installation region.This process repeats multiple such as n times, calculates each average value of shooting value, makes The 1st value for arriving n-th installation region is obtained with each average position value, calculates the average value of the value of these installation regions, thus Obtain final position value.
Preferably, the number, shooting time and shooting interval of shooting operation can be preset, to obtain measurement accuracy, and And it can arbitrarily be set by user during measurement.In above-mentioned experiment, in the 4th visible system to pre-alignment unit 600 After 610 input stop signals, 5 (t1 to t5) more continuous shootings are executed with the interval of 7ms, but it is not limited to this.For example, can to The predetermined time be have passed through after 4th visible system 610 input stop signal (such as after 10 to 30ms (t1)), with the predetermined time Interval (such as 5 to 10ms) executes more continuous shootings at least twice.
In this regard, the average value of the positional value of multiple captured individual installation regions can be used, corresponding installation region is determined 11 positional value.Installing zone at least twice can be being shot later to the first visible system 430 (1) and 430 (2) input stop signal Domain.Repeatedly shooting can be executed after input stop signal or after have passed through the predetermined time.In this regard, the predetermined time can To be the first visible system 430 (1) and 430 (2) after inputting stop signal to the first visible system 430 (1) and 430 (2) Vibration drop to the tolerable amplitude period below.
Similarly, can be after inputting stop signal to the first visible system 430 (1) and 430 (2), sensing first is visual The vibration of system 430 (1) and 430 (2), when the vibration for entering the first visible system 430 (1) and 430 (2) drop to it is tolerable When amplitude period below, continuous shooting at least twice is executed with predetermined time interval, and calculate the average value of shooting value, will be averaged Value is set as positional value.
It, can not be by the position with large error by filtering the positional value of installation region meanwhile when calculating average value Value is added to average value.In particular, calculating the average value of the measured positional value of installation region.In this regard, in the positional value of measurement Among, it can generate due to relatively large error (such as situation more than ± 3 σ ranges) and lead to the position with low reliability Value.Thus, average value can be calculated after removing the measured positional value with low reliability, to improve error precision.
Using the standard deviation of the positional value of each measurement of the mean value calculation of the positional value of measurement, and when the mark calculated When quasi- deviation is greater than the set value, the positional value (these positional values are invalid values) with relatively large deviation is removed.Repeat this mistake Standard deviation is reduced to effective level by journey.The value within the scope of ± 3 σ is only selected among the positional value of each pattern, and can Acquisition eliminates the average value of the positional value after the value except ± 3 σ ranges, so that it is determined that the pattern position of installation region It sets.
In step (b), at least one of light exposure, time for exposure, light source type and focal length of light can be according to multiple The n-th of shooting operates and changes.For example, the condition according to as the light exposure of such as light or time for exposure, can get bright figure Picture and dark image, can combine these images, to obtain the image with uniform luminance.Selectively, by according to repeatedly bat After the n-th operation change taken the photograph condition listed above executes shooting, the image clearly shot may be selected.
The method for shooting the pattern of installation region can change according to the visual field of visible system.When visible system is with wider Visual field when, method that whole patterns of primary shooting installation region can be used.On the other hand, when visible system is with relatively narrow When visual field, the method for shooting multiple local patterns (such as first and second convex blocks) of installation region can be used.Shown in Fig. 3 The primary method for shooting whole patterns of embodiment application, the method for embodiment application shooting local pattern shown in Fig. 4.
Fig. 4 shows the method for the pattern of the first and second convex block 21a and 21b of the installation region 21 of shooting PCB 20. In order to determine the positional value of the first convex block 21a, the first convex block 21a can be shot at least twice, and in order to determine the second convex block 21b's Positional value can shoot the second convex block 21b at least twice.As described above, can be respectively using the first and second convex block 21a's and 21b The average value of positional value determines each positional value of corresponding installation region 21.First and second convex block 21a and 21b to be captured can Diagonally it is arranged.
Fig. 6 is the plan view of PCB, for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention Method.Fig. 7 is the curve for the effect for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention Figure.Fig. 8 is the curve graph for the method for describing the PCB of inspection semiconductor packages according to an embodiment of the present invention.
As described above, by pre-alignment unit 600, bonded stage 700 or can include installation shape for checking chip and PCB The inspection unit 800 of second visible system 810 of state, the technique for executing each installation region shooting image to PCB.In addition, Can each installation region of multiple checks positional value, or can only some installation regions of multiple checks PCB or FM.
According to an embodiment, each installation region of PCB can be held by pre-alignment unit 600 or inspection unit 800 Row step (b), and step (b) selectively can be executed to certain installation regions by bonded stage 700.This is because prealignment list The image that member 600 has time enough to shoot whole installation regions, thus the alternative certain installation regions of shooting of bonded stage 700 Image with for confirming.
Referring to Fig. 6, whole installation regions (i.e. PCB (1) of PCB can be shot before bonded stage 700 executes joint technology 1 to 50 and PCB (2) 1 to 50) image.In addition, in order to improve the hourly output of equipment (UPH) and make engaging head 400 (1) it is minimized with the movement routine of 400 (2), the installation region of PCB can be divided into two groups and use the first visible system 430 respectively (1) and 430 (2) (see Fig. 1) shooting PCB installation region.
<table 2>
<table 3>
Table 2 shows each convex block 1 and 2 () for moving and shooting in the Y-axis direction after X-direction does not move at 2 points Positional value, table 3 shows the positional value of each convex block for moving and shooting in the X-axis direction after Y direction does not move.
Table 2, which is shown, to be repeated to shoot each PCB ten times by using the 4th visible system 610 in pre-alignment unit 600, is held Row is single clap and the situation of five continuous shootings in, when the 4th visible system 610 only Y direction it is mobile without moving in the X-axis direction when, Single variable quantity for clapping (left side) and more continuous shootings (right side).Referring to table 2, it has been confirmed that although only during Y direction is mobile The vibration of very little can be generated in a device, but improves precision by more continuous shootings.
In addition, (when vibration occurs, X and Y that each convex block 1 and 2 is listed below indicate X-axis variable quantity and Y-axis variable quantity Shooting value changes in X and Y direction), table 2 shows minimum value, maximum value, average value, 3 σ and the essence of ten repetition shootings It spends (vibration (amplitude) based on generation, the difference between minimum value and maximum value).
Table 3 is shown when the 4th visible system 610 is moved without moving in the Y-axis direction in the X-axis direction, single to clap The variable quantity in (left side) and more continuous shootings (right side).In particular, although due to generating larger vibration in moving process in the X-axis direction Dynamic, the precision (amplitude) for the X-axis singly clapped is 10.9 to 11.0, but in the X-axis direction in moving process by more continuous shootings, X-axis Precision is significantly increased to 2.7 to 2.9.That is, when executing more continuous shootings in the situation for generating larger vibration, it can be ensured that essence Degree.
Thus, when executing single clap, since the error of positional value caused by vibrating increases, thus precision is reduced.With this phase Control shoots the pattern of installation region by more continuous shootings, and the pattern of installation region is determined using the average value of shooting pattern, Thus precision can be improved.
<table 4>
Referring to table 4 and Fig. 7, it has been confirmed that (obtaining the flat of the value shot several times with from singly photographing more continuous shootings (five times) In the situation of mean value), vibration-damping effect is improved.However, it is necessary to the shooting operation of appropriate number be selected, because with bat Number of operations increase is taken the photograph, the time for shooting cost is elongated.
Fig. 7 is the song that the method for the PCB of the inspection semiconductor packages by application according to an embodiment of the present invention obtains Line chart.Referring to Fig. 7, it has been confirmed that vibration-damping effect increases as shooting operation number increases.
It can when the 4th visible system 610 shoots the image of each installation region in pre-alignment unit 600 referring to Fig. 8 Operation is continuously performed using engaging head 400 (1) and 400 (2) in fluxing unit 510 (1) and 510 (2) or bonded stage 700.It connects The 4th visual system that the transmission technique of syncephalon 400 (1) and 400 (2) is just being worked in pre-alignment unit 600 by influences such as vibrations System 610, to reduce precision.
The transmission technique of engaging head 400 (1) and 400 (2) is described below.Transmission technique can be divided into shifting on the period Dynamic slave a1 to the a2 started accelerate the period, the constant speed period from b1 to b2, from c1 to c2 for stopping deceleration periods, with And quiescent period d1.
In this regard, in the acceleration period from a1 to a2 and the deceleration periods from c1 to c2, just in pre-alignment unit 600 4th visible system 610 of work, which is significantly vibrated etc., to be influenced, and as a result precision reduces.When the 4th visible system 610 is engaging When shooting the pattern of installation region in the constant speed period of slave b1 to the b2 of first 400 (1) and 400 (2) and quiescent period d1, the 4th can Viewing system 610, which is little affected by vibration, to be influenced.
Thus, from b1 to b2 the constant speed period and quiescent period d1 in can be performed image taking.However, according to this hair It is bright, it can be reduced using the average value of the pattern value obtained by more continuous shootings due to vibrating caused error amount, thus, it can run through and connect The entire transmission technique of syncephalon 400 (1) and 400 (2) executes step (b) and (c) in pre-alignment unit 600.In particular, working as When generating larger vibration, more continuous shooting operations are very effective.Even if generating the vibration of very little or not generating vibration, grasped by more continuous shootings Work can still obtain more accurate position.
As described above, providing a kind of side for reducing the location error as caused by the thermal expansion (thermal deformation) of horse structure Method.
By using these methods for reducing location error, precision can be improved when shooting pattern.
In addition, as described above, fluxing unit 510 (1) and 510 (2) and third visible system 530 (1) and 530 (2) can be divided It is not set in the same axis parallel with the transmission line of engaging head (i.e. Y direction), overturns extractor 300, fluxing unit 510 (1) it is may be disposed in the same axis parallel with Y direction respectively with 510 (2) and third visible system 530 (1) and 530 (2).It is logical This structure is crossed, the transfer operation number in X-direction can reduce once or twice.By reducing the transmission behaviour in X-direction Make number, can inhibit the thermal deformation of rack driving unit, and the vibratory output generated in equipment can be reduced.
Flip-chip bond device 1000 can further comprise inspection unit 800, and inspection unit 800 includes for checking The second visible system 810 of PCB, wherein having performed joint technology completely in bonded stage 700 to PCB.Can to second Viewing system 810 inputs after stop signal, and inspection unit 800 can be by executing at least two to installation region with predetermined time interval The PCB of engagement is completed in secondary more continuous shootings, final accurate inspection.
As described above, the method for the PCB using the inspection semiconductor packages of embodiment according to the present invention, it can be quickly accurate Ground checks the positional value of the installation region of PCB.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, when the figure of shooting installation region Precision can be improved when case.
Moreover, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, it can be ensured that enough general inspections Time, while total hourly output (UPH) of flip-chip bond device 1000 is not reduced.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, can be such that the transmission of transmission line grasps Minimize, can solve the problems, such as with due to caused by generating heat location error it is related, and can prevent due to transfer operation Shooting precision caused by the vibration of generation reduces.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment can quickly check installation region according to the present invention The defect of (aforementioned bonding station), and lacking for installation region can be sensed by the first visible system 430 or the 4th visible system 610 It falls into.In addition, as described above, only executing joint technology in not having defective installation region.It, can be by pre- before joint technology Aligned units 600 or the inspection that defect is executed by bonded stage 700.
For the ease of explaining, multiple installation regions may include the first installation region and the second installation region.
In this regard, the method for the PCB of inspection semiconductor packages according to an embodiment of the present invention can be into one in step (b) Step be included in while the first visible system is moved to the first installation region about the first installation region with the presence or absence of mark into Row shooting, to detect whether that there is label.
When sensing the label of the first installation region, in step (c), the first visible system 430 can not be parked in first The reference position of installation region, but second peace adjacent with the first installation region is sent in the first visible system 430 Continuous shooting is executed to the label of the second installation region while filling region.
According to the present invention, in order to identify the label of corresponding installation region, do not stop visible system, but in mobile visible system Corresponding installation region is shot when while system, because each installing zone can be shot without stopping number corresponding with installation region The label in domain, this reduces the review time.
In addition, visible system is parked in the reference of corresponding installation region when not sensing the label of each installation region At position, pattern is then shot, for accurately obtaining the location information of corresponding installation region.Reference position can be to definite message or answer The location information for the corresponding installation region that feed unit 520 supplies is ceased, and reference position can be in view of visible system Visual field allows to shoot the position of the pattern of installation region.Thus, it can be before the reference position for reaching corresponding installation region, root The camera site marked for identification is determined according to the visual field of visible system.In addition, the shooting from pattern is different, the shooting of label is not High-precision is needed, the shooting of label corresponds to the inspection of label and whether there is defect with installation region for identification, thus marks Shooting by mobile visible system with shooting bring vibration etc. do not influenced.Therefore, it can be applicable in movement and clapped The method taken the photograph.
That is, visible system is only parked in the installation region for not showing label, so among multiple installation regions The pattern of these installation regions is shot afterwards, to determine the position of pattern, thus can shorten the review time.
The shooting that label can be executed by the sidelight unit 442 of light source unit 440 (1), can pass through light source unit 440 (1) Direct light unit 441 execute pattern positional value inspection.
Fig. 9 is the plan view of PCB according to an embodiment of the present invention.Figure 10 is another embodiment according to the present invention The plan view of PCB.
It can be the rectangular that multiple installation regions 11,12 and 13 are disposed with scheduled columns and rows referring to Fig. 9, PCB 10 Formula.In one embodiment, installation region can be 12 × 12 array format.In this regard, having checked conductive circuit patterns After short circuit and/or unusual appearance, flaw labeling can be formed on each installation region by ink etc., and can be used and have Label of various shapes is to execute flaw labeling technique.
Each of as shown in Figure 9, according to whether existing defects, the first, second, and third installation region 11,12 and 13 Label can be made.For example, the first row based on PCB 10 shown in Fig. 9 can be used when third installation region 13 has defect Alphabetical " X " marks third installation region 13.
In order to check the every of the first, second, and third installation region 11,12 and 13 in the PCB 10 with this structure One whether there is defect, need to confirm whether corresponding installation region has label.Although only showing first, second in Fig. 9 With third installation region 11,12 and 13, but need to check all installation regions.
0, PCB 30 is that multiple installation regions (the i.e. first to the 5th installing zone is disposed with scheduled columns and rows referring to Fig.1 Domain 31 to 35) matrix form.In one embodiment, installation region can be 5 × 5 array format.In this regard, having checked After the short circuit of conductive circuit patterns and/or unusual appearance, flaw labeling can be formed on PCB 30 by ink etc., and can Flaw labeling technique is executed using with label of various shapes.Label or PCB 30 can not be made to corresponding installation region It may include the defect display unit 36 for being arranged in independent space, such as being arranged in left or right side.For example, such as institute in Figure 10 Show, based on the first row of PCB 30, the third installation region 33 among the first to the 5th installation region 31 to 35 has defect When, the quantity of defect display unit 36 can be corresponding with the quantity for the installation region for belonging to corresponding line.Defect display unit 36 can be with It is circular metal pad, quantity is corresponding with the quantity for the installation region for belonging to corresponding line.
In the PCB 30 with this structure, in order to confirm the first to the 5th installation region 31 to 35 for belonging to corresponding line Whether there is defect, can only shoot defect display unit 36, and do not have to shoot each corresponding installation region, thus sensing belongs to phase The first to the 5th installation region 31 to 35 that should be gone whether there is defect.
Figure 11 is the principle for the method for describing the PCB40 of inspection semiconductor packages according to an embodiment of the present invention Figure.
PCB 40 can be the matrix form that multiple installation regions 41,42 and 43 are disposed with scheduled columns and rows.For example, PCB 40 may include the first, second, and third installation region 41,42 and 43, make bid to having defective second installation region 42 Note.
Referring to Fig.1 1, arrange that there is the first, second, and third installation region 41,42 and 43 (to pacify thereon by PCB 40, PCB 40 Equipped with the multiple chips formed by cut crystal W), it can execute PCB's 40 by pre-alignment unit 600 or bonded stage 700 Mark check and/or pattern shooting.
First visible system 430 is in the first installation of shooting into the transmit process of the first installation region 41 from initial position P1 The label in region 41, for sensing defect.In this regard, allowing that the position P2 shot is marked to can be in the first visible system 430 The position before the reference position P3 of the first installation region 41 is reached, and the visual field of the first visible system 430 of consideration can be passed through Deng, differently determine position P2.
As shown in Figure 11, the first installation region 41 is not made label, thus by being held by the first visible system 430 Capable shooting does not sense label.It thus determines that the first installation region 41 does not have defect, multiple pattern shooting (step can be performed (c)), with the precise position information of the first installation region 41 of acquisition.In this regard, the first visible system 430 is parked in the first installation region At 41 reference position P3 and shoot the first installation region 41 pattern.It is provided above and determines pattern by shooting pattern The technique of position, thus omit the detailed description.
In addition, first visible system 430 is moved to second after completing the pattern shooting to the first installation region 41 Installation region 42, ginseng of first visible system 430 in the installation region 42 reference position P3 to second from the first installation region 41 The label that the second installation region 42 is shot in the transmit process of position is examined, for sensing defect.In this regard, as described above, shooting The position P4 of label can be the position before the reference position that the first visible system 430 reaches the second installation region 42.
In this regard, determining that the second installation region 42 has defect when sensing the label of the second installation region 42.In addition, Because chip, the first visible system 430 second installation region 42 need not be parked on the second installation region 42 Reference position, but third is installed while being sent to the third installation region 43 adjacent with the second installation region 42 The label continuous imaging in region 43.
In addition, third installation region 43 is not made label, thus the shooting by being executed by the first visible system 430 Label is not sensed.Accordingly it is determined that third installation region 43 does not have defect, and can be performed multiple pattern shooting, to obtain The precise position information of third installation region 43.In this regard, the first visible system 430 is parked in the reference position of third installation region 43 At P6.
As described above, the first visible system 430 does not stop during shot mark is to determine whether there is defect, and First visible system 430 only stops on not having defective installation region to shoot pattern, therefore, defect inspection and pattern shooting The time of cost shortens.
Figure 12 is the principle for the method for the PCB for describing the inspection semiconductor packages of another embodiment according to the present invention Figure.
Referring to Fig.1 2, the step of checking the method for the PCB of semiconductor packages (b), can further comprise: by the first visual system System 430, which is transmitted to, to be formed in the first reference position of the first installation region at the edge part, repeatedly claps in the first reference position It takes the photograph the first pattern of the first installation region and to be formed in the first installation region another the first visible system 430 to be moved to While second reference position of at the edge part, about whether there are the labels of the first installation region to be shot.
In this regard, step (b) can further comprise: when not sensing label, the first visible system 430 being parked in first After second reference position of installation region, the second pattern of the first installation region is repeatedly shot in the second reference position.Separately On the one hand, when sensing the label of the first installation region, the first visible system 430 can be transmitted to and the first installation region phase First reference position of the second adjacent installation region, rather than the first visible system 430 is parked in the second of the first installation region Reference position.When the first visible system 430 has wide visual field, the method for shooting whole patterns of installation region can be used. On the other hand, when visible system has narrow visual field, the method for shooting multiple local patterns of installation region can be used.In Figure 11 Shown in the embodiment application method that shoots whole patterns, the side of embodiment application shooting local pattern shown in Figure 12 Method.
Referring to Fig.1 2, there is arrangement the first, second, and third installation region 51,52 and 53 (to be equipped with pass through cutting thereon Wafer W and the multiple chips formed) PCB, and pre-alignment unit 600 can be passed through or bonded stage 700 executes the label inspection of PCB It looks into and/or pattern is shot.
In this regard, at least two edges in order to shoot whole patterns of any one installation region, in corresponding installation region Local pattern (i.e. the first and second patterns) are shot at part.Thus, the first visible system 430 is transmitted to and is formed in the first peace The first reference position P1 at the marginal portion 51a in region 51 is filled, then repeatedly shooting first is pacified at the first reference position P1 Fill first pattern in region 51.
Then, it is transmitted in the first visible system 430 at the other edge part 51b for being formed in the first installation region 51 While second reference position P3, the label of the first installation region 51 is shot.It whether there is mark first visually for shooting The position P2 of system 430 can be first and second reference position P1s and P3 of first visible system 430 in the first installation region 51 Between movement routine.First and second reference position P1 and P3 may be provided at the diagonal of the first installation region 51.
Because the first installation region 51 is not made label, the first visible system 430 does not sense label, because And it determines the first installation region 51 and does not have defect.In addition, in order to shoot the second pattern, the first visible system 430 is moved to Second reference position P3 of one installation region 51, in the second reference that the first visible system 430 is parked in the first installation region 51 After the P3 of position, the second pattern of the first installation region 51 is repeatedly shot at the second reference position P3.
In this regard, difference is true as described above, control unit can be according to by the positional value of the first and second patterns of multiple checks The position of first and second patterns of fixed first installation region 51.
In addition, the first visible system 430 is moved to the first ginseng in the marginal portion 52a for being formed in the second installation region 52 Position P4 is examined, the first pattern of the second installation region 52 is repeatedly shot at the first reference position P4 of the second installation region 52.
Later, it is formed in the 52b of other edge part being transmitted to from the first reference position P4 of the second installation region 52 The second reference position while, execute the second installation region 52 defect inspection.In this regard, the second installation region 52 is made mark Note, thus the first visible system 430 senses label.When sensing label, determine that the second installation region 52 has defect, On not chip.Thus, the first visible system 430 does not move to the other edge part for being formed in the second installation region 52 The second reference position in 52b, and it is moved to the third installation region 53 adjacent with the second installation region 52.
In addition, in third installation region 53, the shooting the at the first reference position P6 being formed in the 53a of marginal portion One pattern, and shot while the first visible system 430 is transmitted to the second reference position P8 from the first reference position P6 To be confirmed whether to have label, as figure in the first installation region 51.
In this regard, third installation region 53 is not made label, thus the first visible system 430 is moved to the second reference bit It sets P8 and repeatedly shoots the second pattern of third installation region 53.
Even if during shooting local pattern, shooting operation of first visible system 430 in the first and second patterns Between do not stop, but shot mark whether there is defect to sense, thus shorten the review time.
Meanwhile defective display unit 36 is arranged in side in PCB 30 shown in Figure 10.In the PCB with this structure In 30, the mark check of all installation regions and the pattern inspection of corresponding installation region can be successively executed.In particular, can first Defect display unit 36 can be shot while 430 continuous moving of viewing system, by the acquisition of defect display unit 36 about installation Region can be input to control unit with the presence or absence of the information of defect.Later, when the stoppingly completion pair of the first visible system 430 When the shooting of defect display unit 36, control unit controls the first visible system 430 and is only moved to the installing zone without defect Domain, and the first visible system 430 can shoot the pattern of each installation region.
As described above, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, can quickly check PCB Installation region defect.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, when shooting each installation region Pattern when precision can be improved.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, it can be in flip-chip bond work The defect inspection and pattern inspection of PCB are quickly and accurately executed before skill.
As described above, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, quickly can accurately execute The pattern inspection of the installation region of PCB.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, when shooting each installation region Pattern when precision can be improved.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, when can be sufficiently ensured general inspection Between without reduce flip-chip bond device total hourly output (UPH).
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, can be such that the transmission of transmission line grasps Make it is minimized, solve the problems, such as with due to generate heat caused by location error it is related, and can prevent due to transfer operation produce Shooting precision caused by raw vibration reduces.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, can quickly check the peace of PCB Fill the defect in region.
In addition, the method for the PCB of the inspection semiconductor packages of embodiment according to the present invention, it can be in flip-chip bond work The defect inspection and pattern inspection of PCB are quickly and accurately executed before skill.
Without departing from the spirit or scope of the present invention, the present invention can carry out various modifications and change, this for It is obvious for one skilled in the art.Thus, the invention is intended to cover to fall into the appended claims model Enclose and its equivalent scope in all modifications of the invention and variation.

Claims (1)

1. a kind of method for the printed circuit board for checking semiconductor packages, the method are executed by engagement device, the engagement Device includes: chip feed unit；Pre-alignment unit including the 4th visible system, the 4th visible system is for shooting institute The installation region for stating printed circuit board allows to install multiple chips respectively on the installation region；Bonded stage, in the engagement On platform on the printed circuit board by the installation of each chip；For each chip to be transmitted to institute from the chip feed unit State the engagement extractor of bonded stage；And first visible system, first visible system is for shooting in the bonded stage The installation region of printed circuit board, which comprises
(a) preparation has the printed circuit board of multiple installation regions, wherein each installation region has pattern；
(b) each installation by using the 4th visible system to the printed circuit board being set on the pre-alignment unit Region executes multiple image taking, multiple positions of the pattern formed in each installation region to obtain the printed circuit board Value；
(c) it according to the average value of multiple positional values of the pattern formed in each installation region of the printed circuit board, determines The final position value of the pattern formed in each installation region of the printed circuit board；
(d) by using first visible system in the bonded stage, some installing zones of the printed circuit board are checked The reference mark of domain or formation on the printed circuit board；With
(e) by executing drawing work to the inspection positional value in the final position value and the bonded stage in the pre-alignment unit Skill obtains the positional value for each chip that will be mounted on the printed circuit board in the bonded stage.
CN201610172885.2A 2012-05-08 2013-05-07 The method for checking the printed circuit board of semiconductor packages Active CN105845594B (en)

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KR10-2012-0048631 2012-05-08
KR1020120048631A KR101325634B1 (en) 2012-05-08 2012-05-08 Method for inspecting pcb of semiconductor packages
KR10-2012-0063195 2012-06-13
KR1020120063195A KR101372379B1 (en) 2012-06-13 2012-06-13 Method for inspecting PCB of semiconductor packages
CN201310164735.3A CN103426787B (en) 2012-05-08 2013-05-07 Check the method for the printed circuit board (PCB) of semiconductor packages

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CN104101609B (en) * 2014-07-03 2016-08-24 宁波摩米创新工场电子科技有限公司 A kind of visual detection equipment of circuit board
CN106680049A (en) * 2016-11-15 2017-05-17 成都蒲江珂贤科技有限公司 Automatic circuit board flaw detection processing equipment
WO2019018996A1 (en) * 2017-07-25 2019-01-31 深圳市兴华炜科技有限公司 Method for capturing plurality of images of circuit board, and related product
KR102153168B1 (en) * 2017-09-29 2020-09-07 한미반도체 주식회사 Semiconductor Device Attaching Method
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