CN105842611A - Flip chip detection sample preparation method - Google Patents
Flip chip detection sample preparation method Download PDFInfo
- Publication number
- CN105842611A CN105842611A CN201610200850.5A CN201610200850A CN105842611A CN 105842611 A CN105842611 A CN 105842611A CN 201610200850 A CN201610200850 A CN 201610200850A CN 105842611 A CN105842611 A CN 105842611A
- Authority
- CN
- China
- Prior art keywords
- chip
- flip
- back side
- thickness
- detection sample
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2898—Sample preparation, e.g. removing encapsulation, etching
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
- G01R31/311—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Wire Bonding (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The invention relates to a flip chip detection sample preparation method, belonging to the electronic component detection technical field. The method comprises the steps of: preliminary treatment: immersing a flip chip packaging integrated circuit to be detected in an organic solvent, and prizing an packaging casing to expose the back side of a flip chip; fixing: fixing the flip chip packaging integrated circuit on a clamp by hot melt wax; and grinding: grinding and thinning the exposed back side of a flip chip, monitoring the distance between the substrate surface of the flip chip packaging integrated circuit and the back side of the flip chip, and stopping grinding when the chip is grinded to the preset thickness so as to obtain a flip chip detection sample. The method can reduce the chip to appropriate thickness according to needs so as to meet the thickness requirement for infrared and near-infrared light to penetrate a silicon chip in back side defect positioning, meanwhile guarantee the intactness of circuit base pins, i.e., sound electrical properties, and meet the requirements of applying a voltage bias in back side light emitting defect detection.
Description
Technical field
The present invention relates to electronic devices and components detection technique field, particularly relate to a kind of flip-chip detection sample
Preparation method.
Background technology
Flip-Chip Using is easily achieved the high density of chip, high-performance and small-sized encapsulated, becomes in recent years
Multi-functional and the optimal selection of high I/O pin package (such as high side device such as CPU, DSP, FPGA) and quilt
Extensively application.
Light is utilized to launch the Detection Techniques such as microscopic analysis, from chip front side detection chip level defect (such as superthin grid
Oxide layer breakdown, soft breakdown, hot carrier's effect, latch-up, avalanche breakdown, junction leakage, oxidation
Layer defects etc.) it is the practices well detecting ic core chip level defect.But, Flip-Chip Using is integrated
Circuit chip face down, it is impossible to directly use up transmitting force microscopy and carry out the Detection location of defect in chip.
Need to change into using back-side light emission microtechnic to detect, in the back side is detected, the one of most critical
Silicon substrate is thinned to exactly in infrared, the transparent suitable thickness range of near infrared light by step, could realize
From the chip back location to chip-scale defect.But, light emission detection technology needs to add on circuit pin
Upper voltage bias reproduction failure phenomenon.Therefore, the chip in flip-chip packaged integrated circuit is carried out thinning same
Time, the pin needing holding circuit is the most impaired, it could be applied electrical bias and carry out follow-up analysis.
But, the most conventional processing method is not all suitable for the chip thinning in flip-chip packaged integrated circuit
After carry out light launch microscopic analysis.Such as: traditional chemical corrosion method, as used 30%HCL or 30%
H2SO4, it is possible to remove the plastic encapsulant of chip periphery, but silicon cannot be performed etching, it is impossible to make
It is thinning, it is impossible to reach to be thinned to silicon substrate suitable thickness range.And traditional mechanical grinding method,
Use first with epoxy resin sealing integrated circuit, then in the way of sand paper grinding, chip is ground,
Thinning method.Whole plane can only be ground thinning by this method, it is impossible to monitoring thinning process in true
Chip thickness, and thinning after integrated circuit all pins all by epoxy resin enclosed live, have impact on
Electrical bias when light launches microscopic analysis applies, it is impossible to be smoothed out defect detection.Thinning for Silicon Wafer
Method, also has and uses silicon chip spinning grinding, i.e. single-chip to rotate, the mode of feed grinding vertically downward or
The mode of person's emery wheel cutting carries out the thinning of Silicon Wafer.But the method is it is not intended that the electrical performance issues of circuit,
The flip-chip being not suitable in Flip-Chip Using integrated circuit thinning.
Therefore, existing method, either chemistry, mechanical lapping, emery wheel cutting, all cannot expire
For carrying out the requirement of defect on back side location after foot Flip-Chip Using integrated circuit chips is thinning.
The problem difficult in order to solve Flip-Chip Using integrated circuit defect on back side location, needs a kind of for this
The chip thinning method of type package design feature, to make up the deficiency of traditional chemical etch or mechanical milling method,
It is smoothed out the sample that defect on back side positioning analysis provides good for this type package failure device.
Summary of the invention
Based on this, it is necessary to for the problems referred to above, it is provided that the preparation method of a kind of flip-chip detection sample,
Use the method, it is possible to flip-chip is thinned to as required suitable thickness, fixed to meet defect on back side
Infrared, thickness requirement that near infrared light penetrates silicon during position, and ensure that the pin of circuit is intact not simultaneously
Impaired, i.e. electrical property is good, it is ensured that need to apply the requirement of voltage bias during back-side light emission defect detection.
The preparation method of a kind of flip-chip detection sample, comprises the following steps:
Pre-treatment: soak Flip-Chip Using integrated circuit to be detected with organic solvent, make bonding package casing
Adhesive glue soften or dissolve, then this package casing is pried open, exposes and be fixed on flip-chip by soldered ball and seal
The flip-chip back side on dress ic substrate face；
Fixing: by the flip-chip back side outwardly in the way of, with hot melt wax by integrated for above-mentioned Flip-Chip Using electricity
Road is fixed on fixture；
Grind: the flip-chip back side exposed is ground thinning, and it is integrated to monitor Flip-Chip Using
The distance at circuit substrate face to the flip-chip back side, by the height of this distance deduction soldered ball, is chip thickness,
It is ground to chip thickness when being preset thickness, stops grinding, obtain flip-chip detection sample.
The preparation method of above-mentioned flip-chip detection sample, first walks package casing sled, can be by flip-chip packaged
The encapsulating material (metal or plastic cover plate etc.) at the integrated circuit flip chip back side, die adhesive (thermal grease)
Completely remove, expose the flip-chip back side and the pin of circuit, on the premise of not affecting circuit pin, logical
Cross real-time chip thickness, flip-chip is thinned to as required suitable thickness, scarce to meet the back side
Fall into the thickness requirement infrared during location, near infrared light penetrates silicon, smooth for this type package failure device
Carry out defect on back side positioning analysis and provide good sample, solve the Flip-Chip Using integrated circuit back side
The problem that defect location is difficult.
Wherein in an embodiment, fix between grinding steps described, also include thickness measure step,
This thickness measure step is: measure the initial of Flip-Chip Using ic substrate face to the flip-chip back side
Distance, obtains the original depth of flip-chip.By obtaining the original depth of flip-chip, with process of lapping
The chip thickness that middle measurement obtains compares, it is possible to knows easily and monitors grinding progress, being favorably improved
The controllability of thickness thinning.
Wherein in an embodiment, in described grinding steps, include corase grind, fine grinding, polishing process successively,
In described corase grind operation, with the diamond lap flip-chip back side that particle diameter is 25 μm-35 μm；
In described fine grinding operation, with the diamond lap flip-chip back side that particle diameter is 10 μm-20 μm；
In described polishing process, first diamond suspension and polishing cloth so that particle diameter is 4 μm-8 μm polish upside-down mounting
Chip back, then with diamond suspension that particle diameter is 0.5 μm-2 μm and the Flocked fabric polishing flip-chip back side,
Described flip-chip is being ground the cut produced in thinning process and/or burr is removed, make ground thinning after
Flip-chip back side flat smooth, to obtain final product.
The method combined by corase grind, fine grinding, polishing multi-step, can be subtracted as required by flip-chip
Thin to suitable thickness, improve the controllability of thinning process.Further, also can effectively adjust surface polishing,
Preventing cut and/or burr is the difficulty that subsequent analysis brings focusing.
Wherein in an embodiment, in described corase grind operation, being ground to chip thickness is 150 μm-250 μm；
In described fine grinding operation, being ground to chip thickness is 100 μm-110 μm.It is ground with above-mentioned process conditions,
Grinding efficiency can be improved, fully take into account again the controllability of thinning process, be beneficial to carry out for finally giving
Light is launched the sample of microscopic analysis and is provided safeguard.
Wherein in an embodiment, in described grinding steps, when described preset thickness is flip-chip detection
Directly use up transmitting microscopic analysis desired thickness.Concrete thickness can adjust according to actual analysis situation.
Wherein in an embodiment, the height of described soldered ball obtains by the following method:
By the design of the type Flip-Chip Using to be detected integrated circuit, know the height of described soldered ball
Degree；Or, separately take the Flip-Chip Using integrated circuit to be detected of same type, carry out cross-section analysis, survey
Measure the height of described soldered ball；Or, the height presetting described soldered ball is 80 μm-100 μm.Can manage
Solve, if directly obtained the exact height of described soldered ball by design or cross-section analysis, it is possible to more preferably
Control thinning process, flip-chip is thinned to optimum thickness.But such as it is difficult to obtain the determination of soldered ball
Highly, the present inventor obtains by summing up after substantial amounts of practice, and the Typical value range of solder bumps is 80 μm
-100 μm, use this representative value as preset value, can be thinned to suitably by the thickness of flip-chip equally
Scope, it is simple to postorder analysis measures to be used.
Wherein in an embodiment, in described grinding steps, the chip of monitoring flip-chip back side multiple spot is thick
Degree, if the chip thickness of each point is inconsistent, adjusts fixture levelness, makes follow-up grinding keep flip-chip table
Face is smooth.By the way, it is possible to increase the uniformity of chip surface after grinding, to eliminate and to analyze gather time
Burnt difficulty.
Wherein in an embodiment, in described fixing step, to assemble horizontal pressure force device, by described upside-down mounting
What chip package integrated circuit was smooth is fixed on described fixture.Fix Flip-Chip Using by the way
Integrated circuit, using the teaching of the invention it is possible to provide the flat abrasive surface that levelness is homogeneous, improves the final flip-chip that obtains and detects
The testability of sample, the Stability and veracity for Measurement results provides prerequisite.
Wherein in an embodiment, in described fixing step, if described Flip-Chip Using integrated circuit is
Flip chip pin grid array packing forms integrated circuit, the most integrated at this flip chip pin grid array packing forms
The pin space of circuit adds barrier blocks, then is fixed with described holder contacts by this barrier blocks.By above-mentioned
Mode, can avoid sample pin to occur with the situation of sample clamp deck contact defective tightness, with barrier blocks
Play the effect supporting flip chip pin grid array packing forms integrated circuit.It should be understood that such as employ
Barrier blocks is supported, and hot melt wax used in the most described fixing step needs sufficiently thick, to protect the weldering of sample
Ball and raising cementability.
Wherein in an embodiment, in described pre-treatment step, described organic solvent is selected from: methyl alcohol, second
At least one in alcohol and acetone.It is effective and convenient and practical that above-mentioned organic solvent has softening adhesive glue
Advantage.
Compared with prior art, the method have the advantages that
The preparation method of a kind of flip-chip detection sample of the present invention, after being walked by package casing sled, by reality
Time monitoring chip thickness, flip-chip is thinned to as required suitable thickness, fixed to meet defect on back side
Infrared, thickness requirement that near infrared light penetrates silicon during position, and ensure that the pin of circuit is intact not simultaneously
Impaired, i.e. electrical property is good, it is ensured that need to apply the requirement of voltage bias during back-side light emission defect detection.
The location of Flip-Chip Using integrated circuit chips defect on back side can be realized, reduce fault coverage, for finally
The confirmation of failure mechanism points the direction, and the dependability improving circuit is had important meaning.
Further, the method is also optimized screening to each concrete technological process, improves flip-chip and subtracts
The controllability of thin process, further increases operability and the stability of the method.
Accompanying drawing explanation
Fig. 1 is the process chart of a kind of flip-chip detection sample preparation methods in embodiment 1.
Fig. 2 is the fixing schematic diagram of flip chip pin grid array packing forms integrated circuit in embodiment 2.
Wherein: 1. flip chip pin grid array packing forms integrated circuit；2. barrier blocks；3. fixture.
Detailed description of the invention
For the ease of understanding the present invention, below with reference to relevant drawings, the present invention is described more fully.
Accompanying drawing gives presently preferred embodiments of the present invention.But, the present invention can come real in many different forms
Existing, however it is not limited to embodiment described herein.On the contrary, providing the purpose of these embodiments is to make this
The understanding of disclosure of the invention content is more thorough comprehensively.
It should be noted that when element is referred to as " fixing " another element, and it can be directly at another
On element or element placed in the middle can also be there is.
Unless otherwise defined, all of technology used herein and scientific terminology and the technology belonging to the present invention
The implication that the technical staff in field is generally understood that is identical.The art used the most in the description of the invention
Language is intended merely to describe the purpose of specific embodiment, it is not intended that in limiting the present invention.
The preparation method of a kind of flip-chip detection sample, comprises the following steps:
One, pre-treatment.
Soak Flip-Chip Using integrated circuit to be detected with organic solvent, make the adhesive glue of bonding package casing
Soften or dissolve, then this package casing is pried open, exposing and be fixed on the integrated electricity of Flip-Chip Using by soldered ball
The flip-chip back side on base board face.
It should be understood that organic solvent used only needs can reach to soften/dissolve adhesive glue, but,
As selected at least one in methyl alcohol, ethanol and acetone as the organic solvent softened, there is softening viscous
The advantage that gum deposit is effective and convenient and practical.
Two, fixing.
By the flip-chip back side outwardly in the way of, with hot melt wax, above-mentioned Flip-Chip Using integrated circuit is fixed
On fixture.
It should be understood that the various ways that those skilled in the art can be used to know is fixed, but, with assembling
Horizontal pressure force device, by so smooth for described Flip-Chip Using integrated circuit that to be fixed on described fixture.Can carry
For the flat abrasive surface that levelness is homogeneous, improve the final testability obtaining flip-chip detection sample,
Stability and veracity for Measurement results provides prerequisite.
In some cases, if described Flip-Chip Using integrated circuit is flip chip pin grid array encapsulates shape
Formula integrated circuit, first adds in the pin space of this flip chip pin grid array packing forms integrated circuit and intercepts
Block, then fixed with described holder contacts by this barrier blocks.By the way, sample pin can be avoided
Occur with the situation of sample clamp deck contact defective tightness, play support flip-chip pin grating array with barrier blocks
The effect of row packing forms integrated circuit.Also, it is to be understood that, it is supported as employed barrier blocks,
Hot melt wax used in the most described fixing step needs sufficiently thick, to protect the soldered ball of sample and to improve cementability.
Three, grind.
The flip-chip back side exposed is ground thinning, and monitors Flip-Chip Using integrated circuit base
The distance at plate face to the flip-chip back side, by the height of this distance deduction soldered ball, is chip thickness, grinds
To chip thickness be preset thickness time, stop grind, obtain flip-chip detection sample.
In above-mentioned grinding steps, due to can be with real-time chip thickness, it is possible to by flip-chip as required
It is thinned to suitable thickness, infrared, thickness that near infrared light penetrates silicon during to meet defect on back side location
Requirement, and ensure that the pin of circuit is intact the most impaired, i.e. simultaneously electrical property is good, it is ensured that back light is sent out
The requirement of voltage bias need to be applied when penetrating defect detection.
In order to know easily and monitor grinding progress, fix between grinding steps described, also wrap
Including thickness measure step, this thickness measure step is: measure Flip-Chip Using ic substrate face to falling
The initial distance at the cartridge chip back side, obtains the original depth of flip-chip.It should be understood that in real work
In, it is possible to need not know original depth, only ensure that final grinding obtains chip thickness and reaches pre-provisioning request i.e.
Can.But, by obtaining the original depth of flip-chip, measure, in process of lapping, the chip thickness obtained
Compare, it is possible to know easily and monitor grinding progress, being favorably improved the controllability of thickness thinning.
For the height of above-mentioned soldered ball, can be obtained by following various ways: 1, to be detected by the type
The design of cartridge chip encapsulation integrated circuit, knows the height of described soldered ball；2, treating of same type is separately taken
Detection Flip-Chip Using integrated circuit, carries out cross-section analysis, measures the height obtaining described soldered ball；3, pre-
If the height of described soldered ball is 80 μm-100 μm.It should be understood that if can obtain with the 1st and 2 kind of mode
To the exact height of described soldered ball, can preferably control thinning process, flip-chip is thinned to optimum
Thickness.But such as it is difficult to obtain the determination height of soldered ball, it is possible to by the 3rd kind of mode, by solder bumps allusion quotation
Offset (80 μm-100 μm) uses as preset value, can be thinned to suitably by the thickness of flip-chip equally
Scope, it is simple to postorder analysis measures to be used.
Further, in order to improve the controllability of thinning process further, many also by corase grind, fine grinding, polishing
The method that step combines carries out thinning.I.e. in described grinding steps, be finely divided, include successively corase grind,
Fine grinding, polishing process.
In described corase grind operation, with the diamond lap flip-chip back side that particle diameter is 25 μm-35 μm, preferably
Being ground to chip thickness is 150 μm-250 μm.
In described fine grinding operation, with the diamond lap flip-chip back side that particle diameter is 10 μm-20 μm, preferably
Being ground to chip thickness is 100 μm-110 μm.
In described polishing process, first diamond suspension and polishing cloth so that particle diameter is 4 μm-8 μm polish upside-down mounting
Chip back, then with diamond suspension that particle diameter is 0.5 μm-2 μm and the Flocked fabric polishing flip-chip back side,
Described flip-chip is being ground the cut produced in thinning process and/or burr is removed, make ground thinning after
Flip-chip back side flat smooth, to obtain final product.
Above-mentioned preset thickness is directly to use up transmitting microscopic analysis desired thickness during flip-chip detection, is generally
Being 100 μm-110 μm, in real work, concrete thickness can adjust according to actual analysis situation.
Easy to understand, in order to reach more preferably grinding effect, in whole grinding steps, also should monitor down
The chip thickness of cartridge chip back side multiple spot, if the chip thickness of each point is inconsistent, adjusts fixture levelness, makes
Follow-up grinding keeps flip chip surface smooth.
Embodiment 1
A kind of preparation method of flip-chip detection sample, its flow process is as it is shown in figure 1, comprise the following steps:
One, pre-treatment.
With alcohol or acetone soak Flip-Chip Using to be detected integrated circuit, make the bonding of bonding package casing
Gum softening or dissolving, then with blade, this package casing (is included the shell such as plastic packaging, metal and die bonding material
Material) pry open, expose the flip-chip being fixed on Flip-Chip Using ic substrate face by soldered ball and carry on the back
Face.
Two, fixing.
By the flip-chip back side outwardly in the way of, with hot melt wax, above-mentioned Flip-Chip Using integrated circuit is fixed
On grinding and polishing fixture.Can flow because hot melt wax is heated, during cooling, be likely to result in the out-of-flatness of device surface,
In the present embodiment, assembling horizontal pressure force device (producer: Allied, model: 120-30020) is utilized to carry out whole
Body flattens and guarantees chip flatness on fixture table top.
Three, grind.
1, thickness measure.
Numeral instruction measurement system (producer: Allied, model: 120-30010) is utilized to measure flip-chip envelope
The initial distance at dress ic substrate face to the flip-chip back side, by the height of this distance deduction soldered ball,
Original depth (generally 700 μm-900 μ m-thick) to flip-chip.
The height of above-mentioned soldered ball can obtain in the following manner: 1, by the type Flip-Chip Using to be detected
The design of integrated circuit, knows the height of described soldered ball；2, the upside-down mounting core to be detected of same type is separately taken
Sheet encapsulation integrated circuit, carries out cross-section analysis, measures the height obtaining described soldered ball；3, described soldered ball is preset
Height be 80 μm-100 μm.
2, corase grind.
With the diamond lap flip-chip back side that particle diameter is 30 μm, flip-chip is thinned to about 200 μm.
Now, directly measure, with numeral instruction measurement system, the distance obtained and be about 300 μm.
3, fine grinding.
With the diamond lap flip-chip back side that particle diameter is 15 μm, flip-chip is thinned to about
100 μm-105 μm, this thickness is in infrared, the transparent suitable thickness range of near infrared light.Now,
Directly measure, with numeral instruction measurement system, the distance obtained and be about 200 μm.
4, polishing.
First with diamond suspension that particle diameter is 6 μm and polishing cloth (producer: Allied, model: Kempad)
The polishing flip-chip back side about 60 seconds-90 seconds, then with diamond suspension that particle diameter is 1 μm and Flocked fabric (factory
Family: Allied, model: Red Final C) the polishing flip-chip back side, described flip-chip is subtracted in grinding
During thin produce cut and/or burr remove, make ground thinning after flip-chip back side flat smooth,
And prevent thinning after chip surface oxidation, to obtain final product.
During above-mentioned steps 2-4, the chip thickness of flip-chip back side multiple spot need to be monitored, if the core of each point
Sheet variable thickness causes, and should adjust fixture levelness in time, makes follow-up grinding keep flip chip surface smooth.
Further, thinning and polishing should be stopped when monitoring chip thinning to suitable thickness requirement.
Four, flip-chip obtained above detection sample is unloaded from fixture, carry out subsequent analysis.
Embodiment 2
A kind of preparation method of flip-chip detection sample, essentially identical with the method in embodiment 1, different
Part is in " two, fixing " step.
Two, fixing.
By the flip-chip back side outwardly in the way of, with hot melt wax, above-mentioned Flip-Chip Using integrated circuit is fixed
On fixture.
Owing to the Flip-Chip Using integrated circuit in the present embodiment is flip chip pin grid array packing forms collection
Become circuit, as in figure 2 it is shown, first empty at the pin of this flip chip pin grid array packing forms integrated circuit 1
Gap adds barrier blocks 2, then contacts fixing with described fixture 3 by this barrier blocks 2.
Further, in the present embodiment, the usage amount of hot melt wax should be improved so that it is sufficiently thick, to protect sample
Soldered ball and improve cementability.
Each technical characteristic of embodiment described above can combine arbitrarily, for making description succinct, the most right
The all possible combination of each technical characteristic in above-described embodiment is all described, but, if these skills
There is not contradiction in the combination of art feature, is all considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed,
But can not therefore be construed as limiting the scope of the patent.It should be pointed out that, for this area
For those of ordinary skill, without departing from the inventive concept of the premise, it is also possible to make some deformation and change
Entering, these broadly fall into protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be with appended power
Profit requires to be as the criterion.
Claims (10)
1. the preparation method of a flip-chip detection sample, it is characterised in that comprise the following steps:
Pre-treatment: soak Flip-Chip Using integrated circuit to be detected with organic solvent, make bonding package casing
Adhesive glue soften or dissolve, then this package casing is pried open, exposes and be fixed on flip-chip by soldered ball and seal
The flip-chip back side on dress ic substrate face；
Fixing: by the flip-chip back side outwardly in the way of, with hot melt wax by integrated for above-mentioned Flip-Chip Using electricity
Road is fixed on fixture；
Grind: the flip-chip back side exposed is ground thinning, and it is integrated to monitor Flip-Chip Using
The distance at circuit substrate face to the flip-chip back side, by the height of this distance deduction soldered ball, is chip thickness,
It is ground to chip thickness when being preset thickness, stops grinding, obtain flip-chip detection sample.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that
Described fixing with grinding steps between, also include thickness measure step, this thickness measure step is: measure
The initial distance at cartridge chip packaged IC substrate face to the flip-chip back side, obtains the initial of flip-chip
Thickness.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
State in grinding steps, include corase grind, fine grinding, polishing process successively,
In described corase grind operation, with the diamond lap flip-chip back side that particle diameter is 25 μm-35 μm；
In described fine grinding operation, with the diamond lap flip-chip back side that particle diameter is 10 μm-20 μm；
In described polishing process, first diamond suspension and polishing cloth so that particle diameter is 4 μm-8 μm polish upside-down mounting
Chip back, then with diamond suspension that particle diameter is 0.5 μm-2 μm and the Flocked fabric polishing flip-chip back side,
Described flip-chip is being ground the cut produced in thinning process and/or burr is removed, make ground thinning after
Flip-chip back side flat smooth, to obtain final product.
The preparation method of flip-chip the most according to claim 3 detection sample, it is characterised in that institute
Stating in corase grind operation, being ground to chip thickness is 150 μm-250 μm；In described fine grinding operation, it is ground to core
Sheet thickness is 100 μm-110 μm.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
Stating in grinding steps, described preset thickness is directly to use up thickness needed for transmitting microscopic analysis during flip-chip detection
Degree.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
The height stating soldered ball obtains by the following method:
By the design of the type Flip-Chip Using to be detected integrated circuit, know the height of described soldered ball
Degree；
Or
Separately taking the Flip-Chip Using integrated circuit to be detected of same type, carry out cross-section analysis, measurement obtains
The height of described soldered ball；
Or
The height presetting described soldered ball is 80 μm-100 μm.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
State in grinding steps, the chip thickness of monitoring flip-chip back side multiple spot, if the chip thickness of each point is inconsistent,
Adjust fixture levelness, make follow-up grinding keep flip chip surface smooth.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
State in fixing step, to assemble horizontal pressure force device, smooth for described Flip-Chip Using integrated circuit is fixed
On described fixture.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that institute
State in fixing step, if described Flip-Chip Using integrated circuit is flip chip pin grid array packing forms collection
Become circuit, first add barrier blocks in the pin space of this flip chip pin grid array packing forms integrated circuit,
Fixed with described holder contacts by this barrier blocks again.
The preparation method of flip-chip the most according to claim 1 detection sample, it is characterised in that
In described pre-treatment step, described organic solvent is selected from: at least one in methyl alcohol, ethanol and acetone.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610200850.5A CN105842611B (en) | 2016-03-31 | 2016-03-31 | The preparation method of flip-chip test sample |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610200850.5A CN105842611B (en) | 2016-03-31 | 2016-03-31 | The preparation method of flip-chip test sample |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105842611A true CN105842611A (en) | 2016-08-10 |
| CN105842611B CN105842611B (en) | 2018-11-30 |
Family
ID=56597826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610200850.5A Active CN105842611B (en) | 2016-03-31 | 2016-03-31 | The preparation method of flip-chip test sample |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105842611B (en) |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107093565A (en) * | 2017-04-07 | 2017-08-25 | 中国电子产品可靠性与环境试验研究所 | The amending method of the integrated circuit of Flip-Chip Using |
| CN108152298A (en) * | 2017-12-21 | 2018-06-12 | 京信通信系统（中国）有限公司 | A kind of detection method and device of solder joint |
| CN109202546A (en) * | 2018-09-29 | 2019-01-15 | 信利半导体有限公司 | Improve the method for flexible base board cutting burr |
| CN109326563A (en) * | 2017-08-01 | 2019-02-12 | 意法半导体(鲁塞)公司 | Detect the method and integrated circuit related with same that the substrate of integrated circuit is thinned from back side |
| CN109716148A (en) * | 2016-09-16 | 2019-05-03 | 高通股份有限公司 | The isolation of visible laser fault |
| CN110587385A (en) * | 2019-09-30 | 2019-12-20 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Method for thinning flip chip on circuit board, grinding drill bit and fixed base |
| CN110871401A (en) * | 2019-11-29 | 2020-03-10 | 湘能华磊光电股份有限公司 | Grinding and polishing method of LED chip |
| US10755404B2 (en) | 2017-12-07 | 2020-08-25 | International Business Machines Corporation | Integrated circuit defect detection using pattern images |
| CN111673932A (en) * | 2020-04-21 | 2020-09-18 | 广州领拓仪器科技有限公司 | Preparation method of silicon wafer section sample |
| CN111812487A (en) * | 2020-07-14 | 2020-10-23 | 长江存储科技有限责任公司 | Preparation method of failure analysis sample and failure analysis sample |
| CN112345336A (en) * | 2020-10-12 | 2021-02-09 | 上海华力集成电路制造有限公司 | Method for polishing back of ultra-small sample |
| CN113702807A (en) * | 2021-08-25 | 2021-11-26 | 长鑫存储技术有限公司 | Chip carrier and chip detection device |
| CN114043378A (en) * | 2021-11-29 | 2022-02-15 | 湖北金禄科技有限公司 | HDI board and inner layer abnormity detection method and device thereof |
| CN114323818A (en) * | 2021-11-17 | 2022-04-12 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Method for sampling internal atmosphere of ceramic airtight component and application |
| CN114335301A (en) * | 2021-12-31 | 2022-04-12 | 佛山市国星光电股份有限公司 | Device processing method and device |
| WO2022083185A1 (en) * | 2020-10-23 | 2022-04-28 | 长鑫存储技术有限公司 | Die taking-out method |
| CN114441598A (en) * | 2022-04-11 | 2022-05-06 | 胜科纳米(苏州)股份有限公司 | 3D stacked and packaged integrated circuit chip and failure positioning method and device thereof |
| US11686765B2 (en) | 2020-10-23 | 2023-06-27 | Changxin Memory Technologies, Inc. | Die extraction method |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100112898A (en) * | 2009-04-10 | 2010-10-20 | 주식회사 하이닉스반도체 | Method of manufactuiring flip chip semiconductor package |
| CN102441840A (en) * | 2010-10-08 | 2012-05-09 | 台湾积体电路制造股份有限公司 | System and method for wafer back-grinding control |
| US20130330855A1 (en) * | 2012-06-12 | 2013-12-12 | Disco Corporation | Optical device processing method |
| CN104008956A (en) * | 2014-06-06 | 2014-08-27 | 航天科工防御技术研究试验中心 | Unsealing method for flip chip device |
| JP2014172135A (en) * | 2013-03-12 | 2014-09-22 | Disco Abrasive Syst Ltd | Grinding method |
| CN104319245A (en) * | 2014-09-19 | 2015-01-28 | 上海华虹宏力半导体制造有限公司 | Method for detecting potential of node inside chip |
| CN104422606A (en) * | 2013-08-27 | 2015-03-18 | 中芯国际集成电路制造(上海)有限公司 | Preparation method of chip failure analysis sample |
| CN104465315A (en) * | 2013-09-24 | 2015-03-25 | 工业和信息化部电子第五研究所 | Chip separation method for 3D stacked chip encapsulator |
| CN104781912A (en) * | 2012-11-20 | 2015-07-15 | 古河电气工业株式会社 | Method for manufacturing semiconductor chips and surface protective tape for thin-film grinding used in same |
| CN105301475A (en) * | 2015-09-22 | 2016-02-03 | 上海华虹宏力半导体制造有限公司 | Packaging chip back surface failure point locating method |
-
2016
- 2016-03-31 CN CN201610200850.5A patent/CN105842611B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100112898A (en) * | 2009-04-10 | 2010-10-20 | 주식회사 하이닉스반도체 | Method of manufactuiring flip chip semiconductor package |
| CN102441840A (en) * | 2010-10-08 | 2012-05-09 | 台湾积体电路制造股份有限公司 | System and method for wafer back-grinding control |
| US20130330855A1 (en) * | 2012-06-12 | 2013-12-12 | Disco Corporation | Optical device processing method |
| CN104781912A (en) * | 2012-11-20 | 2015-07-15 | 古河电气工业株式会社 | Method for manufacturing semiconductor chips and surface protective tape for thin-film grinding used in same |
| JP2014172135A (en) * | 2013-03-12 | 2014-09-22 | Disco Abrasive Syst Ltd | Grinding method |
| CN104422606A (en) * | 2013-08-27 | 2015-03-18 | 中芯国际集成电路制造(上海)有限公司 | Preparation method of chip failure analysis sample |
| CN104465315A (en) * | 2013-09-24 | 2015-03-25 | 工业和信息化部电子第五研究所 | Chip separation method for 3D stacked chip encapsulator |
| CN104008956A (en) * | 2014-06-06 | 2014-08-27 | 航天科工防御技术研究试验中心 | Unsealing method for flip chip device |
| CN104319245A (en) * | 2014-09-19 | 2015-01-28 | 上海华虹宏力半导体制造有限公司 | Method for detecting potential of node inside chip |
| CN105301475A (en) * | 2015-09-22 | 2016-02-03 | 上海华虹宏力半导体制造有限公司 | Packaging chip back surface failure point locating method |
Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109716148A (en) * | 2016-09-16 | 2019-05-03 | 高通股份有限公司 | The isolation of visible laser fault |
| CN107093565A (en) * | 2017-04-07 | 2017-08-25 | 中国电子产品可靠性与环境试验研究所 | The amending method of the integrated circuit of Flip-Chip Using |
| CN109326563A (en) * | 2017-08-01 | 2019-02-12 | 意法半导体(鲁塞)公司 | Detect the method and integrated circuit related with same that the substrate of integrated circuit is thinned from back side |
| US10755404B2 (en) | 2017-12-07 | 2020-08-25 | International Business Machines Corporation | Integrated circuit defect detection using pattern images |
| CN108152298A (en) * | 2017-12-21 | 2018-06-12 | 京信通信系统（中国）有限公司 | A kind of detection method and device of solder joint |
| CN109202546A (en) * | 2018-09-29 | 2019-01-15 | 信利半导体有限公司 | Improve the method for flexible base board cutting burr |
| CN110587385A (en) * | 2019-09-30 | 2019-12-20 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Method for thinning flip chip on circuit board, grinding drill bit and fixed base |
| CN110871401A (en) * | 2019-11-29 | 2020-03-10 | 湘能华磊光电股份有限公司 | Grinding and polishing method of LED chip |
| CN111673932A (en) * | 2020-04-21 | 2020-09-18 | 广州领拓仪器科技有限公司 | Preparation method of silicon wafer section sample |
| CN111812487B (en) * | 2020-07-14 | 2021-04-13 | 长江存储科技有限责任公司 | Preparation method of failure analysis sample and failure analysis sample |
| CN111812487A (en) * | 2020-07-14 | 2020-10-23 | 长江存储科技有限责任公司 | Preparation method of failure analysis sample and failure analysis sample |
| CN112345336A (en) * | 2020-10-12 | 2021-02-09 | 上海华力集成电路制造有限公司 | Method for polishing back of ultra-small sample |
| CN112345336B (en) * | 2020-10-12 | 2023-02-03 | 上海华力集成电路制造有限公司 | Method for polishing back of ultra-small sample |
| WO2022083185A1 (en) * | 2020-10-23 | 2022-04-28 | 长鑫存储技术有限公司 | Die taking-out method |
| US11686765B2 (en) | 2020-10-23 | 2023-06-27 | Changxin Memory Technologies, Inc. | Die extraction method |
| CN113702807A (en) * | 2021-08-25 | 2021-11-26 | 长鑫存储技术有限公司 | Chip carrier and chip detection device |
| CN114323818A (en) * | 2021-11-17 | 2022-04-12 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Method for sampling internal atmosphere of ceramic airtight component and application |
| CN114043378A (en) * | 2021-11-29 | 2022-02-15 | 湖北金禄科技有限公司 | HDI board and inner layer abnormity detection method and device thereof |
| CN114335301A (en) * | 2021-12-31 | 2022-04-12 | 佛山市国星光电股份有限公司 | Device processing method and device |
| CN114441598A (en) * | 2022-04-11 | 2022-05-06 | 胜科纳米(苏州)股份有限公司 | 3D stacked and packaged integrated circuit chip and failure positioning method and device thereof |
| CN114441598B (en) * | 2022-04-11 | 2022-07-08 | 胜科纳米(苏州)股份有限公司 | 3D stacked and packaged integrated circuit chip and failure positioning method and device thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105842611B (en) | 2018-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105842611A (en) | Flip chip detection sample preparation method | |
| US9586291B2 (en) | Adhesives for bonding handler wafers to device wafers and enabling mid-wavelength infrared laser ablation release | |
| US20170125268A1 (en) | Wafer debonding using mid-wavelength infrared radiation ablation | |
| TWI720240B (en) | Manufacturing method of semiconductor package | |
| CN107894359B (en) | Laser chip failure positioning analysis sample preparation method and middleware | |
| US8129277B2 (en) | Method of machining wafer | |
| US6672947B2 (en) | Method for global die thinning and polishing of flip-chip packaged integrated circuits | |
| TWI455215B (en) | Semiconductor package and manufacturing method thereof | |
| TW201735137A (en) | Processing method of wafer | |
| CN1886831A (en) | Production method of semiconductor chip | |
| CN104465315A (en) | Chip separation method for 3D stacked chip encapsulator | |
| US20120184068A1 (en) | Method of manufacturing semiconductor device | |
| US20070141752A1 (en) | Manufacturing method of semiconductor integrated circuit device | |
| KR20010096521A (en) | Semiconductor device and method of producing the same and semiconductor chip and method of producing the same | |
| US20040014401A1 (en) | Method for backside die thinning and polishing of packaged integrated circuits | |
| JP7098221B2 (en) | Wafer processing method | |
| KR20090061996A (en) | Backside protection film, method for forming it and method of manufacturing semiconductor package using the same | |
| Lee et al. | Study of bondable laser release material using 355 nm energy to facilitate RDL-first and Die-first fan-out wafer-level packaging (FOWLP) | |
| JP2014053351A (en) | Wafer processing method | |
| JP7013085B2 (en) | Wafer processing method | |
| TW201935549A (en) | Wafer processing method which does not change the control system of the laser processing device to smoothly divide a wafer configured with bumps | |
| Kim et al. | Plasma dicing before grinding process for highly reliable singulation of low-profile and large die sizes in advanced packages | |
| KR20220155208A (en) | Method of manufacturing device chip | |
| CN110587385B (en) | Method for thinning flip chip on circuit board, grinding drill bit and fixed base | |
| US10345373B2 (en) | Method for inspecting semiconductor device structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |