CN105826331A - Method of manufacturing back-illuminated image sensor adopting back-illuminated deep trench isolation - Google Patents
Method of manufacturing back-illuminated image sensor adopting back-illuminated deep trench isolation Download PDFInfo
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Abstract
The invention provides a method of manufacturing a back-illuminated image sensor adopting back-illuminated deep trench isolation, comprising the following steps: providing a device wafer, a first carrier wafer, and a second carrier wafer; forming a plurality of deep trench isolation structures on a first side of the device wafer; repairing the defects of the deep trench isolation structures through a thermal process in a subsequent technology; carrying out first wafer bonding on the first side of the device wafer and the first carrier wafer, thinning the device wafer, forming a second side of the device wafer, and making a device and a metal interconnect on the surface; and carrying out second wafer bonding on the first side of the device wafer and the second carrier wafer to form a back-illuminated image sensor with back deep trench isolation structures. For the back-illuminated deep trench isolation of the invention, deep trench isolation structures are formed first, and then, the defects generated in the forming process of deep trench isolation are repaired selectively through a high-temperature thermal process in the subsequent technology. Thus, dark current and white spots are reduced, and a level without deep trench isolation is achieved.
Description
Technical field
The present invention relates to field of image sensors, particularly relate to a kind of back side deep trench isolation of using
Back side illumination image sensor.
Background technology
Imageing sensor is the semiconductor device converting optical signal into the signal of telecommunication, and imageing sensor has photo-electric conversion element.
Imageing sensor is by being divided into again CMOS (Complementary Metal Oxide Semiconductor) (CMOS) imageing sensor and charge-coupled device (CCD) imageing sensor.The advantage of ccd image sensor is compared with high and noise is little to image sensitivity, but ccd image sensor and other devices is integrated relatively difficult, and the power consumption of ccd image sensor is higher.By contrast, to have technique simple, easily and other devices are integrated, volume is little, lightweight, power consumption is little, low cost and other advantages for cmos image sensor.Therefore, along with technology develops, cmos image sensor replaces ccd image sensor more and more and is applied in each electronic product.Cmos image sensor has been widely used for static digital camera, camera cell phone, DV, medical camera head (such as gastroscope), automobile-used camera head etc. at present.
The most front illuminated (FSI) of existing cmos image sensor and back-illuminated type (BSI), BSI is positioned at the back side into light direction due to multilamellars such as metal levels, can effectively prevent the crosstalk (Crosstalk) caused into light, incident flux is provided, is widely used to middle high pixel image processing sensor field at present；Make during BSI the pixel cell in the array arrangement of pixel region need to be physically separated by groove, electric isolation, prior art often uses and first does the method that image sensor devices makes deep trench isolation again, but this method can cause the defect of deep trench isolation to be difficult to remove, remove according to high temperature thermal oxidation metallization processes, owing to heating-up temperature is often higher than 800 degrees Celsius, the functional lesion of image sensor devices can be caused, cause imageing sensor to lose efficacy.Additionally, BSI mode improves the transport efficiency of carrier, prevent dark current, improve signal to noise ratio be also the most widely sought problem.
Summary of the invention
The present invention provides the manufacture method of a kind of back side illumination image sensor using back side deep trench isolation, at least includes step:
Device wafers, the first carrying wafer and the second carrying wafer are provided;
First some deep trench isolation structure of formation in device wafers；
The defect of described deep trench isolation structure is repaired by the thermal process in subsequent technique；
First of device wafers carries out wafer bonding for the first time, thinning device wafers with the first carrying wafer, forms second of device wafers, and in this surface making devices and metal interconnection；
Carry out second time wafer bonding formation with the second carrying wafer and there is the back side illumination image sensor of back side deep trench isolation structure.
Preferably, it is doped prior to the surface (BSI face) of device wafers, during subsequent thermal, activates this doped region.
Preferably, include after forming deep trench isolation structure: form heat oxide film in deep trench isolation body structure surface；Deposition cover layer is on heat oxide film, and at least in protection deep trench isolation structure, silicon and heat oxide film interface are not destroyed during subsequent technique, keep perfect interfacial structure, thus reduce dark current.
Preferably, described cover layer is conductive material layer or dielectric layer.
Preferably, the combination that material is polysilicon, metal or polysilicon and metal of described conductive material layer, on described conductive material layer, add negative pressure, form the surface pinning layer of deep trench isolation structure.
Use in the back-illuminated type deep trench isolation of the present invention, it is initially formed deep trench isolation structure, and selectable in follow-up technique use high-temperature hot process in deep trench isolation forming process produce defect repair, its defect pixel quantity can be substantially reduced and can reach the level without deep trench isolation；And because the technical program can be initially formed deep layer photodiode before forming image sensor devices, reduce the technology difficulty of wafer another side；The wafer thickness of back side illumination image sensor can be increased simultaneously, increasing to 3um from present 2.1um, the light sensitivitys of HONGGUANG can improve about 15%, and the light sensitivitys of green glow can improve 5%, the full trap electric capacity of photodiode can improve more than 50%, improves the performance of back side illumination image sensor.Additionally, deep trench isolation inside configuration is selectable is filled with conductive material, the region transoid near deep trench isolation structure can be made by negative applied voltage, form pinning layer, preferably to reduce surface defect；And may select and lay charge carrying media layer in interface surface so that interface internal also forms pinning layer；Reduce surface defect further, reduce dark current.
Accompanying drawing explanation
By Figure of description and being used for illustrating the detailed description of the invention of some principle of the present invention subsequently together with Figure of description, further feature and advantage that the present invention is had will be clear from or more specifically be illustrated.
Fig. 1 to Figure 15 is used structural representation corresponding to each step of manufacture method of back side illumination image sensor of back-illuminated type deep trench isolation by what one embodiment of the invention provided；
Fig. 1 to Fig. 5 A, Fig. 5 B, Fig. 6 to Figure 15 are used structural representation corresponding to each step of manufacture method of back side illumination image sensor of back-illuminated type deep trench isolation by what one embodiment of the invention provided；
Figure 16 to Figure 30 is used structural representation corresponding to each step of manufacture method of back side illumination image sensor of back-illuminated type deep trench isolation by what one embodiment of the invention provided；
Figure 31 is provided the method flow diagram of the manufacture method of the back side illumination image sensor using back-illuminated type deep trench isolation by one embodiment of the invention.
Detailed description of the invention
The deep trench isolation structure of existing back side illumination image sensor is formed after forming image sensor devices, owing to Primary Component has been formed, need temperature in subsequent deep trench recess isolating structure forming process, the many factors of environment is considered, and should ensure that the interface formedness on isolation structure surface prevents damage device again.Owing to can bring surface defect during forming isolation structure, surface defect can cause depending on of carrier, can increase dark current, and repairing such defect needs the most again the multiple special environments such as high temperature, can affect even infringement image sensor devices performance.
Therefore, the present invention proposes a kind of back side illumination image sensor using back side deep trench isolation and preparation method thereof, forms deep trench isolation structure in the manufacture method of the back side illumination image sensor using back side deep trench isolation in the present invention before forming image sensor devices.That is: device wafers, definition pixel region and outer peripheral areas are provided;Some deep trench isolation structures are formed in device wafers；Repair the damage formed in deep trench isolation configuration steps;Forming image sensor devices, described deep trench isolation structure separates adjacent pixel unit.The present invention can repair the surface defect forming deep trench isolation structure, and the performance of imageing sensor is greatly improved.
The present invention is specifically addressed by Figure of description and following some embodiments below in conjunction with the present invention: please also refer to the structural representation that each step of manufacture method of the imageing sensor using back-illuminated type deep trench isolation that Fig. 1 to Figure 15, Fig. 1 to Figure 15 are provided by one embodiment of the invention is corresponding.
In Fig. 1, it is provided that device wafers 100, definition pixel region C and outer peripheral areas D.Device wafers is to make the carrier of image sensor devices, uses epitaxial wafer, SOI wafer, and wherein epitaxial wafer can use substrate to be p-type, and epitaxial layer is N-type or p-type；N-type substrate, epitaxial layer is p-type or N-type.Pixel region C is the region forming image sensor pixel cells, for the transistor arrangement being subsequently formed in pixel cell and other structure in this region；Analog circuit that outer peripheral areas D predominantly may relate to, digital circuit, modulus process circuit etc..
Lay etching barrier layer 200 in Fig. 2 in the back side of device wafers 100, this etching barrier layer 200 uses hard mask or photoresist layer, and hard mask layer can use silicon dioxide, silicon nitride, and thickness is: 2000A～5000A；The thickness of photoresist layer is: 1um～5um.Thering is provided light shield in Fig. 3, use wet etching or dry etching or both combinations to form some deep trench isolation structures 101, the etching barrier layer 200 laid in Fig. 2 serves the effect of stop portions region etch.Fig. 4 uses the interface of thermal oxide prosthetic device wafer 100, the mode using wet etching removes the etching barrier layer 200 on surface, the damage at the interface of device wafers 100 now is repaired again by thermal process, it is to be noted, during etching, inevitably physical damnification is caused at interface, now owing to also not carrying out the making of image sensor devices, can use various temperature, the environment of pressure controllable is repaired, without considering to affect Primary Component, use thermal oxide, etching, thermal process reparation in the present embodiment.Additionally, the doped well region needed for can being adulterated by the back side A of device wafers 100 after forming some deep trench isolation structures 101, formation n-type doping district 102 of can adulterating in making imageing sensor, now the degree of depth in n-type doping district 102 is: 1～2um；Concentration is: 1e14～5e16；The degree of depth that n-type doping district 102 can be more traditional is deeper, concentration is the highest in the present embodiment in now being formed to it is to be noted the present invention, and n-type doping region 102 is the subregion of photodiode；Because traditional photodiode is in the reverse side at the back side of device wafers, i.e. second B doping is formed, and due to distant, the complex process of doping, effect is poor.The most also can carry out hot activation after photodiode 102 make the doping concentration distribution in photodiode 102 more preferably in being formed, owing to can affect other regions of device in traditional handicraft according to hot activation, and in the present invention without considering this factor.Please continue to refer to Fig. 4; after Fig. 4, form thermal oxide layer (mark) be covered in the back side A of device wafers; the thickness of thermal oxide layer (mark) is 20 angstroms～40 angstroms, and thermal oxide layer can play the effect at protection deep trench isolation structure 101 interface.In Fig. 5 A, deposition conductive material layer 300, on thermal oxide layer (mark), covers deep trench isolation structure 101.Conductive material layer 300 fills the pixel region C of deep trench isolation structure 101 region covering device wafer, outer peripheral areas D；Conductive material layer 300 is the polysilicon material of n-type doping in the present embodiment, may be used without the combination of metal or metal and polysilicon material in another embodiment.In Fig. 6, deposition cover layer 400 also covers conductive material layer 300 surface.In the present embodiment, cover layer 400 uses silicon dioxide layer, cover layer 400 1 aspect to play the effect of protection conductive material layer 300, on the other hand prepares with the first carrying wafer bonding for follow-up device wafers, and the thickness of cover layer 400 is 1um to 3um.In Fig. 7, it is provided that the first carrying wafer 500 is bonded in device wafers 100 for the first time by cover layer 400；First carrying wafer 500 is without device wafers, primarily serves carrying and the step of auxiliary subsequent technique processing.In Fig. 8, the device of bonding is overturn, second B of device wafers 100 is carried out thinning, thinning employing chemically mechanical polishing, the mode of physical mechanical polish.In Fig. 9, carry out standard image sensor technique and make formation image sensor devices.Please also refer to Figure 10 to Figure 13, it is provided that the second carrying wafer 600 is in second B second time bonding of device wafers 100；Being ground by the direction of the first carrying wafer 500 and be thinned to described cover layer 400, the thickness of the cover layer 400 now retained is between 3000 angstroms to 20000 angstroms；By the way of chemically mechanical polishing or physical mechanical polish are thinning, further thinning cover layer 400 is to the upper surface exposing conductive material layer 300；The partially electronically conductive material layers 300 outside deep trench isolation structure 101 is removed by wet etching or dry etching, now still fill with the conductive material layer 300 of part in the opening of deep trench isolation structure 101, the upper surface of deep trench isolation structure 101 opening flushes to the interface of the thermal oxide layer outside deep trench isolation structure 101, or the interface of the thermal oxide layer being depressed in outside deep trench isolation structure 101.Now being filled with conductive material layer 300 in the opening of deep trench isolation structure 101, device wafers 100 is equipped with thermal oxide layer (mark) except other region of deep trench isolation structure 101 opening.Please also refer to Figure 14 to Figure 15, deposition hafnium oxide layer 700 is covered in the surface of the opening being simultaneously covered in deep trench isolation structure 101 on the thermal oxide layer (mark) of device wafers, remove the part hafnium oxide layer 700 on several deep trench isolation structure 101 surfaces, deposition metal gate compartment 800 is in the surface of deep trench isolation structure 101 corresponding region, now the conductive material layer 300 of several deep trench isolation structures 101 is directly connected to the subregion of metal gate compartment 800, also it is separated with hafnium oxide layer 700 between having between conductive material layer 300 and the metal gate compartment 800 of some deep trench isolation structures 101 still.Offer specific voltage is in conductive material layer 300, selectable: pixel region C isolation connects negative voltage, and external zones D isolates ground connection；Deep trench isolation structure 101 inner surface of pixel region C can form hole accumulation layer due to the impact of this negative voltage, and pinning lives the current potential of interface inner surface, i.e. forms pinning layer 103；Hafnium oxide layer 700 owing to also can form one layer of pinning layer 104 with negative charge in the surface of wafer device 100, and to play the effect reducing defect, metal gate compartment 800 can use tungsten, hafnium oxide layer 700 that tantalum oxide layers can be used to substitute, for charge carrying media layer；Selectable between hafnium oxide layer 700 and metal gate compartment 800, also can form anti-reflection layer (mark).Ultimately form passivation layer, chromatic filter layer 900, microlens layer 1000.
Please also refer to the structural representation that each step of manufacture method of the imageing sensor using back-illuminated type deep trench isolation that Fig. 1 to Fig. 5 A and Fig. 5 B to Figure 15, Fig. 1 to Fig. 5 A and Fig. 5 B to Figure 15 are provided by another embodiment of the present invention is corresponding.
In Fig. 1, it is provided that device wafers 100, definition pixel region C and outer peripheral areas D.Device wafers is to make the carrier of image sensor devices, uses epitaxial wafer, SOI wafer, and wherein epitaxial wafer can use substrate to be p-type, and epitaxial layer is N-type or p-type；N-type substrate, epitaxial layer is p-type or N-type.Pixel region C is the region forming image sensor pixel cells, for the transistor arrangement being subsequently formed in pixel cell and other structure in this region；Analog circuit that outer peripheral areas D predominantly may relate to, digital circuit, modulus process circuit etc..
Lay etching barrier layer 200 in Fig. 2 in the back side of device wafers 100, this etching barrier layer 200 uses hard mask or photoresist layer, and hard mask layer can use silicon dioxide, silicon nitride, and thickness is: 2000A～5000A；The thickness of photoresist layer is: 1um～5um.Thering is provided light shield in Fig. 3, use wet etching or dry etching or both combinations to form some deep trench isolation structures 101, the etching barrier layer 200 laid in Fig. 2 serves the effect of stop portions region etch.Fig. 4 uses the interface of thermal oxide prosthetic device wafer 100, the mode using wet etching removes the etching barrier layer 200 on surface, the damage at the interface of device wafers 100 now is repaired again by thermal process, it is to be noted, during etching, inevitably physical damnification is caused at interface, now owing to also not carrying out the making of image sensor devices, various temperature can be used, the environment of pressure controllable is repaired, it is not necessary to consider to affect Primary Component.Additionally, the doped well region needed for can being adulterated by the back side A of device wafers 100 after forming some deep trench isolation structures 101, formation n-type doping district 102 of can adulterating in making imageing sensor, now the degree of depth in n-type doping district 102 is: 1～2um；Concentration is: 1e14～5e16；The degree of depth that n-type doping district 102 can be more traditional is deeper, concentration is higher in now being formed to it is to be noted the present invention；Because traditional photodiode is in the reverse side at the back side of device wafers, i.e. second B doping is formed, and due to distant, the complex process of doping, effect is poor.The most also can carry out hot activation after n-type doping district 102 make the doping concentration distribution in n-type doping district 102 more preferably, owing to can affect other regions of device in traditional handicraft according to hot activation, and in the present invention without considering this factor in being formed.Please continue to refer to Fig. 4; after Fig. 4, form thermal oxide layer (mark) be covered in the back side A of device wafers; the thickness of thermal oxide layer (mark) is 20 angstroms～40 angstroms, and thermal oxide layer can play the effect at protection deep trench isolation structure 101 interface.In Fig. 5 A, deposition conductive material layer 300, on thermal oxide layer (mark), covers deep trench isolation structure 101.Conductive material layer 300 fills the pixel region C of deep trench isolation structure 101 region covering device wafer, outer peripheral areas D；Conductive material layer 300 is the polysilicon material of n-type doping in the present embodiment, may be used without the combination of metal or metal and polysilicon material in another embodiment.In Fig. 5 B, etching removes the conducting medium layer of outer peripheral areas D, exposes thermal oxide layer.In Fig. 6, deposition cover layer 400 also covers conductive material layer 300 surface, and in the present embodiment, cover layer 400 uses silicon dioxide layer.Cover layer 400 1 aspect plays the effect of protection conductive material layer 300, on the other hand prepares with the first wafer bonding for follow-up device wafers, and the thickness of cover layer 400 is: 1um to 3um.In Fig. 7, it is provided that the first carrying wafer 500 is bonded in device wafers 100 for the first time by cover layer 400；First carrying wafer 500 is without device wafers, primarily serves carrying and the step of auxiliary subsequent technique processing.In Fig. 8, the device of bonding is overturn, the second face of device wafers 100 is carried out thinning, thinning employing chemically mechanical polishing, the mode of physical mechanical polish.In Fig. 9, carry out standard image sensor technique and make formation image sensor devices.Please also refer to Figure 10 to Figure 13, it is provided that the second wafer 600 is in second B second time bonding of device wafers 100；Being ground by the direction of the first carrying wafer 500 and be thinned to described cover layer 400, the thickness of the cover layer 400 now retained is between 3000 angstroms to 20000 angstroms；By the way of chemically mechanical polishing or physical mechanical polish are thinning, further thinning cover layer 400 is to the upper surface exposing conductive material layer 300；The partially electronically conductive material layers 300 of deep trench isolation structure 101 exterior domain is removed by wet etching or dry etching, now still fill with the conductive material layer 300 of part in the opening of deep trench isolation structure 101, the upper surface of deep trench isolation structure 101 opening flushes to the interface of the thermal oxide layer outside deep trench isolation structure 101, or the interface of the thermal oxide layer being depressed in outside deep trench isolation structure 101.Now the opening of deep trench isolation structure 101 is conductive material layer 300, and device wafers 100 is equipped with thermal oxide layer (mark) except other region of deep trench isolation structure 101 opening.Please also refer to Figure 14 to Figure 15, deposition hafnium oxide layer 700 is covered in the surface of the opening being simultaneously covered in deep trench isolation structure 101 on the thermal oxide layer (mark) of device wafers, remove the part hafnium oxide layer 700 on several deep trench isolation structure 101 surfaces, deposition metal gate compartment 800 is in the surface of deep trench isolation structure 101 corresponding region, now the conductive material layer 300 of several deep trench isolation structures 101 is directly connected to the subregion of metal gate compartment 800, also it is separated with hafnium oxide layer between having between conductive material layer 300 and the metal gate compartment 800 of some deep trench isolation structures 101 still.Offer specific voltage is in conductive material layer 300, selectable: pixel region C isolation connects negative voltage, and external zones D isolates ground connection；Deep trench isolation structure 101 inner surface of pixel region C can form hole accumulation layer due to the impact of this negative voltage, and pinning lives the current potential of interface inner surface, i.e. forms pinning layer 103；Hafnium oxide layer 700 owing to also can form one layer of pinning layer 104 with negative charge in the surface of wafer device 100, and to play the effect reducing defect, metal gate compartment 800 can use tungsten.Hafnium oxide layer 700 can use tantalum oxide layers to substitute, and is charge carrying media layer；Selectable between hafnium oxide layer 700 and metal gate compartment 800, also can form anti-reflection layer (mark).Ultimately form passivation layer and chromatic filter layer 900, microlens layer 1000.
Please also refer to the structural representation that each step of manufacture method of the imageing sensor using back-illuminated type deep trench isolation that Figure 16 to Figure 30, Figure 16 to Figure 30 are provided by another embodiment of the present invention is corresponding.
In Figure 16, it is provided that device wafers 100, definition pixel region C and outer peripheral areas D.Device wafers is to make the carrier of image sensor devices, uses epitaxial wafer, SOI wafer, and wherein epitaxial wafer can use substrate to be p-type, and epitaxial layer is N-type or p-type；N-type substrate, epitaxial layer is p-type or N-type.Pixel region C is the region forming image sensor pixel cells, for the transistor arrangement being subsequently formed in pixel cell and other structure in this region；Analog circuit that outer peripheral areas D predominantly may relate to, digital circuit, modulus process circuit etc..
Lay etching barrier layer 200 in Figure 17 in the back side of device wafers 100, this etching barrier layer 200 uses hard mask or photoresist layer, and hard mask layer can use silicon dioxide, silicon nitride, and thickness is 2000A～5000A；Photoresist layer thickness is: 1um～5um.Thering is provided light shield in Figure 18, use wet etching or dry etching or both combinations to form some deep trench isolation structures 101, the etching barrier layer 200 laid in Figure 17 serves the effect of stop portions region etch.Figure 19 uses the interface of thermal oxide prosthetic device wafer 100, the mode using wet etching removes the etching barrier layer 200 on surface, the damage at the interface of device wafers 100 now is repaired again by thermal process, it is to be noted, during etching, inevitably physical damnification is caused at interface, now owing to also not carrying out the making of image sensor devices, various temperature can be used, the environment of pressure controllable is repaired, it is not necessary to consider to affect Primary Component.Additionally, the doped well region needed for can being adulterated by the back side A of device wafers 100 after forming some deep trench isolation structures 101, formation n-type doping district 102 of can adulterating in making imageing sensor, now the degree of depth in n-type doping district 102 is: 1～2um；Concentration is: 1e14～5e16；The degree of depth that n-type doping district 102 can be more traditional is deeper, concentration is higher in now being formed to it is to be noted the present invention；Because traditional photodiode is in the reverse side at the back side of device wafers, i.e. second B doping is formed, due to distant, the complex process of doping, effect poor,.The most also can carry out hot activation after photodiode 102 make the doping content in photodiode 102 the most more preferably in being formed, owing to can affect other regions of device in traditional handicraft according to hot activation, and in the present invention without considering this factor.Please continue to refer to Figure 19; after Figure 19, form thermal oxide layer (mark) be covered in the back side A of device wafers; the thickness of thermal oxide layer (mark) is 20 angstroms～40 angstroms, and thermal oxide layer can play the effect at protection deep trench isolation structure 101 interface.In Fig. 5 A, deposition first medium layer 310, on thermal oxide layer (mark), uses silicon dioxide layer to cover deep trench isolation structure 101 in the present embodiment.First medium layer 310 fills the pixel region C of deep trench isolation structure 101 region covering device wafer, outer peripheral areas D；First medium layer 310 uses in another embodiment.In Figure 21, deposition cover layer 400 also covers first medium layer 310 surface, and in the present embodiment, cover layer 400 uses silicon dioxide layer,.Cover layer 400 1 aspect plays the effect of protection first medium layer 310, on the other hand prepares with the first wafer bonding for follow-up device wafers, and the thickness of cover layer 400 is: 1um to 3um.In Figure 22, it is provided that the first carrying wafer 500 is bonded in device wafers 100 for the first time by cover layer 400；First carrying wafer 500 is without device wafers, primarily serves carrying and the step of auxiliary subsequent technique processing.In Figure 23, the device of bonding is overturn, the second face of device wafers 100 is carried out thinning, thinning employing chemically mechanical polishing, the mode of physical mechanical polish.In Figure 24, carry out standard image sensor technique and make formation image sensor devices.Please also refer to Figure 25 to Figure 28, it is provided that the second wafer 600 is in second B second time bonding of device wafers 100；The direction having the first carrying wafer 500 is ground and is thinned to thinning cover layer 400 to the upper surface exposing first medium layer 310；The thermal oxide layer (mark) outside deep trench isolation structure 101 is removed by wet etching or dry etching, and remove the part first medium layer 310 of deep trench isolation structure 101 open upper surface, now still fill with the first medium layer 310 of part in the opening of deep trench isolation structure 101, the upper surface of deep trench isolation structure 101 opening flushes to the interface of the thermal oxide layer outside deep trench isolation structure 101, or the interface of the thermal oxide layer being depressed in outside deep trench isolation structure 101.Now the opening of deep trench isolation structure 101 is first medium layer 310, and device wafers 100 is equipped with thermal oxide layer (mark) except other region of deep trench isolation structure 101 opening.Please also refer to Figure 29 to Figure 30, deposition hafnium oxide layer 700 is covered in the surface of the opening being simultaneously covered in deep trench isolation structure 101 on the thermal oxide layer (mark) of device wafers, removing the part hafnium oxide layer 700 on several deep trench isolation structure 101 surfaces, deposition metal gate compartment 800 is in the surface of deep trench isolation structure 101 corresponding region；Hafnium oxide layer 700 owing to also can form one layer of pinning layer 104 with negative charge in the surface of wafer device 100, and to play the effect reducing defect, metal gate compartment 800 can use tungsten.Hafnium oxide layer 700 can use tantalum oxide layers to substitute, and is charge carrying media layer；Selectable between hafnium oxide layer 700 and metal gate compartment 800, also can form anti-reflection layer (mark).Ultimately form passivation layer and chromatic filter layer 900, microlens layer 1000.
Refer to the method flow diagram that Figure 31, Figure 31 are provided the manufacture method of the back side illumination image sensor using back-illuminated type deep trench isolation by one embodiment of the invention.The present invention uses the manufacture method of the back side illumination image sensor of back side deep trench isolation, including step: provide device wafers, the first carrying wafer and the second carrying wafer;First some deep trench isolation structure of formation in device wafers；The defect of described deep trench isolation structure is repaired by the thermal process in subsequent technique；First of device wafers carries out wafer bonding for the first time, thinning device wafers with the first carrying wafer, forms second of device wafers, and in this surface making devices and metal interconnection；Carry out second time wafer bonding formation with the second carrying wafer and there is the back side illumination image sensor of back side deep trench isolation structure.In the present invention, the surface (BSI face) prior to device wafers is doped, and activates this doped region during subsequent thermal.And in forming deep trench isolation structure: form heat oxide film in deep trench isolation body structure surface；Deposition cover layer is on heat oxide film, and at least in protection deep trench isolation structure, silicon and heat oxide film interface are not destroyed during subsequent technique, keep perfect interfacial structure, thus reduce dark current.Described cover layer is conductive material layer or dielectric layer.The combination that material is polysilicon, metal or polysilicon and metal of described conductive material layer, adds negative pressure on described conductive material layer, forms the surface pinning layer of deep trench isolation structure.
The present embodiment is initially formed deep trench isolation structure, and selectable in follow-up technique use high-temperature hot process in deep trench isolation forming process produce defect repair, its defect pixel quantity can be substantially reduced and can reach the level without deep trench isolation；And because the technical program can be initially formed deep layer photodiode before forming image sensor devices, reduce the technology difficulty of wafer another side；Can increase wafer thickness, the 2.1um from existing way increases to 3um, and the light sensitivitys of HONGGUANG can improve about 15%, and the light sensitivitys of green glow can improve 5%, and the full trap electric capacity of photodiode can improve more than 50% simultaneously.Improve the performance of back side illumination image sensor.The most selectable in interface surface laying charge carrying media layer so that interface internal also forms pinning layer；Reduce surface defect further, reduce dark current.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (5)
1. the manufacture method of the back side illumination image sensor using back side deep trench isolation, it is characterised in that, at least include step:
Device wafers, the first carrying wafer and the second carrying wafer are provided;
First some deep trench isolation structure of formation in device wafers；
The defect of described deep trench isolation structure is repaired by the thermal process in subsequent technique；
First of device wafers carries out wafer bonding for the first time, thinning device wafers with the first carrying wafer, forms second of device wafers, and in this surface making devices and metal interconnection；
Carry out second time wafer bonding formation with the second carrying wafer and there is the back side illumination image sensor of back side deep trench isolation structure.
Manufacture method the most according to claim 1, it is characterised in that described step includes: be doped prior to the surface of device wafers, activates this doped region during subsequent thermal.
Manufacture method the most according to claim 1, it is characterised in that include after forming deep trench isolation structure: form heat oxide film in deep trench isolation body structure surface；Deposition cover layer is on heat oxide film, and at least in protection deep trench isolation structure, silicon and heat oxide film interface are not destroyed during subsequent technique, keep perfect interfacial structure, thus reduce dark current.
Manufacture method the most according to claim 3, it is characterised in that described step also includes: described cover layer is conductive material layer or dielectric layer.
Manufacture method the most according to claim 4, it is characterised in that the combination that material is polysilicon, metal or polysilicon and metal of described conductive material layer, adds negative pressure on described conductive material layer, forms the surface pinning layer of deep trench isolation structure.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017173637A1 (en) * | 2016-04-07 | 2017-10-12 | 格科微电子（上海）有限公司 | Method for manufacturing back-illuminated image sensor using back-side deep trench isolation |
| CN107946329A (en) * | 2017-11-03 | 2018-04-20 | 武汉新芯集成电路制造有限公司 | A kind of preparation method and pixel wafer of leaded light isolation structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2017173637A1 (en) * | 2016-04-07 | 2017-10-12 | 格科微电子（上海）有限公司 | Method for manufacturing back-illuminated image sensor using back-side deep trench isolation |
| CN107946329A (en) * | 2017-11-03 | 2018-04-20 | 武汉新芯集成电路制造有限公司 | A kind of preparation method and pixel wafer of leaded light isolation structure |
| CN110310968A (en) * | 2019-07-05 | 2019-10-08 | 德淮半导体有限公司 | Stack imaging sensor and forming method thereof |
| CN113540140A (en) * | 2021-07-15 | 2021-10-22 | 上海芯物科技有限公司 | Back-illuminated complementary metal oxide semiconductor image sensor and preparation method thereof |
| CN113540140B (en) * | 2021-07-15 | 2022-12-09 | 上海芯物科技有限公司 | Back-illuminated complementary metal oxide semiconductor image sensor and preparation method thereof |
| CN117238842A (en) * | 2023-11-14 | 2023-12-15 | 合肥晶合集成电路股份有限公司 | Deep trench forming method and backside illuminated image sensor manufacturing method |
| CN117238842B (en) * | 2023-11-14 | 2024-03-08 | 合肥晶合集成电路股份有限公司 | Deep trench forming method and backside illuminated image sensor manufacturing method |
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