CN105807558A - Novel combined mask - Google Patents

Novel combined mask Download PDF

Info

Publication number
CN105807558A
CN105807558A CN201410844113.XA CN201410844113A CN105807558A CN 105807558 A CN105807558 A CN 105807558A CN 201410844113 A CN201410844113 A CN 201410844113A CN 105807558 A CN105807558 A CN 105807558A
Authority
CN
China
Prior art keywords
mask plate
mask
region
transmission region
novel combination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410844113.XA
Other languages
Chinese (zh)
Inventor
樊茂
王家庆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spreadtrum Communications Shanghai Co Ltd
Original Assignee
Spreadtrum Communications Shanghai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spreadtrum Communications Shanghai Co Ltd filed Critical Spreadtrum Communications Shanghai Co Ltd
Priority to CN201410844113.XA priority Critical patent/CN105807558A/en
Publication of CN105807558A publication Critical patent/CN105807558A/en
Pending legal-status Critical Current

Links

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

The invention relates to the field of electronic technologies, in particular to a combined mask. The novel combined mask comprises: a first mask, which is used for forming a first film layer in a composite structure; a second mask, on which a plurality of lattice points in array structure arrangement are formed, with the lattice area being a transparent area; a third mask, which is used for forming a second film layer in the composite structure; and a fourth mask, which is used for forming a third film layer in the composite structure; and the first mask, the second mask, and the third mask are superimposed to form a through-hole connecting the first film layer and the second film layer; or the second mask, the third mask and the fourth mask are superimposed to form a through-hole connecting the second film layer and the third film layer. According to the invention, by setting the lattice points in array structure arrangement on a mask and through combination with predetermined masks, a predetermined through-hole pattern can form, thus reducing the amount of needed masks and lowering the manufacturing cost of integrated circuits.

Description

A kind of novel combination mask plate
Technical field
The present invention relates to electronic technology field, be specifically related to a kind of combination mask plate.
Background technology
Integrated circuit diagram (Layout) is the interface between IC design and technique manufacture, integrated circuit diagram combines corresponding to the geometric figure of wafer on-chip circuit component structure, formed by the graphics combine of different layers, such as active layer, polysilicon layer, metal level etc., in prior art, the domain of each level needs one independent mask plate (MASK) of preparation, utilize mask plate and integrated circuit technology equipment can transfer on the silicon chip scribbling photoresist by the domain of design, a kind of integrated circuit diagram of prior art is as shown in Figure 1, multiple mask plate is needed to constitute, if the mask plate A of Fig. 1 a to Fig. 1 e is to shown in mask plate E, too much mask plate adds the manufacturing cost of integrated circuit.
Summary of the invention
It is an object of the invention to, it is provided that a kind of novel combination mask plate, solve above technical problem;
Technical problem solved by the invention can realize by the following technical solutions:
A kind of novel combination mask plate, wherein, including,
First mask plate, described first mask plate is formed the first light mask pattern, and described first photomask pattern for forming the first film layer in a composite construction;
Second mask plate, described second mask plate is formed multiple lattice point arranged in array structure, and described lattice point region is transparent region;
3rd mask plate, described 3rd mask plate is formed the 3rd light mask pattern, and described 3rd photomask pattern for forming the second thin layer in described composite construction;
4th mask plate, described 4th mask plate is formed the 4th light mask pattern, and described 4th photomask pattern for forming the 3rd thin layer in described composite construction;
Overlapping region after described first mask plate, described second mask plate, described 3rd mask plate superposition forms the 5th photomask pattern, and described 5th light mask pattern for forming the through hole connecting described the first film layer with described second thin layer in described composite construction;
Or,
Overlapping region after described second mask plate, described 3rd mask plate, described 4th mask plate superposition forms the 6th photomask pattern, and described 6th light mask pattern for forming the through hole connecting described second thin layer with described 3rd thin layer in described composite construction.
The novel combination mask plate of the present invention, including the area equation of overlapping region described at least two, the area of each described overlapping region and described lattice point.
The novel combination mask plate of the present invention, described first mask plate is provided with A1 transmission region, A2 transmission region;Described 3rd mask plate is provided with C1 transmission region, C2 transmission region;After described first mask plate, described second mask plate, described 3rd mask plate superposition, described A1 transmission region superposes with the described lattice point of described C1 transmission region and the first precalculated position and forms the first via hole image region, and/or described A2 transmission region superposes with the described lattice point of described C2 transmission region and the second precalculated position and forms the first via hole image region.
The novel combination mask plate of the present invention, described 4th mask plate is provided with D1 transmission region;After described second mask plate, described 3rd mask plate, described 4th mask plate superposition, lattice point superposition described in described C2 transmission region, described D1 transmission region and the 3rd precalculated position forms the second via hole image region.
The novel combination mask plate of the present invention, described the first film layer is the first metal layer.
The novel combination mask plate of the present invention, described second thin layer is the second metal level.
The novel combination mask plate of the present invention, described 3rd thin layer is the 3rd metal level.
The novel combination mask plate of the present invention, described first mask plate and/or described second mask plate and/or described 3rd mask plate and/or described 4th mask plate adopt binary mask version.
The novel combination mask plate of the present invention, described first mask plate and/or described second mask plate and/or described 3rd mask plate and/or described 4th mask plate adopt phase shifting mask version.
Beneficial effect: owing to adopting above technical scheme, the present invention is by arranging the lattice point of array structure arrangement on a mask plate, by combining with predetermined mask plate, to form predetermined via hole image, the quantity of the mask plate of needs can be reduced, reduce the manufacturing cost of integrated circuit.
Accompanying drawing explanation
Fig. 1 is the domain of prior art;
Fig. 1 a to Fig. 1 e is mask plate corresponding for Fig. 1;
Fig. 2 is the domain of the present invention;
Fig. 3 is the schematic diagram that the multiple mask plate of the present invention forms via hole image;
Fig. 3 a to Fig. 3 d is mask plate corresponding for Fig. 3;
Fig. 4 is the schematic diagram after Fig. 3 a, Fig. 3 b and Fig. 3 d superposition for processing technique.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the premise not making creative work, broadly fall into the scope of protection of the invention.
It should be noted that when not conflicting, the embodiment in the present invention and the feature in embodiment can be mutually combined.
Below in conjunction with the drawings and specific embodiments, the invention will be further described, but not as limiting to the invention.
Reference Fig. 2, Fig. 3 and Fig. 3 a to Fig. 3 d, a kind of novel combination mask plate, wherein, including,
First mask plate 1, the first mask plate 1 is formed with the first light mask pattern, and the first photomask pattern for forming the first film layer in a composite construction;
Second mask plate 2, it is transparent region that the second mask plate 2 is formed multiple lattice point B1, lattice point B1 region arranged in array structure;
3rd mask plate 3, the 3rd mask plate 3 is formed with the 3rd light mask pattern, and the 3rd photomask pattern for forming the second thin layer in composite construction;
4th mask plate 4, the 4th mask plate 4 is formed with the 4th light mask pattern, and the 4th photomask pattern for forming the 3rd thin layer in composite construction;
Overlapping region after first mask plate the 1, second mask plate the 2, the 3rd mask plate 3 superposition forms the 5th photomask pattern, and the 5th light mask pattern for forming the through hole connecting the first film layer and the second thin layer in composite construction;
Or,
Overlapping region after second mask plate the 2, the 3rd mask plate the 3, the 4th mask plate 4 superposition forms the 6th photomask pattern, and the 6th light mask pattern for forming the through hole connecting the second thin layer and the 3rd thin layer in composite construction.
The present invention is by arranging the lattice point of array structure arrangement on a mask plate, by combining with predetermined mask plate, to form predetermined via hole image, it is possible to reduce the quantity of the mask plate of needs, reduce the manufacturing cost of integrated circuit.
The novel combination mask plate of the present invention, including the area equation of at least two overlapping region, the area of each overlapping region and lattice point B1.
The novel combination mask plate of the present invention, the first mask plate 1 can be provided with A1 transmission region, A2 transmission region;3rd mask plate 3 is provided with C1 transmission region, C2 transmission region;After first mask plate the 1, second mask plate the 2, the 3rd mask plate 3 superposition, A1 transmission region superposes with the lattice point B1 in C1 transmission region and the first precalculated position and forms the first via hole image region, and/or A2 transmission region superposes with the lattice point B1 in C2 transmission region and the second precalculated position and forms the first via hole image region.
The novel combination mask plate of the present invention, the 4th mask plate 4 can also be provided with D1 transmission region;After second mask plate the 2, the 3rd mask plate the 3, the 4th mask plate 4 superposition, C2 transmission region, D1 transmission region and the 3rd precalculated position lattice point B1 superposition form the second via hole image region.
The novel combination mask plate of the present invention, the first film layer is the first metal layer.
The novel combination mask plate of the present invention, the second thin layer is the second metal level.
The novel combination mask plate of the present invention, the 3rd thin layer is the 3rd metal level.
The novel combination mask plate of the present invention, the first mask plate 1 and/or the second mask plate 2 and/or the 3rd mask plate 3 and/or the 4th mask plate 4 adopt binary mask version.
The novel combination mask plate of the present invention, the first mask plate 1 and/or the second mask plate 2 and/or the 3rd mask plate 3 and/or the 4th mask plate 4 adopt phase shifting mask version.
With reference to Fig. 3, for the schematic diagram of processing technique after Fig. 3 a, Fig. 3 b and Fig. 3 C superposition, top first mask plate 1 of silicon chip 5 is used for preparing the first metal layer (METAL1), 3rd mask plate 2 is used for preparing the second metal level (METAL2), and first mask plate the 1, second mask plate 2 and the 3rd mask plate 3 are superimposed for preparing the through hole connecting the first metal layer and the second metal level.The present invention can reduce by an independent light shield corresponding to domain level, can reduce the manufacturing cost of integrated circuit to a certain extent.
The foregoing is only preferred embodiment of the present invention; not thereby restriction embodiments of the present invention and protection domain; to those skilled in the art; the equivalent replacement done by all utilizations description of the present invention and diagramatic content and the obtained scheme of apparent change should be can appreciate that, all should be included in protection scope of the present invention.

Claims (9)

1. combination mask plate one kind novel, it is characterised in that include,
First mask plate, described first mask plate is formed the first light mask pattern, and described first photomask pattern for forming the first film layer in a composite construction;
Second mask plate, described second mask plate is formed multiple lattice point arranged in array structure, and described lattice point region is transparent region;
3rd mask plate, described 3rd mask plate is formed the 3rd light mask pattern, and described 3rd photomask pattern for forming the second thin layer in described composite construction;
4th mask plate, described 4th mask plate is formed the 4th light mask pattern, and described 4th photomask pattern for forming the 3rd thin layer in described composite construction;
Overlapping region after described first mask plate, described second mask plate, described 3rd mask plate superposition forms the 5th photomask pattern, and described 5th light mask pattern for forming the through hole connecting described the first film layer with described second thin layer in described composite construction;
Or,
Overlapping region after described second mask plate, described 3rd mask plate, described 4th mask plate superposition forms the 6th photomask pattern, and described 6th light mask pattern for forming the through hole connecting described second thin layer with described 3rd thin layer in described composite construction.
2. the area equation of a kind of novel combination mask plate according to claim 1, it is characterised in that include overlapping region described at least two, the area of each described overlapping region and described lattice point.
3. a kind of novel combination mask plate according to claim 1, it is characterised in that described first mask plate is provided with A1 transmission region, A2 transmission region;Described 3rd mask plate is provided with C1 transmission region, C2 transmission region;After described first mask plate, described second mask plate, described 3rd mask plate superposition, described A1 transmission region superposes with the described lattice point of described C1 transmission region and the first precalculated position and forms the first via hole image region, and/or described A2 transmission region superposes with the described lattice point of described C2 transmission region and the second precalculated position and forms the first via hole image region.
4. a kind of novel combination mask plate according to claim 3, it is characterised in that described 4th mask plate is provided with D1 transmission region;After described second mask plate, described 3rd mask plate, described 4th mask plate superposition, lattice point superposition described in described C2 transmission region, described D1 transmission region and the 3rd precalculated position forms the second via hole image region.
5. a kind of novel combination mask plate according to claim 1, it is characterised in that described the first film layer is the first metal layer.
6. a kind of novel combination mask plate according to claim 1, it is characterised in that, described second thin layer is the second metal level.
7. a kind of novel combination mask plate according to claim 1, it is characterised in that described 3rd thin layer is the 3rd metal level.
8. a kind of novel combination mask plate according to claim 1, it is characterised in that described first mask plate and/or described second mask plate and/or described 3rd mask plate and/or described 4th mask plate adopt binary mask version.
9. a kind of novel combination mask plate according to claim 1, it is characterised in that described first mask plate and/or described second mask plate and/or described 3rd mask plate and/or described 4th mask plate adopt phase shifting mask version.
CN201410844113.XA 2014-12-30 2014-12-30 Novel combined mask Pending CN105807558A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410844113.XA CN105807558A (en) 2014-12-30 2014-12-30 Novel combined mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410844113.XA CN105807558A (en) 2014-12-30 2014-12-30 Novel combined mask

Publications (1)

Publication Number Publication Date
CN105807558A true CN105807558A (en) 2016-07-27

Family

ID=56419973

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410844113.XA Pending CN105807558A (en) 2014-12-30 2014-12-30 Novel combined mask

Country Status (1)

Country Link
CN (1) CN105807558A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107290879A (en) * 2017-08-11 2017-10-24 深圳市华星光电技术有限公司 Light shield for liquid crystal display panel

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101424837A (en) * 2007-11-02 2009-05-06 上海广电Nec液晶显示器有限公司 Method for manufacturing LCD array substrate
CN102608860A (en) * 2012-03-26 2012-07-25 深圳市华星光电技术有限公司 Photoetching method, photomask combination and exposure system
CN103293847A (en) * 2013-05-29 2013-09-11 北京京东方光电科技有限公司 Mask plate and preparation method of mask plate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101424837A (en) * 2007-11-02 2009-05-06 上海广电Nec液晶显示器有限公司 Method for manufacturing LCD array substrate
CN102608860A (en) * 2012-03-26 2012-07-25 深圳市华星光电技术有限公司 Photoetching method, photomask combination and exposure system
CN103293847A (en) * 2013-05-29 2013-09-11 北京京东方光电科技有限公司 Mask plate and preparation method of mask plate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107290879A (en) * 2017-08-11 2017-10-24 深圳市华星光电技术有限公司 Light shield for liquid crystal display panel

Similar Documents

Publication Publication Date Title
CN103390579B (en) There is the wires design of through hole line construction
US9292647B2 (en) Method and apparatus for modified cell architecture and the resulting device
TWI609608B (en) Multi-pair differential lines printed circuit board common mode filter
JP2010021469A (en) Semiconductor integrated circuit
KR101711262B1 (en) Layout of an integrated circuit
US9147611B1 (en) Using a single mask for various design configurations
KR102276030B1 (en) An integrated circuit with interface circuitry, and an interface cell for such interface cicuitry
TW201913865A (en) Alignment mark and its measurement method
US8063468B2 (en) Semiconductor device, method for manufacturing semiconductor device, and method for designing manufacturing semiconductor device
JP2013120852A (en) Standard cell and semiconductor integrated circuit
US10325864B2 (en) Guard ring method for semiconductor devices
CN105807559A (en) Combined mask
CN105807558A (en) Novel combined mask
US10886220B2 (en) Semiconductor integrated circuit device
CN105807553A (en) Combined mask able to reduce manufacturing cost
US20130200535A1 (en) Overlay mark for multiple pre-layers and currently layer
WO2010100849A1 (en) Semiconductor integrated circuit device
JP2014229749A (en) Method of manufacturing semiconductor device
CN105810564A (en) Combined mask for preparing MOS tube
JP5655086B2 (en) Semiconductor device
US20150363031A1 (en) Single electrode layer of touch panel
JP2006237123A (en) Semiconductor integrated circuit
US8661372B1 (en) Optical proximity correction method
US8969870B2 (en) Pattern for ultra-high voltage semiconductor device manufacturing and process monitoring
KR20120051919A (en) Semiconductor apparatus including mos transistor

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20160727