CN105791252A - UDP (User Datagram Protocol) IP (Intellectual Property) core based on FPGA (Field Programmable Gate Array) - Google Patents
UDP (User Datagram Protocol) IP (Intellectual Property) core based on FPGA (Field Programmable Gate Array) Download PDFInfo
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Abstract
The invention discloses a UDP (User Datagram Protocol) IP (Intellectual Property) core based on an FPGA (Field Programmable Gate Array), and belongs to the technical field of networks. The IP core comprises a transport layer UDP controller module used for packing and unpacking partial data of the transport layer according to the UDP; a network layer IP controller module used for packing and unpacking network layer data according to a network layer IP protocol; and a data link layer MAC (Media Access Control) controller module used for packing and unpacking data link layer data according to an MAC protocol. The UDP IP core based on the FPGA provided by the invention realizes one IP core which can independently perform UDP data receiving and transmitting through a network interface without depending on a host operating system, which effectively solves the occupation and waste of network data on host processor and memory resources in a receiving and transmitting process, and improves the working efficiency of the processor.
Description
Technical field
The present invention relates to based on FPGA (FieldProgrammableGateArray, field programmable gate array) IP (IntellectualProperty, intellectual property) nuclear technology, belong to networking technology area, it is specifically related to a kind of udp protocol based on FPGA (UserDatagramProtocol, UDP) IP kernel.
Background technology
The real-time Transmission demand of big data quantity makes ethernet technology flourish, especially embedded ethernet technology, receives significant attention owing to its traffic rate is high and software and hardware resources is abundant.Therefore having emerged numerous embedded ethernet solution, wherein, applied more a kind of solution being to transplant in microcontroller software ICP/IP protocol, namely software realizes ICP/IP protocol.This scheme is limited by the ROM Space size of microcontroller, its enforcement relies on substantially operating system, such as Windows or Linux etc., data occupy a large amount of cpu resource in transmitting procedure, the multi-medium data bag on transceiver network not only wanted by processor, also data are transferred to client and carry out respective handling, so not only sacrifice the work efficiency of processor, and take in the process of transceiving data and waste memory resource.Another kind is and ASIC (ApplicationSpecificIntegratedCircuit, special IC) solution, and namely hardware realizes ICP/IP protocol, and it is limited by cost factor, and built-in protocol stack can not be changed.Both schemes are all unfavorable for the popularization that embedded ethernet high-speed transfer is applied.
Udp protocol is a subset of ICP/IP protocol stack, belongs to the agreement of transport layer, and it has the speed advantage that the TCP being all transport layer protocol is too far behind to catch up.Although Transmission Control Protocol implants various safety guarantee function, but substantial amounts of overhead can be taken in the process that reality performs, make speed be subject to serious impact undoubtedly.And udp protocol is owing to eliminating information reliable delivery mechanism, the function transfer such as safety and sequence is completed to upper layer application, greatly reduces the execution time, make speed be guaranteed.When emphasizing the integrity of the transmission performance of data rather than transmission, as: audio frequency and multimedia application, adopting udp protocol will be best selection.
In the face of the requirement that people are increasingly higher to data transmission bauds, it is badly in need of a kind of IP kernel based on FPGA towards udp protocol, it can independently carry out network data transmitting-receiving, in transceiving data process, the defect of a large amount of processor and memory resource is taken to solve to commonly use embedded device at present, promote the work efficiency of processor, and reduce application cost.
Summary of the invention
For the defect of existing embedded ethernet solution, it is an object of the invention to provide a kind of udp protocol IP kernel based on FPGA, it is possible to when being independent of host operating system, can independently carry out network data transmitting-receiving by network interface.
For achieving the above object, the invention provides a kind of udp protocol IP kernel based on FPGA, specifically include:
Transport layer UDP controller module, for being transmitted the package of layer segment data according to udp protocol and unpack；
Internet IP controller module, for carrying out the package of network layer data according to network layer IP protocol (InternetProtocol, procotol) and unpack；With
Data link layer mac controller module, for carrying out the package of data in link layer according to MAC (MediumAccessControl, medium access control) agreement and unpack.
Further, described IP kernel meets:
Possess Ethernet interface and physical chip；
Possesses the physical chip of onboard XilinxVirtex series；
Possesses self-defining input/output interface.
Preferably, described UDP controller module also includes correction verification module, for the data received are verified, correctly then sends data to network layer IP protocol controller module, otherwise abandons these data.
Preferably, described network layer IP protocol controller module also includes correction verification module, verifies for the data that the UDP controller module received is sent, correctly then sends data to link layer mac controller module, otherwise abandon these data.
On the other hand, the invention allows for a kind of structure method based on the udp protocol IP kernel of FPGA, including:
Receive from the data of application layer, and add UDP stem according to the udp protocol data to receiving and be transmitted the encapsulation of layer, and send the data after encapsulation；
Receive from the data of transport layer, the data received are packaged according to network layer IP protocol and add IP stem, and sends the IP packet after encapsulation；
Receive the IP packet from Internet, form ethernet frame format data after the IP packet received being added MAC layer stem and postamble and carrying out CRC check and be sent in Ethernet.
Present configuration is simple, is conducive to realization integrated, easy and the impact being susceptible to the hardware update replacement with low cost, is the FPGA technology innovative application in field of network data transmission.The present invention is compared with prior art, reduce the dependence to operating system, it is not only completed the data transmission of bottom MAC part, upwards network layer IP protocol and transport layer udp protocol are added in FPGA so that it is the data obtained from application layer automatically can be transmitted the encapsulation of the corresponding agreement of layer, Internet and data link layer inside FPGA.
After reading in conjunction with the accompanying the detailed description of embodiment of the present invention, the other features and advantages of the invention will become clearer from.
Accompanying drawing explanation
Fig. 1 is OSI Reference Model and ICP/IP protocol stack corresponding relation；
Fig. 2 is the udp protocol IP kernel system architecture diagram based on FPGA；
Fig. 3 is network data encapsulation process schematic diagram.
Detailed description of the invention
Below in conjunction with Figure of description and embodiment, the specific embodiment of the present invention is described in further detail.Following example are merely to illustrate the present invention, but are not limited to the scope of the present invention.
As shown in Figure 1, standard open formula Systems Interconnection Reference model (OpenSystemInterconnect, OSI), it it is the standardization open computer network hierarchy Model formulated by International Organization for Standardization, computer network architectures is divided into from top to bottom seven layers, i.e. application layer, expression layer, session layer, transport layer, Internet, data link layer and physical layer.The purpose of this model is to make various hardware intercom mutually on identical level.Being only facing Connection Service yet with osi model, network management is complicated and only takes into account the public data network using a kind of standard and is interconnected at together by various different systems, and for heterogeneous network inapplicable, this model does not have popularization and opens.And the interconnection problem of multiple heterogeneous network considered at the very start by TCP/IP model, lay equal stress on without being connected towards connecting, and have good Network Management Function so that TCP/IP model is widely used.
ICP/IP protocol adopts four-layer structure, and whole protocol stack is divided according to its specific functional stratification, and each layer all calls network that its next layer provide to complete the demand of oneself.Wherein, IP agreement is the important guarantee that network data can carry out routeing, and is the core of whole IP network.Transmission Control Protocol and udp protocol all utilize IP send and receive data, although the two agreement is different but basic function is similar in the mode and the principle that realize.Therefore the two sub-protocol is all classified as transport layer protocol.
Udp protocol, is mainly used to the network application supporting to need to transmit data between the computers, and the network application including numerous Client/Server of Video Conference System is required for using udp protocol.The Main Function of udp protocol is the form that network traffic data is compressed into datagram.Each datagram generally includes header information and data two parts.UDP header is generally made up of 4 territories, it may be assumed that source port number, destination port number, datagram length and check value etc..
Udp protocol adopts the application that port numbers is different to retain respective data transmission channel, realizes application multinomial in synchronization being sent simultaneously and receiving the support of data.UDP datagram is sent by data transmission side (such as, client server) by source port, and data receiver one side then receives data by target port.Some network applications can only use reserved for it in advance or registration static port；Other network application then can use the dynamic port not being registered.
Different from TCP, udp protocol, as insecure host-host protocol, does not provide the pledge system that data transmit.If occurring the loss of datagram in the transmittance process from sender to recipient, agreement itself can not make any detection or prompting.So can be greatly improved transfer rate by suitably sacrificing reliability, save software and hardware resources, increase operation rate.
Prior art about the solution of udp protocol, be software realize or hardware realize all there is various defect, as, take CPU excess resource, operating system degree of dependence is high and relatively costly.In order to overcome software in prior art to realize udp protocol and hardware realizes the shortcoming of udp protocol, this embodiment aims to provide a kind of soft core of the IP based on FPGA, and its hardware logic adopting hardware description language to realize and being converted in FPGA, by udp protocol IPization.The soft core of IP is the solution that one can be reused on FPGA and CPLD (ComplexProgrammableLogicDevice, CPLD), and it adopts hardware description language such as VHDL describing module function.This solution is advantageous in that: can application, protocol function, SRAM and control routine on sheet be integrated on a single-chip, and reusable, not by FPGA and the CPLD impact updated.
As in figure 2 it is shown, the udp protocol IP kernel in the present embodiment, specifically include:
Transport layer UDP controller module, is used for data are carried out the package of data in transport layer according to the mode of UDP and unpacked.
Preferably, described UDP controller module also includes correction verification module, for the data received are verified, correctly then sends data to network layer IP protocol controller module, otherwise abandons these data.
Internet IP controller module, is used for data are carried out the package of data in Internet according to the mode of Internet protocol and unpacked.
Preferably, network layer IP protocol controller module also includes correction verification module, verifies for the data that the UDP controller module received is sent, correctly then sends data to link layer mac controller module, otherwise abandon these data.
Link layer mac controller module, is used for data are carried out the package of data in data link layer according to the mode of media access control protocol and unpacked.
Described udp protocol IP kernel need to meet:
1) possess Ethernet interface and physical chip；
2) possesses the physical chip of onboard XilinxVirtex series；
3) possesses self-defining input/output interface.
Preferably, the IP kernel of described udp protocol is based on the FPGA architecture system of XilinxVirtex-IIPro series exploitation plate, and core devices is xc2vp30FPGA chip.Preferably, the ethernet physical layer chip that circuit board adopts is the WJLXT972C RJ45 interface adopting HALO company.Additionally, the development board of the Virtex series of Xilinx company can also realize this system.
As shown in Figure 3, after system electrification, when the data of application layer have transmission demand, transport layer udp protocol controller module in the present invention receives the data from application layer, data are transmitted the encapsulation of layer by transport layer udp protocol controller module after data arrive, then carry out the encapsulation of Internet in the network layer IP protocol controller module UDP message encapsulated being transferred to and add IP stem.Carried out interpolation and the CRC check of MAC stem and postamble by the ethernet mac controller module of the IP packet entrance bottom of IP protocol controller module output, final data bag is packaged according to the requirement of ethernet frame format and is sent on network.
Preferably, the data received also are verified by transport layer udp protocol controller module, correctly then send data to network layer IP protocol controller module, otherwise abandon these data.
Preferably, the data received also are verified by network layer IP protocol controller module, correctly then send data to link layer mac controller module, otherwise abandon these data.
Udp protocol uses the check value in header to ensure the safety of data.First check value is calculated by special algorithm in data receiver, after being delivered to recipient, in addition it is also necessary to recalculate again.If certain datagram is distorted by third party or owing to the reasons such as line noise are damaged in transmitting procedure, sending and will not be consistent with the verification value of calculation of recipient, thus udp protocol can detect whether to make mistakes.
When having detected that data send over from network, data first pass around physical chip entrance ethernet mac controller module and carry out the parsing of ethernet frame, after CRC check, remove Ethernet stem and postamble, remaining data is sent to network layer IP protocol controller module.IP protocol controller module receives the data sent from link layer, and IP header is processed, and according to which kind of transport layer protocol is IP header information judge to use, and transfers data to the transport layer protocol module of correspondence.Eventually pass transport layer udp protocol controller module and carry out resolving and removing the process of UDP message head, number of users is transferred to application layer.Data parsing process and encapsulation process contrast.
It should be appreciated that without departing from the spirit and scope of the present invention, it is possible to make various different modification and equivalents.This includes the amendment in scope of the following claims and all modifications, alternative structure and equivalent.Have no intent to limit the invention to detailed description of the invention shown in the drawings.The present invention should be interpreted that applicant useful, and The present invention gives its four corner.
In this manual, the existence of special characteristic is not excluded for the existence of further feature.Word " comprises ", " including " and " having " should be interpreted to comprise rather than exclusive meaning.
Claims (8)
1. the udp protocol IP kernel based on FPGA, it is characterised in that described IP kernel includes:
Transport layer UDP controller module, for being transmitted the package of layer segment data according to udp protocol and unpack；
Internet IP controller module, for carrying out the package of network layer data according to network layer IP protocol and unpack；With
Data link layer mac controller module, for carrying out the package of data in link layer according to MAC protocol and unpack.
2. the udp protocol IP kernel based on FPGA as claimed in claim 1, it is characterised in that described IP kernel meets:
Possess Ethernet interface and physical chip；
Possesses the physical chip of onboard XilinxVirtex series；
Possesses self-defining input/output interface.
3. the udp protocol IP kernel based on FPGA as claimed in claim 1 or 2, it is characterized in that, described UDP controller module also includes correction verification module, for the data received are verified, correct then send data to network layer IP protocol controller module, otherwise abandon this data.
4. the udp protocol IP kernel based on FPGA as claimed in claim 1 or 2, it is characterized in that, described network layer IP protocol controller module also includes correction verification module, data for the UDP controller module received is sent verify, correct then send data to link layer mac controller module, otherwise abandon these data.
5. the method building the udp protocol IP kernel based on FPGA, it is characterised in that including:
Receive from the data of application layer, and add UDP stem according to the udp protocol data to receiving and be transmitted the encapsulation of layer, and send the data after encapsulation；
Receive from the data of transport layer, the data received are packaged according to network layer IP protocol and add IP stem, and sends the IP packet after encapsulation；
Receive the IP packet from Internet, form ethernet frame format data after the IP packet received being added MAC layer stem and postamble and carrying out CRC check and be sent in Ethernet.
6. the method building the udp protocol IP kernel based on FPGA as claimed in claim 5, it is characterised in that described IP kernel meets:
Possess Ethernet interface and physical chip；
Possesses the physical chip of onboard XilinxVirtex series；
Possesses self-defining input/output interface.
7. the method building the udp protocol IP kernel based on FPGA as described in claim 5 or 6, it is characterized in that, receiving after the data of application layer, the data received also are verified by transport layer, correct then send data to Internet, otherwise abandon this data.
8. the method building the udp protocol IP kernel based on FPGA as described in claim 5 or 6, it is characterised in that receiving after the data of transport layer, the data received also are verified by Internet, correctly then send data to link layer, otherwise abandon these data.
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| CN108269188A (en) * | 2016-12-30 | 2018-07-10 | 上海金融期货信息技术有限公司 | A kind of exchange's quotation information processing method and system based on FPGA |
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Cited By (9)
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| CN108269188A (en) * | 2016-12-30 | 2018-07-10 | 上海金融期货信息技术有限公司 | A kind of exchange's quotation information processing method and system based on FPGA |
| CN106953853A (en) * | 2017-03-10 | 2017-07-14 | 桂林电子科技大学 | A kind of network-on-chip gigabit Ethernet resource node and its method of work |
| CN108667701A (en) * | 2018-03-13 | 2018-10-16 | 中国电子科技集团公司第十研究所 | A kind of ether network switch and data transfer device |
| CN110300081A (en) * | 2018-03-21 | 2019-10-01 | 大唐移动通信设备有限公司 | A kind of method and apparatus of data transmission |
| CN110798487A (en) * | 2019-11-15 | 2020-02-14 | 广州健飞通信有限公司 | Integration system of user datagram protocol module |
| CN111343148A (en) * | 2020-02-05 | 2020-06-26 | 苏州浪潮智能科技有限公司 | FGPA communication data processing method, system and device |
| CN112202740A (en) * | 2020-09-21 | 2021-01-08 | 上海微波技术研究所（中国电子科技集团公司第五十研究所） | FPGA-based awakenable UDP transmission protocol implementation method and system |
| CN112637075A (en) * | 2020-12-12 | 2021-04-09 | 华中光电技术研究所（中国船舶重工集团公司第七一七研究所） | UDP/IP protocol stack implementation method based on FPGA and FPGA chip |
| CN115334176A (en) * | 2022-07-27 | 2022-11-11 | 广州安凯微电子股份有限公司 | Data transmission method, data transmission device, computer equipment, storage medium and program product |
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