CN105789038B - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN105789038B CN105789038B CN201610237065.7A CN201610237065A CN105789038B CN 105789038 B CN105789038 B CN 105789038B CN 201610237065 A CN201610237065 A CN 201610237065A CN 105789038 B CN105789038 B CN 105789038B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000002955 isolation Methods 0.000 claims abstract description 121
- 239000011248 coating agent Substances 0.000 claims abstract description 115
- 238000000576 coating method Methods 0.000 claims abstract description 115
- 239000000758 substrate Substances 0.000 claims abstract description 91
- 125000004430 oxygen atom Chemical group O* 0.000 claims abstract description 64
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 101
- 229910052760 oxygen Inorganic materials 0.000 claims description 101
- 239000001301 oxygen Substances 0.000 claims description 101
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 36
- 239000000463 material Substances 0.000 claims description 28
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 18
- 230000008569 process Effects 0.000 claims description 18
- 229910000077 silane Inorganic materials 0.000 claims description 18
- 239000000377 silicon dioxide Substances 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 16
- 238000010521 absorption reaction Methods 0.000 claims description 15
- 238000005229 chemical vapour deposition Methods 0.000 claims description 15
- 238000005516 engineering process Methods 0.000 claims description 13
- 230000003647 oxidation Effects 0.000 claims description 13
- 238000007254 oxidation reaction Methods 0.000 claims description 13
- 239000012495 reaction gas Substances 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 239000011435 rock Substances 0.000 claims description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 125000004429 atom Chemical group 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 15
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 239000000376 reactant Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910003978 SiClx Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Chemical compound [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910001928 zirconium oxide Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 150000001335 aliphatic alkanes Chemical class 0.000 description 1
- XBYNNYGGLWJASC-UHFFFAOYSA-N barium titanium Chemical compound [Ti].[Ba] XBYNNYGGLWJASC-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Abstract
The present invention provides a kind of semiconductor structure and forming method thereof, wherein the forming method includes: offer substrate；Isolation structure is formed in the substrate；Coating is formed on the isolation structure surface of the neighbouring substrate, the coating is less than the isolation structure to the absorbability of oxygen atom to the absorbability of oxygen atom；Gate structure is formed in the substrate surface.It by forming the uniformity that oxide layer can increase the semiconductor structure gate oxide of formation on the isolation structure surface, and then can be improved the breakdown voltage of semiconductor structure gate oxide, improve the performance of semiconductor structure.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to a kind of semiconductor structure and forming method thereof.
Background technique
With being constantly progressive for semiconductor processing technology, semiconductor devices is towards higher component density, and higher collection
The direction of Cheng Du is developed.The raising of semiconductor integration densities has also driven the diminution of transistor size.
Semiconductor substrate, grid layer and the gate dielectric layer below grid layer are the elements of transistor.Grid
Dielectric layer plays an important role in the transistor, can be realized being electrically insulated between grid and transistor channel, makes grid and crystalline substance
Body pipe trench road forms capacitance structure, so as to realize control of the grid to channel current, reduces leakage current.
With the reduction of transistor size, gate dielectric layer is also gradually thinned.The thickness for the gate dielectric layer that the prior art is formed
Unevenly, it is easy transistor breakdown in the lesser place of gate oxide thickness.
It can be seen that there are gate oxide thickness unevenness for the semiconductor structure formed by the higher isolation structure of silicone content
It is even, the lower disadvantage of breakdown voltage.
Summary of the invention
Problems solved by the invention is to provide a kind of semiconductor structure and forming method thereof, can improve the equal of gate oxide
Even property, improves the breakdown voltage of the gate oxide of semiconductor structure.
To solve the above problems, the present invention provides a kind of forming method of semiconductor structure, comprising:
Substrate is provided；
Isolation structure is formed in the substrate；
Coating is formed on the isolation structure surface of the neighbouring substrate, the coating is small to the absorbability of oxygen atom
In the isolation structure to the absorbability of oxygen atom；
After forming the coating, gate structure is formed in the substrate surface.
Optionally, the absorbability includes: the uptake to oxygen atom and the absorption rate to oxygen atom.
Optionally, which is characterized in that the material of the coating is silica.
Optionally, the coating with a thickness of 30 angstroms~50 angstroms.
Optionally, the thickness of isolation structure surface initial overlay layer is greater than the initial overlay layer thickness of substrate surface；
The step of forming the coating includes: to form initial overlay layer in the isolation structure and substrate surface；Remove the substrate
The initial overlay layer on surface retains the initial overlay layer of the isolation structure surface portion thickness, forms coating.
Optionally, the technique for forming the coating includes thermal oxidation technology or chemical vapor deposition process；Pass through hot oxygen
Chemical industry skill formed the coating reaction gas include: oxygen or oxygen and hydrogen combination.
Optionally, in the step of forming the isolation structure, the ratio of oxygen flow and silane flow rate is the first ratio；It is logical
It crosses chemical vapor deposition process and forms the coating；The technological parameter of the coating is formed by chemical vapor deposition process
It include: reaction gas include: oxygen and silane；Oxygen flow and the ratio of silane flow rate are greater than first ratio.
Optionally, in the step of forming the coating by chemical vapor deposition process, oxygen flow and silane flow rate
Ratio be greater than 1.6.
Correspondingly, the present invention also provides a kind of semiconductor structures, comprising:
Substrate；
Isolation structure in the substrate；
Coating positioned at the isolation structure surface of the neighbouring substrate, the coating are small to the absorbability of oxygen atom
In isolation structure to the absorbability of oxygen atom；
Gate structure on the substrate, the gate structure include:
Positioned at the gate oxide of the substrate surface；
Grid layer on the gate oxide.
Optionally, the material of the coating is silica.
Compared with prior art, technical solution of the present invention has the advantage that
It is described by forming coating on the isolation structure surface in the forming method of semiconductor structure of the invention
Coating can be such that the isolation structure is isolated with oxygen during being subsequently formed the gate structure, can reduce isolation junction
Absorption of the structure to oxygen atom.In addition, the coating is less than the isolation structure to oxygen atom to the absorbability of oxygen atom
Absorbability, the coating oxygen formed during gate structure in reactant is absorbed it is less, to be not easy to make neighbour
Oxygen-containing film thining in the gate structure of the nearly isolation structure, can increase the uniform of the oxygen-containing film in gate structure
Property, and then can be improved the breakdown voltage of oxygen-containing film in semiconductor structure, improve semiconductor structure performance.
In semiconductor structure of the invention, the isolation structure surface has coating, and the coating can be subsequent
The isolation structure is isolated with oxygen, suction of the isolation structure to oxygen atom can be reduced
It receives.In addition, the coating is less than the isolation structure to the absorbability of oxygen atom to the absorbability of oxygen atom, it is described to cover
Cap rock the oxygen formed during gate structure in reactant is absorbed it is less, to be not easy to make the neighbouring isolation structure
Oxygen-containing film thining in gate structure, can increase the uniformity of oxygen-containing film in gate structure, and then can be improved semiconductor
The breakdown voltage of oxygen-containing film in structure improves semiconductor structure performance.
Detailed description of the invention
Fig. 1 to Fig. 6 is the structural schematic diagram of each step of one embodiment of forming method of semiconductor structure of the invention；
Fig. 7 and Fig. 8 is the structural schematic diagram of each step of the another embodiment of forming method of semiconductor structure of the invention.
Specific embodiment
That there are gate oxide thickness is uneven for semiconductor structure, and what the breakdown potential of the gate oxide of semiconductor structure was forced down asks
Topic.
Now in conjunction with a kind of forming method of semiconductor structure, the gate oxide thickness for analyzing the semiconductor structure is uneven
It is even, the reason of breakdown potential is forced down:
In the forming method of the semiconductor structure, in order to improve the isolation performance of isolation structure, in substrate formed every
During structure, oxygen flow and the ratio of silane flow rate are in the range of 1.2~1.6 in reactant, the isolation of formation
The content of oxygen atom is lower in structure, and isolation structure is caused to have very big absorbability to oxygen.It is being subsequently formed gate oxide
During, the isolation structure is easy to absorb the oxygen in surrounding reactant, reduces the substrate table of the neighbouring isolation structure
The concentration of face reactant, thus make the thinner thickness for being formed in the gate oxide of the substrate surface of the neighbouring isolation structure, into
And it is breakdown in the relatively thin place of the gate oxide thickness to be easy to make semiconductor structure to be easy, and influences the property of semiconductor structure
Energy.Therefore, the problem of that there are gate oxide thickness is uneven for the semiconductor structure, and breakdown potential is forced down.
To solve the technical problem, the present invention provides a kind of forming methods of semiconductor structure, comprising: provides lining
Bottom；Isolation structure is formed in the substrate；Coating, the coating are formed on the isolation structure surface of the neighbouring substrate
The isolation structure is less than to the absorbability of oxygen atom to the absorbability of oxygen atom；Grid knot is formed in the substrate surface
Structure.
Wherein, by forming coating on the isolation structure surface, the coating can be subsequently formed the grid
The isolation structure is isolated with oxygen, absorption of the isolation structure to oxygen atom can be reduced.In addition, described
Coating is less than the isolation structure to the absorbability of oxygen atom to the absorbability of oxygen atom, and the coating is to formation grid
Oxygen absorption during the structure of pole in reactant is less, to be not easy in the gate structure for making the neighbouring isolation structure
Oxygen-containing film thining, can increase the uniformity of the oxygen-containing film in gate structure, and then can be improved in semiconductor structure and contain
The breakdown voltage of oxygen film improves semiconductor structure performance.
To make the above purposes, features and advantages of the invention more obvious and understandable, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.
Fig. 1 to Fig. 6 is the structural schematic diagram of each step of one embodiment of forming method of semiconductor structure of the present invention.
It should be noted that the present embodiment is uneven to solve gate oxide thickness in planar transistor, breakdown voltage compared with
The present invention is described in detail for low problem.In other embodiments, the forming method of semiconductor structure of the invention
It can be also used for solving the problems, such as that gate oxide thickness is non-uniform in fin formula field effect transistor.
Fig. 1 to Fig. 6 is please referred to, the forming method of the semiconductor structure includes:
Referring to FIG. 1, providing substrate 100.
In the present embodiment, the substrate 100 is that silicon substrate, germanium substrate, silicon-Germanium substrate or silicon-on-insulator substrate etc. are partly led
Body substrate.
Referring to FIG. 2, forming isolation structure 101 in the substrate 100.
In the present embodiment, the step of forming isolation structure 101 includes: to form groove in the substrate 100；Institute
State formation isolation structure 101 in groove 101.
In the present embodiment, the groove is formed by dry etching or wet etching.
In the present embodiment, the step of isolation structure 101 are formed in the groove includes: in the groove and the lining
100 surface of bottom forms initial isolation structure；The initial isolation structure for removing 100 surface of substrate, forms the isolation structure 101.
In the present embodiment, the material of the isolation structure 101 is the silica rich in silicon, and the silica rich in silicon refers to oxygen
The silica of the ratio between oxygen atom and silicon atom less than 2 in SiClx.
Oxygen atom content is lower in the isolation structure, stronger to the absorbability of oxygen atom, the oxygen being easy around absorbing
Gas and be passivated.
In the present embodiment, the technique for forming the initial isolation structure is chemical vapor deposition process.
In the present embodiment, the step of initial isolation structure is formed by the chemical vapor deposition process include: to
The substrate 100 is passed through reaction gas, so that the reaction gas is reacted heavy with 100 top surface of substrate in the groove
The initial isolation structure of product.
In the present embodiment, it includes: oxygen and silicon that the technological parameter for forming the initial isolation structure, which includes: reaction gas,
Alkane；Oxygen flow and the ratio of silane flow rate are the first ratio.Specifically, in the present embodiment, first ratio is 1.2~
1.6。
It should also be noted that, in order to keep the technique to form the technique of the semiconductor structure with form other devices mutually simultaneous
Hold, the isolation structure 101 of the neighbouring substrate 100 is easy to be etched to form pit, and the pit is easy to expose 100 court of substrate
To the turning of the pit.The turning is adjacent to the isolation structure 101, therefore, oxygen around the turning be easy by every
It is absorbed from structure 101, the thinner thickness for the gate oxide for forming the corner surface, the present embodiment is to solve the substrate
Method for forming semiconductor structure of the invention is illustrated for the relatively thin problem of 100 corner surface gate oxides.
Fig. 3 and Fig. 4 are please referred to, forms coating 110 on 101 surface of isolation structure of the neighbouring substrate 100, it is described to cover
Cap rock 110 is less than the isolation structure 101 to the absorbability of oxygen atom to the absorbability of oxygen atom.
The isolation structure 101 is isolated during being subsequently formed gate oxide with oxygen in the coating 110, energy
Enough reduce absorption of the isolation structure to oxygen.Again since absorbability of the coating 110 to oxygen atom is less than the isolation
Structure 101 is to the absorbability of oxygen atom, and the coating 110 is to the oxygen being subsequently formed during gate oxide in reactant
Aspiration is less, to be not easy to keep the gate oxide of the neighbouring isolation structure thinning, can increase the uniform of gate oxide
Property, and then the breakdown voltage of semiconductor structure gate oxide is improved, improve semiconductor structure performance.
In the present embodiment, the oxygen uptake ability is measured using the amount for absorbing oxygen and the speed for absorbing oxygen.Specifically, the suction
Oxygen ability includes being measured using the amount for absorbing oxygen and the rate for absorbing oxygen.In the present embodiment, the material of the coating 110
For silica, the content of oxygen atom is greater than the content of oxygen atom in isolation structure 101 in the coating 110.With higher oxygen
The coating 110 of atom content is low to the absorbability of oxygen, can reduce the suction to the 100 corner surface oxygen of substrate
It receives, to keep the thickness for the gate oxide being subsequently formed more uniform.
In the present embodiment, the ratio between oxygen atom and silicon atom are close or equal to 2 in the coating 110.Specifically, described cover
The ratio between oxygen atom and silicon atom are 2 in cap rock 110.
In the present embodiment, the step of forming coating 110 includes: on 100 surface of the isolation structure 101 and substrate
Form initial overlay layer 111；The initial overlay layer 111 for removing 100 surface of substrate retains 101 surface of isolation structure
Segment thickness initial overlay layer 111, formed coating 110.
It elaborates below in conjunction with attached drawing to the step of forming coating 110.
Referring to FIG. 3, Fig. 3 is the structural schematic diagram on the basis of 1 inner part of Fig. 2 dotted line frame.In 101 He of isolation structure
100 surface of substrate forms initial overlay layer 111.
It should be noted that in the present embodiment, since the material of the isolation structure 101 is the silica rich in silicon.It is rich
Oxygen atom content is lower in siliceous silica, larger to the absorption of oxygen.In the mistake for forming the initial overlay layer 111
Cheng Zhong, the isolation structure 101 are easy to absorb a large amount of oxygen and be passivated, and form the higher silica of oxygen atom content, thus
Form thicker coating.Therefore, the thickness of the initial overlay layer 111 on 101 surface of isolation structure is greater than 100 surface of substrate
Initial overlay layer 111 thickness.
If the thickness of the initial overlay layer 111 is excessive, it is easy to the process of initial overlay layer 111 described in subsequent etching
Bring difficulty；If the thickness of the initial overlay layer 111 is too small, it is easy to cause the thickness of coating 110 too small, to be difficult
Reduce absorption of the isolation structure 101 to oxygen.
Specifically, in the present embodiment, the initial overlay layer 111 on 100 surface of substrate with a thickness of 70 angstroms~90 angstroms；Institute
State the initial overlay layer 111 on 101 surface of isolation structure with a thickness of 100 angstroms~150 angstroms.
In the present embodiment, the coating 110 is formed by the first thermal oxidation technology, thermal oxidation technology can be controlled preferably
Make the thickness of the coating 110.The coating can also be formed by chemical vapor deposition process in another embodiment.
In the present embodiment, the technological parameter that the coating 110 is formed by the first thermal oxidation technology includes: reaction gas
It include: the combination of oxygen or oxygen and hydrogen.
In other embodiments, the coating can also be formed by chemical vapor deposition process.Pass through chemical gaseous phase
It include: reaction gas includes: oxygen and silane that depositing operation, which forms the technological parameter of the initial overlay layer,；The flow of oxygen and
The ratio of silane flow rate is greater than first ratio.
During forming the initial overlay layer by chemical vapor deposition process, the flow of oxygen and silane flow rate
Ratio is greater than first ratio, is capable of forming the higher coating of oxygen atom content, enables absorption of the coating to oxygen atom
Power is lower, to improve the uniformity for the gate oxide being subsequently formed.In the present embodiment, the flow of oxygen and the ratio of silane flow rate
Value is greater than 1.6.Specifically, the flow of oxygen and the ratio of silane flow rate are in the range of 1.6~2.0.
Referring to FIG. 4, removing the initial overlay layer 111 (as shown in Figure 3) on 100 surface of substrate, retain the isolation
The initial overlay layer 111 of 101 surface portion thickness of structure forms coating 110.
In the present embodiment, since the thickness of the initial overlay layer 111 on 101 surface of isolation structure is greater than 100 table of substrate
The thickness of the initial overlay layer 111 in face.Therefore, the initial overlay layer 111 can be performed etching to sudden and violent by wet etching
Expose 100 surface of substrate, the initial overlay layer 111 for being retained in the segment thickness on 101 surface of isolation structure forms coating
110.In other embodiments, the initial overlay layer of the substrate surface can also be removed by dry etching.
If the thickness of the coating 110 is too small, it is difficult to reduce isolation structure 110 to the substrate corner surface oxygen
Absorption；If the thickness of the coating 110 is excessive, the suppression that isolation structure 110 absorbs the corner surface oxygen
Furthermore production is easy to produce waste of material with that will not increase with the increase of thickness.In the present embodiment, the coating 110
Thickness is in the range of 30 angstroms~50 angstroms.
It is subsequent after forming the coating, form gate structure on 100 surface of substrate.
In the present embodiment, the step of forming the gate structure includes: to form gate oxide on 100 surface of substrate；
Grid layer is formed on the gate oxide；The graphical gate oxide and grid layer, form gate structure.
It elaborates below in conjunction with Fig. 5 and Fig. 6 to the step of forming the gate structure.
Referring to FIG. 5, forming gate oxide 120 on 100 surface of substrate.
The gate oxide 120 is used to form the gate dielectric layer of the semiconductor structure, realizes between grid and substrate 100
Electrical isolation.
It should be noted that forming the gate oxide since 101 surface of isolation structure has coating 110
During 120, the coating 110 can reduce contact of the isolation structure 101 with oxygen, to reduce isolation structure 101
Absorption to the corner surface oxygen.In addition, the coating 110 is right less than isolation structure 101 to the absorbability of oxygen
Therefore the absorbability of oxygen can reduce the gate oxide 120 for being formed in 100 corner surface of substrate because anoxic causes
Thickness reduction, improve 100 surface of substrate formed 120 thickness of gate oxide uniformity.
In the present embodiment, the material of the gate oxide 120 is identical as the material of the coating 110.Gate oxide 120
There is identical material with the coating 110, can be performed etching in subsequent same etching technics, so as to simplify work
Skill process.Specifically, the material of the gate oxide 120 is silica.In other embodiments, the material of the gate oxide
It can also be hafnium oxide, zirconium oxide, hafnium silicon oxide, lanthana, zirconium silicon oxide, titanium oxide, tantalum oxide, strontium barium oxide titanium, oxidation
Barium titanium, strontium oxide strontia titanium or aluminium oxide.
In the present embodiment, the gate oxide 120 is formed by the second thermal oxidation technology.
In the present embodiment, by the reaction gas that the second thermal oxidation technology forms the gate oxide 120 include: oxygen or
The combination of oxygen and hydrogen.
It should be noted that forming the engineering of the gate oxide 120 by the second thermal oxidation technology in the present embodiment
In, since 101 surface of isolation structure is formed with coating 110.Oxygen atom content is higher in the coating 110, in institute
It states in the second thermal oxidation technology, is difficult to reabsorb the oxygen in reactant.Therefore, described to cover in second thermal oxidation technology
110 surface of cap rock does not form gate oxide.
Referring to FIG. 6, forming grid layer 130 on the gate oxide 120.
In the present embodiment, in the step of forming grid layer 130 on the gate oxide 120 further include: in the coating
Grid layer 130 is formed on 110.
The grid layer is used to form the grid of semiconductor structure.
In the present embodiment, the material of the grid layer is polysilicon.In other embodiments, the material of the grid layer is also
It can be metal.
In the present embodiment, the technique for forming the grid layer includes: chemical vapor deposition process.
It should be noted that not having gate oxide on the coating 110.During forming grid layer 130, institute
It states and also forms grid layer 130 on coating 110.
The graphical gate oxide 120 and grid layer 130, form gate structure.
Specifically, the forming step of the gate structure includes: the graphical gate oxide 120 and grid layer 130, directly
To 100 surface of substrate is exposed, forms the grid oxygen for being located at 100 surface of substrate and be located at the grid oxygen and the covering
Grid on layer 110.
Fig. 7 and Fig. 8 is the structural schematic diagram of each step of the another embodiment of forming method of semiconductor structure of the invention.
The present embodiment and the something in common of a upper embodiment do not repeat herein, and difference includes:
Referring to FIG. 7, forming gate oxide 220 on 200 surface of substrate.
In the present embodiment, the gate oxide 220 is formed by chemical vapor deposition process.Therefore, the grid are being formed
During oxide layer 220,210 surface of coating also will form gate oxide 220.
It include: reaction by the technological parameter that chemical vapor deposition process forms the gate oxide 220 in the present embodiment
Gas includes: oxygen and silane；Ratio between oxygen flow and silane flow rate is greater than 1.6.Specifically, in the present embodiment, oxygen
Ratio between throughput and silane flow rate is in the range of 1.6~2.0.
Referring to FIG. 8, forming grid layer 230 on the gate oxide 220.
In the present embodiment, the grid layer 230 is located at 220 surface of gate oxide.
With continued reference to Fig. 8, the graphical gate oxide 220 and grid layer 230 form gate structure.
In the present embodiment, the gate structure includes: the gate oxide positioned at 210 surface of the substrate 200 and coating
220；Grid layer 230 on the gate oxide 220.
To sum up, in the forming method of semiconductor structure of the invention, by forming coating on the isolation structure surface,
The coating can be such that the isolation structure is isolated with oxygen during being subsequently formed the gate structure, can reduce every
Absorption from structure to oxygen atom.In addition, the coating is less than the isolation structure to oxygen original to the absorbability of oxygen atom
The absorbability of son, the coating oxygen formed during gate structure in reactant is absorbed it is less, to be not easy
Make the oxygen-containing film thining in the gate structure of the neighbouring isolation structure, the equal of the oxygen-containing film in gate structure can be increased
Even property, and then can be improved the breakdown voltage of oxygen-containing film in semiconductor structure, improve semiconductor structure performance.
With continued reference to Fig. 6, the present invention also provides a kind of semiconductor structures, comprising:
Substrate 100；Isolation structure 101 in the substrate 100；Positioned at the isolation structure of the neighbouring substrate 100
The coating 110 on 101 surfaces, the coating 110 are less than suction of the isolation structure 101 to oxygen atom to the absorbability of oxygen atom
Receipts ability；Gate structure on the substrate 100, the gate structure include: the grid oxygen positioned at 100 surface of substrate
Change layer 120；Grid layer 130 on the gate oxide 120.
The semiconductor structure is described in detail below in conjunction with attached drawing.
Referring to FIG. 6, substrate 100.
In the present embodiment, the substrate 100 is that silicon substrate, germanium substrate, silicon-Germanium substrate or silicon-on-insulator substrate etc. are partly led
Body substrate.
Isolation structure 101 with continued reference to Fig. 6, in the substrate 100.
In the present embodiment, the material of the isolation structure 101 is the silica rich in silicon, and the silica rich in silicon refers to oxygen
The silica of the ratio between oxygen atom and silicon atom less than 2 in SiClx.
In the present embodiment, oxygen atom content is lower in the isolation structure, stronger to the absorbability of oxygen atom, is easy to inhale
It receives the oxygen of surrounding and is passivated.
With continued reference to Fig. 6, coating 110 positioned at 101 surface of isolation structure, the coating 110 is to oxygen atom
Absorbability be less than isolation structure 101 to the absorbability of oxygen atom.
The coating can be such that the isolation structure is isolated with oxygen during being subsequently formed the gate oxide,
Absorption of the isolation structure to oxygen can be reduced.In addition, the coating is less than the isolation junction to the absorbability of oxygen atom
Structure to the absorbability of oxygen atom, the coating oxygen formed during gate oxide in reactant is absorbed it is less, from
And be not easy to keep the gate oxide of the neighbouring isolation structure thinning, the uniformity of gate oxide can be increased, and then reduce half
The leakage current of conductor structure improves semiconductor structure performance.
In the present embodiment, the oxygen uptake ability includes: the amount for absorbing oxygen and the speed for absorbing oxygen.Specifically, the oxygen uptake
Ability includes: the amount for absorbing oxygen and the rate for absorbing oxygen.
In the present embodiment, the material of the coating 110 is silica, and the content of oxygen atom is big in the coating 110
The content of oxygen atom in isolation structure 101.Coating 110 with higher oxygen atom content is low to the absorbability of oxygen,
The absorption to the 100 corner surface oxygen of substrate can be reduced, to keep the thickness for the gate oxide being subsequently formed more uniform.
In the present embodiment, the ratio between oxygen atom and silicon atom are close or equal to 2 in the coating 110.Specifically, described cover
The ratio between oxygen atom and silicon atom are 2 in cap rock 110.
If the thickness of the coating 110 is too small, it is difficult to reduce isolation structure 110 to the substrate corner surface oxygen
Absorption；If the thickness of the coating 110 is excessive, the suppression that isolation structure 110 absorbs the corner surface oxygen
Furthermore production is easy to produce waste of material with that will not increase with the increase of thickness.In the present embodiment, the coating 110
Thickness is in the range of 30 angstroms~50 angstroms.
Gate structure with continued reference to Fig. 6, positioned at 100 surface of substrate.
In the present embodiment, the gate structure includes: the gate oxide 120 positioned at 100 surface of substrate；Positioned at described
Grid layer 130 on gate oxide 120.
The gate oxide 120 is used to form the gate dielectric layer of the semiconductor structure, realizes between grid and substrate 100
Electrical isolation.
It should be noted that in the present embodiment, in the process for forming the gate oxide 120 by the second thermal oxidation technology
In, since 101 surface of isolation structure has coating 110,110 surface of coating is not easily formed gate oxide,
Therefore, the gate oxide 120 only covers 100 surface of substrate.
In the present embodiment, the material of the gate oxide 120 is identical as the material of the coating 110.Gate oxide 120
There is identical material with the coating 110, it being capable of simplification of flowsheet.Specifically, the material of the gate oxide 120 is oxygen
SiClx.In other embodiments, the material of the gate oxide can also be hafnium oxide, zirconium oxide or hafnium silicon oxide.
It should also be noted that, 110 surface of coating does not have gate oxide 120 in the present embodiment.Forming institute
During stating grid layer 130, grid layer 130 can be formed on the coating 110.Therefore, the gate structure further include:
Grid layer 130 on the coating 110.
In the present embodiment, the material of the grid layer 130 is polysilicon.In other embodiments, the material of the grid layer
Material can also be metal.
Referring to FIG. 8, showing the structural schematic diagram of another embodiment of semiconductor structure of the invention.
This will not be repeated here for the something in common of the present embodiment and a upper embodiment, and difference includes:
In the present embodiment, the gate oxide 220 is located at 210 surface of the substrate 200 and the coating.Namely
It says, the gate structure further include: the gate oxide positioned at 210 surface of coating.
In the present embodiment, the grid layer 230 is located on the gate oxide 220.
To sum up, in semiconductor structure of the invention, the isolation structure surface has coating, and the coating can be
The isolation structure is isolated with oxygen, isolation structure can be reduced to oxygen atom
It absorbs.In addition, the coating is less than the isolation structure to the absorbability of oxygen atom to the absorbability of oxygen atom, it is described
Coating the oxygen formed during gate structure in reactant is absorbed it is less, to be not easy to make the neighbouring isolation structure
Gate structure in oxygen-containing film thining, the uniformity of oxygen-containing film in gate structure can be increased, and then can be improved and partly lead
The breakdown voltage of oxygen-containing film in body structure improves semiconductor structure performance.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (7)
1. a kind of forming method of semiconductor structure characterized by comprising
Substrate is provided；
Isolation structure is formed in the substrate, and the material of the isolation structure is the silica rich in silicon；
Coating is formed on the isolation structure surface of the neighbouring substrate, and the material of the coating is silica, and described is covered
The content of oxygen atom is greater than the content of oxygen atom in isolation structure in cap rock, and the coating is less than the absorbability of oxygen atom
The isolation structure to the absorbability of oxygen atom, the coating with a thickness of 30 angstroms~50 angstroms；
After forming the coating, gate structure is formed in the substrate surface.
2. the forming method of semiconductor structure as described in claim 1, which is characterized in that the absorbability includes: to oxygen
The uptake of atom and absorption rate to oxygen atom.
3. the forming method of semiconductor structure as described in claim 1, which is characterized in that initially cover on the isolation structure surface
The thickness of cap rock is greater than the initial overlay layer thickness of substrate surface；
The step of forming the coating include:
Initial overlay layer is formed in the isolation structure and substrate surface；
The initial overlay layer for removing the substrate surface retains the initial overlay layer of the isolation structure surface portion thickness, shape
At coating.
4. the forming method of semiconductor structure as described in claim 1, which is characterized in that form the technique packet of the coating
Include thermal oxidation technology；
It include: the combination of oxygen or oxygen and hydrogen by the reaction gas that thermal oxidation technology forms the coating.
5. the forming method of semiconductor structure as described in claim 1, which is characterized in that the step of forming the isolation structure
In, the ratio of oxygen flow and silane flow rate is the first ratio；
The coating is formed by chemical vapor deposition process；
It include: that reaction gas includes: by the technological parameter that chemical vapor deposition process forms the coating
Oxygen and silane；Oxygen flow and the ratio of silane flow rate are greater than first ratio.
6. the forming method of semiconductor structure as claimed in claim 5, which is characterized in that pass through chemical vapor deposition process shape
In the step of the coating, the ratio of oxygen flow and silane flow rate is greater than 1.6.
7. a kind of semiconductor structure characterized by comprising
Substrate；
Isolation structure in the substrate, the material of the isolation structure are the silica rich in silicon；
Coating positioned at the isolation structure surface of the neighbouring substrate, the material of the coating are silica, and described are covered
The content of oxygen atom is greater than the content of oxygen atom in isolation structure in cap rock, and the coating is less than the absorbability of oxygen atom
Isolation structure to the absorbability of oxygen atom, the coating with a thickness of 30 angstroms~50 angstroms；
Positioned at the gate structure of the substrate surface.
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| US5874364A (en) * | 1995-03-27 | 1999-02-23 | Fujitsu Limited | Thin film deposition method, capacitor device and method for fabricating the same, and semiconductor device and method for fabricating the same |
| US6153480A (en) * | 1998-05-08 | 2000-11-28 | Intel Coroporation | Advanced trench sidewall oxide for shallow trench technology |
| US6830983B2 (en) * | 2002-08-29 | 2004-12-14 | Micron Technology, Inc. | Method of making an oxygen diffusion barrier for semiconductor devices using platinum, rhodium, or iridium stuffed with silicon oxide |
| TWI253686B (en) * | 2004-08-03 | 2006-04-21 | Powerchip Semiconductor Corp | Method of fabricating a gate oxide layer |
| KR100629606B1 (en) * | 2004-12-31 | 2006-09-27 | 동부일렉트로닉스 주식회사 | Method for improving the gate oxidation quality of high voltage device area |
| US20140374838A1 (en) * | 2013-06-21 | 2014-12-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs with Nitride Liners and Methods of Forming the Same |
| CN104681493B (en) * | 2013-11-27 | 2018-08-10 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor structure |
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