CN105785101A - Efficient inductor current detection circuit - Google Patents

Abstract

The present invention discloses an efficient inductor current detection circuit which comprises an inductor current size judgment mechanism circuit, a large inductor current detection circuit and a current mirror circuit which are orderly connected and also comprises a small inductor current detection circuit which is connected to the large inductor current detection circuit in parallel. The inductor current size judgment mechanism circuit is used for judging the relation between the magnitude of the current which flows through an inductor and the magnitude of a preset threshold and outputting a judgment mechanism signal, and thus the large inductor current detection circuit or small inductor current detection circuit is selected to detect the inductor current. The inductor current detection circuit disclosed by the invention is suitable for the inductor current circuit of a BOOST DC- DC converter, the large inductor current can be effectively detected, the effectively low inductor current can be detect, in a large load current condition, the inductor current is scaled down according to a N time proportion, and in a small amplitude current condition, the inductor current is scaled down according to a N/2 time proportion. Thus the accuracy of output end detection is improved well.

Description

A kind of efficiently inductive current detection circuit

Technical field

The present invention relates to current detection circuit field, more particularly, to the efficient inductive current detection circuit of one.

Background technology

Along with battery powered portable type electronic product constantly to low-voltage, low-power consumption, the development of the big sense of current, low-power consumption and high efficiency to switching power source chip require harsher, and the power consumption of chip and conversion efficiency determine service efficiency and the life-span of battery to a great extent.It is therefore desirable to the power consumption of each functional module in reduction Switching Power Supply, to improve the stand-by time of portable set.

Inductive current detection circuit is one of most important functional module in Switching Power Supply, and it can detect load open circuit, short circuit and over-current state in real time, thus realizes chip protection and power consumption saving.In the dc-dc of Controlled in Current Mode and Based, current detection circuit is important comprising modules.It not only acts as overcurrent protection in whole circuit, and current detecting result is compared with the output of voltage loop plus slope compensation signal, it is achieved pulse width modulation, its precision, speed and power consumption can have, to circuit integrity, having a significant impact.

There is multiple different inductive current detection technique in prior art, the most popular electric current detecting method has series resistance detection, power tube MN detection and parallel-current microscopy survey etc. three kinds.

Series resistance detection is at sheet external inductance or one little sampling resistor of power tube one end series connection, because for certain resistance value, the electric current flow through on corresponding inductance by detecting ohmically pressure drop i.e. to can detect that.This method accuracy of detection is high, but owing to the existence of detection resistance can introduce an extra power consumption, thus reduce power supply conversion efficiency, therefore, this resistance can not be too big, and the method is also only applicable to small area analysis testing circuit, meanwhile, to be affected precision by technique inadequate for small resistor.

Power tube MN detection is to be realized by the voltage on detection power tube, and because power tube is operated in linear zone, therefore it can be equivalent to a resistanceThe method is without extra power consumption, but μ, Cox and V_TBeing influenced by temperature etc. parameter and change greatly, the MN of power tube can produce nonlinear change, and maximum error scope is up to-50%～+100%, thus current detection accuracy is poor.

It is a detection pipe with power tube with same type in parallel that parallel-current microscopy is surveyed, and breadth length ratio is N: 1, so, flows through and detects the electric current of pipe just for the 1/N of power tube current.This method needs op-amp, and the current mirror making detection pipe and power tube be constituted has well coupling, and therefore circuit structure is more complicated, and bandwidth is relatively low, and response time is relatively slow, requires higher to the matching of circuit.

In current actual application, conventional is parallel-current mirror detection method, and Fig. 1 show the inductive current detection method of a kind of typical case's application parallel-current mirror.

In Fig. 1, VN is pwm control signal, VP and VN is complementary signal, this circuit operation principle is for when VN is high level, and power tube MN turns on, N4 and N5 turns on, N3 closes, P2 with P3 provides identical electric current as current source to N1 with N2, if the breadth length ratio of two NMOS tube of N1 with N2 sets the same, then two pipe source class current potentials are equal, so N4 and MN has equal drain voltage, so the size of current proportionate relationship flowing through two pipes is:

$\frac{I_{N4}}{I_{\mathrm{MN}}}=\frac{\left(\frac{W}{L}\right)N4}{\left(\frac{W}{L}\right)\mathrm{MN}}=\frac{1}{N}$

Arrange P4 with P5, P6 with P7 breadth length ratio equal, then flow through detection resistance electric current:

I_SENSE=I_N4_I_b

Owing to reference current is much smaller than the electric current of inductance detection, so I_SENSE≈I_N4, then:

V_SENSE=I_SENSE*R_SENSE≈I_N4*R_SENSE

Can be seen that I to be made_SENSEMore than 0, then I_N4-I_b> 0 i.e. I_N4>I_b, this current detection circuit cannot be used for inductance too little current situation thus so that this circuit is restricted on loading range.

Summary of the invention

The main object of the present invention is for providing a kind of efficiently inductive current detection circuit, it is intended to the problem solving cannot detect owing to inductive current is too small in inductive current detection or accuracy of detection is the highest, power consumption is big.Checking of great current pattern or small area analysis detection pattern can be operated according to inductive current size judgment mechanism selection circuit, thus improve the Efficiency and accuracy of inductance detection.

For solving above-mentioned technical problem, technical scheme is as follows:

A kind of efficiently inductive current detection circuit, including the inductive current size judgment mechanism circuit being sequentially connected with, big inductive current detection circuit and current mirroring circuit, also includes the small inductor current detection circuit in parallel with big inductive current detection circuit；

Inductive current size judgment mechanism circuit, for judging the magnitude relationship of the size flowing through the electric current of inductance and the marginal value preset, and exports judgment mechanism signal；

Big inductive current detection circuit, for detect inductive current bigger when flow through the current signal of inductance；

Small inductor current detection circuit, for detect inductive current smaller when flow through the current signal of inductance；

Current mirroring circuit, for producing the reference voltage value preset in the constant current equal with reference current and judgment mechanism circuit.

In the preferred scheme of one, described big inductive current detection circuit includes that three groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, one group of current mirroring circuit N7 and N8, electric current summation circuit altogether；

Three groups are operated in the NMOS tube of degree of depth linear zone, and first group of NMOS tube is that the grid of N5 and N6, N5 and N6 meets driving signal CLKN；Second group of NMOS tube is the drain electrode that the drain electrode of power switch pipe MP and NB, MP meets N6, and the grid of MP connects and drives the drain electrode of signal CLKP, NB to connect the drain electrode of N5, and the source ground of NB, the grid of NB meets the judgment mechanism signal vm of inductive current size judgment mechanism circuit output；3rd group of NMOS tube is the grid connection of N1 and N2, N1 and N2, and the drain electrode of N1 connects the source class of N5, the source ground of N1, and the grid of N1 meets judgment mechanism signal vm, and the drain electrode of N2 connects the source class of N6, the source ground of N2, and the grid of N2 meets judgment mechanism signal vm；

The common grid level amplifying circuit being made up of PMOS P0, P1 and NMOS tube N3, N4 and the negative feedback loop being made up of PMOS P7 and NMOS tube N5, N3 is included containing degenerative grid level amplifying circuit altogether；The grid of P0, P1 connects, and the source electrode of P0, P1 connects power supply, and the drain electrode of P0 connects the drain electrode of N3, and the drain electrode of P1 connects the drain electrode of N4, and the grid of N3 is connected with the grid of N4, drain electrode, and the source electrode of N3 is connected with the drain electrode of N1, and the source electrode of N4 is connected with the drain electrode of N2；The grid of P7 connects the drain electrode of N3, and the drain electrode of P7 connects the drain electrode of N5.

Current mirroring circuit includes NMOS tube N7, N8, and the drain and gate of N7 connects, and the source ground of N7, the drain electrode of N8 connects the source electrode of P7, the source ground of N8；The electric current flowing through N8 is proportional to reference current；

The drain current flowing through NB, N5 and N8 is added up and obtains required inductance detection electric current by described electric current summation circuit.

In the preferred scheme of one, described small inductor current detection circuit includes that two groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, two groups of current mirroring circuits altogether；

Two groups of NMOS tube being operated in degree of depth linear zone, first group is the drain electrode that the drain electrode of power switch pipe MP and NL, NL meets N5, and the grid of NL meets the judgment mechanism signal vk of inductive current size judgment mechanism circuit output；Second group of NMOS tube is that the grid of N5 and N6, N5 and N6 all meets driving signal CLKN；

The common grid level amplifying circuit being made up of PMOS P0, P1 and NMOS tube N3, N4 and the negative feedback loop being made up of PMOS P7 and NMOS tube N5, N3 is included containing degenerative grid level amplifying circuit altogether；

The electric current that two groups of current mirroring circuits N7 and N9, N7 and N10 obtain flowing through N9 and N10 by current mirror is equal with reference current.

In the preferred scheme of one, described current mirroring circuit includes reference current source IBIAS and PMOS P0, P1, P3, P4, P5, P6；

The grid of P3 and P4 connects, and the source electrode of P3 and P4 connects power supply, and the drain electrode of P3 connects the drain electrode of N7, and the drain and gate of P4 connects, and the drain electrode of P4 connects one end of reference current source IBIAS, the other end ground connection of reference current source IBIAS；The drain electrode of P5 and P6 connects power supply, and the grid of P5 and P6 connects, and is connected with the drain electrode of N8 and the source electrode of P7 the most respectively after after the grid of P6, source electrode connects.

Reference current produces reference current by current mirror mirror image at the source-drain electrode of P0, P1 and P3；The image current mirror module of P5 and P6 composition, can be mirrored to the branch road of P6 in proportion by the current detection circuit obtained, and for producing detection voltage output end in proportion, is applied to switch power supply current Schema control.

In the preferred scheme of one, described inductive current size judgment mechanism circuit includes producing the circuit of default critical current mode value, comparator COM, drive circuit Driver, reverser, the transmission gate circuit that is made up of MS1, MS2, MS3, MS4.

Described produces the circuit presetting critical current mode value, produced reference voltage V ref of the node voltage coupling corresponding with presetting inductive current with NMOS tube Nref being operated in linear zone by current mirror P4, P2, the grid of Nref connects power supply, it is operated in linear zone, the source electrode of P2 connects power supply, and the grid of P2 is connected with the grid of P0, P1, P3, P4 respectively, the source ground of Nref, the grid of Nref connects power supply, and the drain electrode of P2 and Nref connects the reverse input end being followed by comparator COM；

Comparator COM positive input meets the switching node sw of BOOST Switching Power Supply, i.e. the drain electrode Vsw of MN pipe, and reverse input end meets default reference voltage V ref, the input vn of output termination drive circuit Driver；Drive circuit Driver and reverser produce inductive current size judgment mechanism signal vm and vk, and drive circuit passes through multiple driving mechanism, produce one group of driving signal vm and vk the most reverse that driving force is strong；

Transmission gate circuit is the switch selection circuit being made up of two pairs of PMOS and NMOS transmission gates, including MS1, MS2, MS3 and MS4, the drain electrode of MS1, MS4 and the source class of MS2, MS4 meet the grid vg of current mirror mirror image circuit N7, the source class of MS1 and the drain electrode of MS2 meet the grid vh of N8, the drain electrode of MS3 and the source class of MS4 meet the grid vi of N9 and N10, the grid of MS1 and MS3 connects judgment mechanism control signal vm, and the grid of MS3 and MS4 connects judgment mechanism control signal vk.

Judge signal vm be high level, vk be low level time, the transmission gate conducting of MS1 and MS2 composition, MS3 and MS4 composition transmission gate cut-off, vh equal to vg, vi close to 0.Judge signal vm be low level, vk be high level time MS1 and MS2 composition transmission gate cut-off, the transmission gate conducting of MS3 and MS4 composition, vi equal to vg, vh close to 0.

Use inductive current size judgment mechanism circuit, node voltage Vsw of electric current He this Switching Power Supply owing to flowing through power switch pipe is linear, so by detection node voltage Vsw, it is allowed to be compared by comparator with reference voltage V ref preset, again through signal of overdriving, thus obtain circuit operating pattern control signal vk and vm.Controlled transmission gate control current selecting circuit by vk and vm and be operated in big inductive current pattern or small inductor current-mode.

Compared with prior art, technical solution of the present invention provides the benefit that: the open a kind of efficiently inductive current detection circuit of the present invention, including the inductive current size judgment mechanism circuit being sequentially connected with, big inductive current detection circuit and current mirroring circuit, also include the small inductor current detection circuit in parallel with big inductive current detection circuit；Inductive current size judgment mechanism circuit is for judging the magnitude relationship of the size flowing through the electric current of inductance and the marginal value preset, and exports judgment mechanism signal；Thus select big inductive current detection circuit or small inductor current detection circuit that inductive current is detected.Inductive current circuit disclosed by the invention is applicable to the inductive current circuit of BOOST dc-dc, it is possible not only to the big inductive current of efficient detection, can also effectively detect extremely low inductive current, in the case of large load current, inductive current be pressed N times of scale smaller；Under slightly in current conditions, inductive current is pressed N/2 scale smaller.Thus improve the accuracy of outfan detection well.

Accompanying drawing explanation

Fig. 1 is the inductive current detection circuit figure in prior art by the BOOST Switching Power Supply of Controlled in Current Mode and Based.

Fig. 2 is that inductive current of the present invention detects structured flowchart.

Fig. 3 is inductive current detection circuit schematic diagram of the present invention.

Detailed description of the invention

Accompanying drawing being merely cited for property explanation, it is impossible to be interpreted as the restriction to this patent；To those skilled in the art, in accompanying drawing, some known features and explanation thereof may will be understood by omission.

With embodiment, technical scheme is described further below in conjunction with the accompanying drawings.

Embodiment 1

Fig. 3 is inductive current detection circuit schematic diagram of the present invention, as shown in Figure 3, a kind of efficiently inductive current detection circuit, including the inductive current size judgment mechanism circuit being sequentially connected with, big inductive current detection circuit and current mirroring circuit, also include the small inductor current detection circuit in parallel with big inductive current detection circuit；

Inductive current size judgment mechanism circuit, for judging the magnitude relationship of the size flowing through the electric current of inductance and the marginal value preset, and exports judgment mechanism signal；

Big inductive current detection circuit, for detect inductive current bigger when flow through the current signal of inductance；

Small inductor current detection circuit, for detect inductive current smaller when flow through the current signal of inductance；

Current mirroring circuit, for producing the reference voltage value preset in the constant current equal with reference current and judgment mechanism circuit.

Described inductive current size judges testing mechanism circuit, compare by reference voltage V ref and node voltage Vsw, thus obtain control signal at comparator output terminal, obtain being directly used in control signal vk and the vm of control mode of operation through overdrive circuit and phase inverter again, control two Guan Bis to transmission gate.

For BOOST DC-DC Switching Power Supply, during switching tube turns on, inductance is in the charging stage, power input, inductance and power switch pipe form a loop, the nmos switch pipe that one breadth length ratio is determined, when it is operated in degree of depth linear zone, its conducting resistance is:

$Ron=\frac{1}{u_n{C}_{ox}\frac{W}{L}(V_{GS}-V_{TH})}---\left(1\right)$

So in the case of driving signal constant, conducting resistance is a steady state value.So the drain-source current of the electric current and switching tube flowing through switching tube is linearly, it is possible to judge that flowing through inductive current compares bigger than normal or less than normal with the inductive current preset by the node voltage sw of the i.e. Switching Power Supply of drain voltage of detection switching tube.

With reference to Fig. 3, inductive current size of the present invention judges that testing mechanism circuit includes and produces the default circuit of critical current mode value, comparator COM, drive circuit Driver, reverser, the transmission gate circuit that is made up of MS1, MS2, MS3, MS4.

Described produces the circuit presetting critical current mode value, produced reference voltage V ref of the node voltage coupling corresponding with presetting inductive current with NMOS tube Nref being operated in linear zone by current mirror P4, P2, Nref tube grid meets input voltage VCC, is operated in linear zone, whereinAnd ${\left(\frac{W}{L}\right)}_{P2}:{\left(\frac{W}{L}\right)}_{P4}=1:1,$ So

$R_{Nref}=\frac{1}{u_n{C}_{ox}{\left(\frac{W}{L}\right)}_{Nref}(V_{GS}-V_{TH})}=\frac{k}{u_n{C}_{ox}{\left(\frac{W}{L}\right)}_{MN}(V_{GS}-V_{TH})}={\mathrm{kR}}_{MN}---\left(2\right)$

I_P2=lIbias (3)

Presetting small inductor electric current is I_L0, now by:

V_ref=R_Nref*I_P2=R_MN*I_L0 (4)

(2) (3) (4) are had to obtain:

K*l=I_L0 (5)

So PMOS P2 and the respective breadth length ratio of NMOS tube Nref can be set according to formula (5).The default inductor current value I of this circuit has been determined that after the breadth length ratio of two metal-oxide-semiconductors determines_L0。

When inductive current is more than presetting inductive current I_L0Time, i.e. Vref < sw, now comparator output vn is high level 1, again through overdrive circuit and negater circuit, obtain two control signals vk=0 and vm=1, thus MS1 and MS2 transmission gate is opened, MS3 and MS4 transmission gate is closed, so that grid potential vh of N8 approximates 0 equal to grid potential vg of N7, grid potential vi of N9 and N10, so N8 and NB

Open, N9 and N10 closes, and setsThe electric current then flowing through N8 pipe is equal to

$I_{N8}=\frac{1}{2}{I}_{bias}---\left(6\right)$

Further, described big inductive current detection circuit includes that three groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, one group of current mirroring circuit N7 and N8, electric current summation circuit altogether.

Described includes the common grid level amplifying circuit being made up of P0, P1, N3 and N4 and the negative feedback loop formed by P7, N5, N3 containing degenerative grid level amplifying circuit altogether.Owing to degenerative effect makes the source class current potential vd of source class current potential vc and N4 of two input N3 of amplifier equal, i.e. vc=vd.

Described three groups are operated in the NMOS tube of degree of depth linear zone, and one group of NMOS tube is N1 and N2, and a drain electrode connects the source class of N5, and grid meets judgment mechanism signal vm, and a drain electrode connects the source class of N6, and grid meets judgment mechanism signal vm.Due to vm=1, so being all operated in degree of depth linear zone and I_N1=I_N2；Second group of NMOS tube is N5 and N6, and grid all meets the driving signal CLKN of power tube Mn.Set

${\left(\frac{W}{L}\right)}_{MN}:{\left(\frac{W}{L}\right)}_{N1}:{\left(\frac{W}{L}\right)}_{N2}:{\left(\frac{W}{L}\right)}_{N5}:{\left(\frac{W}{L}\right)}_{N6}:{\left(\frac{W}{L}\right)}_{NB}=2N:2:2:2:2:1---\left(7\right)$

R can be obtained_MN: R_N1: R_N2: R_N5: R_N6: R_NB=1:2:2:2:2:2:2N (8)

Again by:

I_N2*R_N2+I_N6*R_N6=I_L*R_MN (9)

I_N2=I_N6+I_bias (10)

The electric current that can be flow through N2 and N6 by (8) (9) (10) is:WithFlow through the electric current of N3 and N4 equal and for I_bias, flow through N1 and N2 electric current equal simultaneously, KCL know so to flow through N5 and N6 electric current equal, it may be assumed that

$I_{N1}=I_{N2}=\frac{I_L}{2N}+\frac{I_{bias}}{2}---\left(11\right)$

$I_{N5}=I_{N6}=\frac{I_L}{2N}-\frac{I_{bias}}{2}---\left(12\right)$

Owing to N5 and N6 is operated in, linear zone, drain-source level electric current be equal and vc=vd, so the drain potential that the drain potential of N5 is equal to N6, i.e. ve=sw.3rd group is power switch pipe Mn and NB, one drain electrode connects the drain electrode of N6, grid meets driving signal CLKN, one drain electrode connects the drain electrode of N5, grid meets the judgment mechanism signal vm of inductive current size judgment mechanism circuit gained, due to ve=sw, so the drain voltage of Mn and MB is equal, the size of current relation then flowing through Mn and MB is:

$I_{NB}=\frac{I_L}{2N}---\left(13\right)$

The drain current flowing through MB, N5 and N8 is added up and obtains required inductance detection electric current by described electric current summation circuit, (6) (12) (13) electric current that must flow through P6 pipe is:

$I_{P6}=I_{N5}+I_{NB}+I_{N8}=\frac{I_L}{2N}-\frac{I_{bias}}{2}+\frac{I_L}{2N}+\frac{1}{2}{I}_{bias}=\frac{I_L}{N}---\left(14\right)$

The current-mirror structure being made up of P5 and P6 makes, and flows through the drain current of P5, i.e. sample rate current:

$I_{SEN}=I_{N6}=\frac{I_L}{N}---\left(15\right)$

When inductive current is less than presetting inductive current I_L0Time, i.e. Vref > sw, now comparator output vn is high level 0, again through overdrive circuit and negater circuit, obtain two control signals vk=1 and vm=0, thus MS1 and MS2 transmission gate is closed, MS3 and MS4 transmission gate is opened, so that grid potential vh of N8 approximates 0, grid potential vi of N9 and N10 grid potential vg equal to N7, so N1, N2 and N8 closes, N9 and N10 opens and is operated in saturation region, breadth length ratio further as N9 with N10 is consistent with N7, ignore channel modulation effect, N9 and the N10 drain current by current mirror mirror image N7, that is:

I_N9=I_N10=I_bias (16)

Further, described small inductor current detection circuit includes that two groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, two groups of current mirroring circuits altogether.

The same with big inductive current, described includes the common grid level amplifying circuit being made up of P0, P1, N3 and N4 and the negative feedback loop formed by P7, N5, N3 containing degenerative grid level amplifying circuit altogether.Owing to degenerative effect makes the source class current potential vc of source class current potential vc and N4 of two input N3 of amplifier equal, i.e. vc=vd.

Two groups of NMOS tube being operated in degree of depth linear zone, one group of NMOS tube is N5 and N6, and grid all meets the driving signal CLKN of power tube Mn.Due to I_N3=I_N4=I_N9=I_N10=I_bias, know according to KCL: the electric current flowing through N5 and N6 is equal to 0, but it is all operated in degree of depth linear zone, so now the drain potential of N5 and the drain potential of N6 are all equal with respective source class current potential, i.e. ve=sw=vc=vd；Second group of group is power switch pipe Mn and ML, and a drain electrode connects the drain electrode of N6, and grid meets driving signal CLKN, and a drain electrode connects the drain electrode of N5, and grid meets the judgment mechanism signal vk of inductive current size judgment mechanism circuit gained, arrangesOwing to the drain voltage of vk=1 and Mn and ML is equal, so the size of current relation flowing through Mn and ML is:

$I_{NL}=\frac{2I_L}{N}---\left(17\right)$

The drain current flowing through NL, N5 and N8 is added up and obtains required inductance detection electric current by described electric current summation circuit, and the electric current that must flow through P6 pipe is:

$I_{P6}=I_{N5}+I_{NL}+I_{N8}=0+\frac{2I_L}{N}+0=\frac{2I_L}{N}---\left(18\right)$

In sum, the present invention utilizes the inductive current in inductive current size judgment mechanism circuit judges transient state moment to be big electric current or small area analysis, and then select detection pattern, when inductive current is more than pre-set current value, circuit is operated in big inductive current detection pattern, and the detection electric current obtained is inductive currentTimes；When inductive current is small area analysis, and circuit is operated in small inductor amperometric detection mode, and the detection electric current obtained is inductive currentDue to work during two inductive current detection pattern differences, efficiently control the power consumption of circuit.The present invention not only solves load too low in traditional inductance current detecting and causes the non-detectable problem of inductive current, also solve the problem in accuracy of detection, have detected inductive current peak exactly, so that this circuit is effectively applied in the BOOST DC-DC Switching Power Supply of Controlled in Current Mode and Based.

The above embodiment of the present invention is only for clearly demonstrating example of the present invention, and is not the restriction to embodiments of the present invention.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here without also cannot all of embodiment be given exhaustive.All any amendment, equivalent and improvement etc. made within the spirit and principles in the present invention, within should be included in the protection domain of the claims in the present invention.

Claims (5)

1. an efficient inductive current detection circuit, it is characterized in that, described inductive current detection circuit includes the inductive current size judgment mechanism circuit being sequentially connected with, big inductive current detection circuit and current mirroring circuit, also includes the small inductor current detection circuit in parallel with big inductive current detection circuit；

Inductive current size judgment mechanism circuit, for judging the magnitude relationship of the size flowing through the electric current of inductance and the marginal value preset, and exports judgment mechanism signal；

Big inductive current detection circuit, for detect inductive current bigger when flow through the current signal of inductance；

Small inductor current detection circuit, for detect inductive current smaller when flow through the current signal of inductance；

Current mirroring circuit, for producing the reference voltage value preset in the constant current equal with reference current and judgment mechanism circuit.

Efficient inductive current detection circuit the most according to claim 1, it is characterized in that, described big inductive current detection circuit includes that three groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, one group of current mirroring circuit N7 and N8, electric current summation circuit altogether；

Three groups are operated in the NMOS tube of degree of depth linear zone, and first group of NMOS tube is that the grid of N5 and N6, N5 and N6 meets driving signal CLKN；Second group of NMOS tube is the drain electrode that the drain electrode of power switch pipe MP and NB, MP meets N6, and the grid of MP connects and drives the drain electrode of signal CLKP, NB to connect the drain electrode of N5, and the source ground of NB, the grid of NB meets the judgment mechanism signal vm of inductive current size judgment mechanism circuit output；3rd group of NMOS tube is the grid connection of N1 and N2, N1 and N2, and the drain electrode of N1 connects the source class of N5, the source ground of N1, and the grid of N1 meets judgment mechanism signal vm, and the drain electrode of N2 connects the source class of N6, the source ground of N2, and the grid of N2 meets judgment mechanism signal vm；

The common grid level amplifying circuit being made up of PMOS P0, P1 and NMOS tube N3, N4 and the negative feedback loop being made up of PMOS P7 and NMOS tube N5, N3 is included containing degenerative grid level amplifying circuit altogether；The grid of P0, P1 connects, and the source electrode of P0, P1 connects power supply, and the drain electrode of P0 connects the drain electrode of N3, and the drain electrode of P1 connects the drain electrode of N4, and the grid of N3 is connected with the grid of N4, drain electrode, and the source electrode of N3 is connected with the drain electrode of N1, and the source electrode of N4 is connected with the drain electrode of N2；The grid of P7 connects the drain electrode of N3, and the drain electrode of P7 connects the drain electrode of N5；

Current mirroring circuit includes NMOS tube N7, N8, and the drain and gate of N7 connects, and the source ground of N7, the drain electrode of N8 connects the source electrode of P7, the source ground of N8；The electric current flowing through N8 is proportional to reference current；

The drain current flowing through NB, N5 and N8 is added up and obtains required inductance detection electric current by described electric current summation circuit.

Efficient inductive current detection circuit the most according to claim 2, it is characterised in that described small inductor current detection circuit includes that two groups are operated in the NMOS tube of degree of depth linear zone, containing degenerative grid level amplifying circuit, two groups of current mirroring circuits altogether；

Two groups of NMOS tube being operated in degree of depth linear zone, first group is the drain electrode that the drain electrode of power switch pipe MP and NL, NL meets N5, and the grid of NL meets the judgment mechanism signal vk of inductive current size judgment mechanism circuit output；Second group of NMOS tube is that the grid of N5 and N6, N5 and N6 all meets driving signal CLKN；

The common grid level amplifying circuit being made up of PMOS P0, P1 and NMOS tube N3, N4 and the negative feedback loop being made up of PMOS P7 and NMOS tube N5, N3 is included containing degenerative grid level amplifying circuit altogether；

The electric current that two groups of current mirroring circuits N7 and N9, N7 and N10 obtain flowing through N9 and N10 by current mirror is equal with reference current.

Efficient inductive current detection circuit the most according to claim 3, it is characterised in that described current mirroring circuit includes reference current source IBIAS and PMOS P0, P1, P3, P4, P5, P6；

The grid of P3 and P4 connects, and the source electrode of P3 and P4 connects power supply, and the drain electrode of P3 connects the drain electrode of N7, and the drain and gate of P4 connects, and the drain electrode of P4 connects one end of reference current source IBIAS, the other end ground connection of reference current source IBIAS；The drain electrode of P5 and P6 connects power supply, and the grid of P5 and P6 connects, and is connected with the drain electrode of N8 and the source electrode of P7 the most respectively after after the grid of P6, source electrode connects.

Efficient inductive current detection circuit the most according to claim 1, it is characterized in that, described inductive current size judgment mechanism circuit includes producing the circuit of default critical current mode value, comparator COM, drive circuit Driver, reverser, the transmission gate circuit that is made up of MS1, MS2, MS3, MS4；

Described produces the circuit presetting critical current mode value, produced reference voltage V ref of the node voltage coupling corresponding with presetting inductive current with NMOS tube Nref being operated in linear zone by current mirror P4, P2, the grid of Nref connects power supply, it is operated in linear zone, the source electrode of P2 connects power supply, and the grid of P2 is connected with the grid of P0, P1, P3, P4 respectively, the source ground of Nref, the grid of Nref connects power supply, and the drain electrode of P2 and Nref connects the reverse input end being followed by comparator COM；

Comparator COM positive input meets the switching node sw of BOOST Switching Power Supply, i.e. the drain electrode Vsw of MN pipe, and reverse input end meets default reference voltage V ref, the input vn of output termination drive circuit Driver；Drive circuit Driver and reverser produce inductive current size judgment mechanism signal vm and vk, and drive circuit passes through multiple driving mechanism, produce one group of driving signal vm and vk the most reverse that driving force is strong；

Transmission gate circuit is the switch selection circuit being made up of two pairs of PMOS and NMOS transmission gates, including MS1, MS2, MS3 and MS4, the drain electrode of MS1, MS4 and the source class of MS2, MS4 meet the grid vg of current mirror mirror image circuit N7, the source class of MS1 and the drain electrode of MS2 meet the grid vh of N8, the drain electrode of MS3 and the source class of MS4 meet the grid vi of N9 and N10, the grid of MS1 and MS3 connects judgment mechanism control signal vm, and the grid of MS3 and MS4 connects judgment mechanism control signal vk.