CN102881251A - Current drive circuit - Google Patents
Current drive circuit Download PDFInfo
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- CN102881251A CN102881251A CN2012102957719A CN201210295771A CN102881251A CN 102881251 A CN102881251 A CN 102881251A CN 2012102957719 A CN2012102957719 A CN 2012102957719A CN 201210295771 A CN201210295771 A CN 201210295771A CN 102881251 A CN102881251 A CN 102881251A
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Abstract
The invention provides a current drive circuit which comprises a reference current generating unit used for generating reference current, a first stage constant-current regulation unit which is used for mirroring and magnifying the reference current and utilizing the sampled and magnified reference current through a first resistor to generate reference voltage, and a secondary constant-current regulation unit composed of multiway-output channels, wherein each path of output channel utilizes a second resistor to allow the reference voltage to be subject to voltage-current conversion so as to generate multiway-output current; and the first resistor and the second resistor are made of the same materials and are in proportional in the resistance value. The current drive circuit provided by the embodiment of the invention can improve the matching precision and on-off speed of the output drive current so as to remarkably improve the display quality of a drive display screen.
Description
Technical field
The embodiment of the invention relates to a kind of current driving circuit, relates in particular to a kind of driving circuit that is applied in light emitting diode (Light Emitting Diode, the LED) display system.
Background technology
Along with the develop rapidly of economy and enriching gradually of people's social life, LED display also is rapidly developed, to satisfy the user demand of society and various fields of recent life, meanwhile people also have higher requirement to the display quality of LED display, and this has just proposed higher level challenge to the performance requirement of led drive circuit.
Existing market main flow LED screen display driver chip all adopts 16 passage constant current output frameworks, to satisfy the driving requirement of a large amount of LED dot matrix.Because the application of the manystage cascade connection condition is added in hyperchannel output, the display effect that the electric current consistance of each LED dot matrix row and column will the appreciable impact screen.In order to obtain preferably electric current consistance characteristic, the structural design that the constant-current source device of a plurality of same units of the general employing of existing multi-channel LED driving circuit mates in conjunction with domain promotes the matching precision between the hyperchannel output current, yet but effectively not reliable method compensates precision and optimizes, utilize the proportional mode of power tube number to realize that current mirror will take a large amount of chip areas again, be subject to again simultaneously the restriction of amplifier feedback control loop response speed, its switching speed can be restricted.
In fact, when the impact of unbalance of system and IC internal noise accounted for the mismatch principal element, infinitely promoting the gain of source follower amplifier had not had practical significance for the impact that reduces offset voltage.For common CMOS technique, the input of amplifier will maintain all the time a certain magnitude to the pipe offset voltage and can't infinitely reduce.In addition, the unlatching of power tube and shutoff are corresponding to foundation and the turn off process of loop, opening speed is subject to that the power tube gate capacitance discharges and recharges and the restriction of loop stability speed, and opens also suddenly the rising corresponding to the overshoot of output current of moment gate voltage, and both are a pair of contradiction that needs compromise.
Therefore, need a kind of circuit can significantly improve each interchannel output current matching precision, obtain good electric current consistance characteristic, loop is set up more rapidly to obtain higher switching speed.
Summary of the invention
The embodiment of the invention provides a kind of current driving circuit, to solve or to improve above-mentioned one or more problem.
The embodiment of the invention provides a kind of current driving circuit, comprising: reference current generation unit, first order constant flow regulation unit and constant flow regulation unit, the second level.Wherein, the reference current generation unit is for generation of reference current; First order constant flow regulation unit is used for mirror image and amplifies described reference current, and utilizes the described reference current after the first resistance sampling mirror image amplifies, to produce reference voltage; Constant flow regulation unit, the second level comprises the multichannel output channel, and the described output channel in every road all utilizes the second resistance that described reference voltage is carried out voltage to current conversion, to produce the multichannel output current; Wherein said the first resistance is identical material with the second resistance, and the resistance value of described the first resistance and the second resistance is proportional.
The current driving circuit of the embodiment of the invention can improve matching precision and the switching speed of output driving current, thereby significantly improves the display quality of the display screen that drives (for example LED display).
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do one to the accompanying drawing of required use in embodiment or the description of the Prior Art and introduce simply, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of the current driving circuit of one embodiment of the invention;
Fig. 2 is the circuit diagram of the current driving circuit of another embodiment of the present invention;
Fig. 3 is the circuit diagram of an output channel of second level constant flow regulation unit among Fig. 2;
Fig. 4 is the waveform synoptic diagram of the first clock φ A and second clock φ B in one embodiment of the invention;
Fig. 5 is that the output channel of Fig. 3 is in the schematic equivalent circuit of phase one;
Fig. 6 is that the output channel of Fig. 3 is in the schematic equivalent circuit of subordinate phase;
Fig. 7 is the circuit diagram of the current driving circuit of yet another embodiment of the invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
The structural representation of the current driving circuit that Fig. 1 provides for the embodiment of the invention one.The embodiment of the invention can be applicable in the LED display system, is used for light-emitting diode display is carried out current drives.As shown in Figure 1, the current driving circuit of present embodiment comprises: reference current generation unit 11, first order constant flow regulation unit 12 and constant flow regulation unit, the second level 13.Wherein reference current generation unit 11 is for generation of a reference current, first order constant flow regulation unit 12 connects this reference current generation unit 11, be used for mirror image and amplify the above-mentioned reference current that reference current generation unit 11 produces, and the reference current after utilizing one first resistance sampling mirror image to amplify, to produce reference voltage; Constant flow regulation unit, the second level 13 then comprises the multichannel output channel, every road output channel all receives the reference voltage that first order constant flow regulation unit 12 produces, and utilize one second resistance that the reference voltage that receives is carried out voltage to current conversion, to produce the multichannel output current.Concrete, in embodiments of the present invention, the second resistance in the constant flow regulation unit, the above-mentioned second level 13 is identical material with the first resistance in the first order constant flow regulation unit 12, and both resistance values are in proportion.
Because constant flow regulation unit, the second level and first order constant flow regulation unit are the resistance ratio setting in the embodiment of the invention, thereby the reference current that combines after can amplifying mirror image carries out accurate ratio conversion.The current driving circuit that such resistance scaled mirror realizes mates to promote the design of the matching precision between the hyperchannel output current in conjunction with domain compared to existing employing constant-current source device, more simple and reliable, can effectively eliminate the error that temperature-coefficient of electrical resistance, voltage coefficient bring, and by selecting to arrange rational resistance and wide long size, can effectively improve proportional precision, the shared chip area of circuit is declined to a great extent, directly reduce chip cost, can also effectively reduce the output current mismatch that process deviation causes simultaneously.
Fig. 2 is the circuit diagram of the current driving circuit of another embodiment of the present invention, and the circuit structure to current driving circuit in the present embodiment is described in detail.As shown in Figure 2, in the present embodiment, reference current generation unit 11 specifically can be achieved by an operational amplifier, and an input end of this operational amplifier receives internal reference voltage V
REF, output terminal connects a non-essential resistance R
EXTThereby the size of the reference current I1 that reference current generation unit 11 produces then can be by the resistance R of this outside connection
EXTAnd internal reference voltage V
REFSet:
First order constant flow regulation unit 12 connects reference current generation units 11, and is concrete, as the first order of constant flow regulation circuit, this first order constant flow regulation unit 12 can by a current mirror 121 and and one first resistance R 1 be achieved.The input end of current mirror 121 connects the reference current I1 that reference current generation unit 11 produces, and output terminal connects the first resistance R 1.After 121 pairs of reference currents that receive of current mirror carry out the mirror image amplification, obtain the image current I2 after accurate ratio is amplified, this image current I2 then carries out electric current to voltage transitions by the first resistance R 1, to produce reference voltage VR, this reference voltage VR is as the common reference voltage of all output channels of the second constant flow regulation unit 13.Suppose that n is the current mirror ratio, image current I2 and reference voltage VR are respectively:
Wherein k.R is the resistance value of the first resistance R 1.Through precision current mirror mirror image, electric current amplifies n doubly, and considers current mirror precision and domain coupling layout, and n gets even number, and value is unsuitable excessive.
Constant flow regulation unit, the second level 13 comprises multichannel output channel 131(for example can be set as 16 the tunnel usually), every road output channel 131 all receives the reference voltage VR of first order constant flow regulation unit 12 outputs, and all utilization and the first resistance R 1 are carried out the V-I conversion with 2 pairs of these reference voltages of the second resistance R VR of material, thereby produce multiple constant current electric current I 0.This second resistance R 2 is proportional with the resistance value of above-mentioned the first resistance R 1, supposes that specifically ratio value is k, and the resistance value that can set the second resistance R 2 is R.After by the second resistance reference voltage VR being carried out V-1 conversion, reference voltage VR can be converted to steady current I0 output:
Because first order constant flow regulation unit 12 is realized by current mirror, can carry out to reference current I1 the amplification of accurate ratio, and the resistance value of the second resistance R 2 and the first resistance R 1 is in proportion, and the electric current I 2 after can amplifying the current mirror mirror image is again carried out accurate ratio conversion.Such resistance ratio image current driving circuit compared to existing employing constant-current source device in conjunction with layout design, more simple and reliable, can effectively eliminate the error that temperature-coefficient of electrical resistance, voltage coefficient bring, and by selecting to arrange rational resistance and wide long size, can effectively improve proportional precision, the shared chip area of circuit is declined to a great extent, directly reduce chip cost, can also effectively reduce the output current mismatch that process deviation causes simultaneously.
The above embodiment of the present invention can effectively be eliminated the error that temperature-coefficient of electrical resistance, voltage coefficient bring compared to existing constant current source driving circuit, at the matching precision that reduces between the basis lifting hyperchannel output current of the shared chip area of circuit, reduction chip cost, but in the existing constant current source driving circuit, the offset voltage that exists in the output channel also is a unfavorable factor that affects the currents match precision between hyperchannel.In the embodiment of the invention, can by adopting the technology of switching capacity in each output channel of constant flow regulation unit, the second level 13, eliminate in theory offset voltage to the influence of peak current, thereby further improve the currents match precision between hyperchannel.
Fig. 3 is the circuit diagram of an output channel of second level constant flow regulation unit among Fig. 2, for each the road output channel in the constant flow regulation unit, the second level 13, all can adopt the circuit structure of switching capacity as shown in Figure 3, to eliminate in theory offset voltage to the influence of peak current.
As shown in Figure 3, the present embodiment output channel can comprise an operational amplifier, a capacitor C and a plurality of switch.These a plurality of switches can comprise the first switch S 1 and second switch S2 at least, and the first input end of operational amplifier connects the first end of capacitor C, and the second input end connects reference voltage V
REF1, output terminal connects the second resistance R 2 by output stage.The second end of capacitor C is connected to reference voltage VR by the first switch S 1, and connects output stage by second switch S2, that is connects the second resistance R 2.The first switch S 1 can be by being connected between the first input end that opens or closes to control reference voltage VR and operational amplifier, and second switch S2 then can be by opening or closing with being connected between the first input end of control algorithm amplifier and the output stage.
In the present embodiment, the first switch S 1 being connected between phase one conducting capacitor C and reference voltage VR can be set, voltage with the operational amplifier first input end is set to reference voltage VR, and be set second switch being connected between subordinate phase conducting capacitor C and output stage, voltage with the operational amplifier first input end is set to output stage voltage, by alternately controlling opening and closing of the first switch S 1 and second switch S2, so that phase one and subordinate phase hocket, thereby to replace realization to the sampling of the offset voltage between the operational amplifier positive-negative input end and to keep action, and eliminate it to the impact of output current, improve each interchannel matching precision.
Further, above-mentioned a plurality of switch can also comprise the 3rd switch S 3 and the 4th switch S 4.The above-mentioned first input end of operational amplifier is by the output terminal of the 3rd switch S 3 these operational amplifiers of connection, and the output terminal of operational amplifier connects above-mentioned output stage by the 4th switch S 4.Particularly, the 3rd switch S 3 and 1 synchronous the opening or closing of the first switch S can be set, and the 4th switch S 4 and synchronous the opening or closing of second switch S2 is set.That is to say, when being the above-mentioned phase one, being connected between the first input end of controlling the 3rd switch S 3 conducting operational amplifiers and the output terminal, and when above-mentioned subordinate phase, being connected between the output terminal of controlling the 4th switch S 4 conducting operational amplifiers and the output stage.
Particularly, in the practical application, above-mentioned switch S 1, S2, S3 and S4 can pass through switching transistor, mos field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor for example, MOSFET) be achieved, four switches can be the transistor of same kind, also can be dissimilar transistors.As long as can realize simultaneously conducting of S1 and S3 and close, S2 and simultaneously conducting of S4 with close and the conducting of two group transistors and close any control method and the circuit design that hocket and all can be applied among the present invention.
And in an embodiment, for example among the embodiment shown in Figure 3, switch S 1, S2, S3 and S4 all can be achieved by the NMOS pipe, the first clock φ A is in order to the Push And Release of gauge tap S1 and S3, second clock φ B is in order to the Push And Release of gauge tap S2 and S4, as shown in Figure 4, the first clock φ A and second clock φ B be inversion clock each other, hockets thereby can control the conducting of two groups of switches and close.
Phase one (being illustrated as the PhaseA stage), the first clock φ A gauge tap S1 and S3 are closed, and second clock φ B gauge tap S2 and S4 disconnect, and equivalent electrical circuit is corresponding to Fig. 5.Fig. 5 is that the output channel of Fig. 3 is in the schematic equivalent circuit of phase one.As shown in Figure 5, at this moment, the first input end of amplifier receives reference voltage VR by capacitor C:
V
A=V
R （5）
Because the ideal operational amplifier both end voltage is equal, and considers the existence of the positive and negative two input end offset voltages of amplifier, the second input end (negative terminal) voltage that can obtain operational amplifier is:
V
B=V
REF1+V
OS （6）
V wherein
REF1Be the reference voltage that second input end (negative terminal) of operational amplifier receives, VOS is the offset voltage between operational amplifier two input ends.
Can be obtained by above-mentioned formula (5) and (6), the actual electrical pressure reduction between operational amplifier two input ends is:
ΔV=V
A-V
B=V
R-V
REF1-V
OS （7）
Then, in subordinate phase (being illustrated as the PhaseB stage), second clock φ B gauge tap S2 and S4 are closed, and the first clock φ A gauge tap S1 and S3 disconnect, and equivalent electrical circuit is corresponding to Fig. 6.Fig. 6 is that the output channel of Fig. 3 is in the schematic equivalent circuit of subordinate phase.As shown in Figure 6, at this moment, the first input end of amplifier receives output stage voltage VD by capacitor C.
Because the first input end (anode) of operational amplifier does not have the charge discharging resisting path, therefore this moment operational amplifier negative terminal voltage V
BRemain unchanged, thereby:
V
D=V
A=V
B+ΔV=V
REF1+V
OS+V
VR-V
REF1-V
OS=V
R（8）
This shows, by replacing realization to the sampling of the offset voltage between the operational amplifier positive-negative input end and keeping action, guaranteed that the voltage difference delta V at electric capacity two ends remains unchanged, the circuit steady operation, at this moment, output current VO can be defined as:
This shows offset voltage V
OSImpact be eliminated.The embodiment of the invention is eliminated the impact of offset voltage by the mode of above-mentioned switching capacity, because offset voltage can not infinitely reduce and eliminate, the mode of above-mentioned switching capacity is by sampling to the offset voltage between the positive and negative two ends of amplifier and keeping, offset voltage can be eliminated the influence of peak current in theory is zero, thereby greatly improves the currents match precision between hyperchannel.
Further need to prove, in the above embodiment of the present invention, owing between the output terminal of operational amplifier and output stage, the 4th switch S 4 is set, conducting and disconnection with between control amplifier output terminal and the output stage can also make the switching speed of output channel constant current output be increased dramatically.
Concrete, the output stage of output channel can be achieved by a transistor equally, and for example as shown in Figure 3, output stage realizes by a nmos pass transistor equally.Referring to Fig. 5, during with the phase one (PhaseA stage), circuit working is in open loop situations, the positive input terminal of operational amplifier sampling reference voltage V
R, the output terminal of operational amplifier disconnects with the output stage transistor M0 that drives, and the grid level of NMOS pipe is floating empty, because the grid level does not arrange the path of releasing, so the state that this gate voltage was kept with the phase one (PhaseB stage) is identical.And circuit is when switching to PhaseB during the stage, and referring to Fig. 6, circuit working is at the closed loop state, this moment voltage V
DWith reference voltage V
REquate that output current IO is determined.If V
RNot obviously sudden change or disturbance, then the grid step voltage of output stage M0 will be maintained stable voltage, and when the output current path was opened, whole loop is steady operation at a terrific speed.Voltage when the control end of transistor M0 is maintained constant flow regulation unit, constant flow regulation second level steady operation can not produce voltage jump to guarantee output channel when phase one and subordinate phase replace.
In the above embodiment of the present invention, because the output stage of output channel is that perseverance is opened state as source follower, turn-off operation without switching tube, the gate voltage of the NMOS that amplifier drives is that voltage is kept state in sample phase, voltage can not be pulled to power supply or ground, and the unlatching of output constant current electric current and shutoff are to be realized by the high pressure NMOS switch that is connected on the output channel, pwm signal is controlled unlatching and the shutoff of this switching tube, shutoff and loop compared with source follower are set up process, and its switching speed can significantly improve.
The embodiment of the invention is by adopting the technology of switching capacity in each output channel, eliminate in theory offset voltage to the influence of peak current, thereby further improve the currents match precision between hyperchannel, be that perseverance is opened state by the output stage that output channel is set in addition, the grid step voltage will be maintained stable voltage, when the output current path was opened, whole loop is steady operation at a terrific speed.
Need to prove in addition, the above-mentioned physical circuit of output channel shown in Figure 3 only is a kind of example embodiment that realizes the switched capacitor technique of output channel, and be not limitation of the present invention, output channel can adopt other switching capacity form to eliminate offset voltage equally.
Fig. 7 is the circuit diagram of the current driving circuit of yet another embodiment of the invention.As shown in Figure 7, current driving circuit of the present invention can also comprise control signal generation unit 14, shift register cell 15 and data latches unit 16 except the described structure of above-described embodiment.Concrete, control signal generation unit 14 can pass through micro-control unit (Micro Control Unit, MCU) be achieved, to produce serial GTG input data SDI, clock input signal CLK, data latch control signal LE and to enable control inputs signal OE.Shift register cell 15 is used for receiving serial GTG input data SDI and clock input signal CLK, it is carried out pre-service, and according to clock input signal CLK serial luma data SDI is deposited.Data latches unit 16 then is used for receiving latch control signal LE and enabling control inputs signal OE, it is carried out pre-service, and from shift register cell 15, read out register data according to latch control signal LE, and give parallel output, and according to enabling control inputs signal OE the opening of each output channel is controlled.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be finished by the relevant hardware of programmed instruction, aforesaid program can be stored in the computer read/write memory medium, this program is carried out the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: the various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment puts down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (10)
1. a current driving circuit is characterized in that, comprising:
The reference current generation unit produces reference current;
First order constant flow regulation unit, mirror image amplifies described reference current, and utilizes the described reference current after the first resistance sampling mirror image amplifies, to produce reference voltage;
Constant flow regulation unit, the second level comprises the multichannel output channel, and the described output channel in every road all utilizes the second resistance that described reference voltage is carried out voltage to current conversion, to produce the multichannel output current;
Wherein said the first resistance is identical material with the second resistance, and the resistance value of described the first resistance and the second resistance is proportional.
2. current driving circuit according to claim 1 is characterized in that, each described output channel adopts switched capacitor technique to reduce offset voltage to the impact of described output current.
3. current driving circuit according to claim 2, it is characterized in that, each described output channel includes an operational amplifier, an electric capacity, a plurality of switch, described the second resistance and an output stage, and described a plurality of switches comprise the first switch and second switch;
One input end of described operational amplifier connects the first end of described electric capacity, output terminal connects described the second resistance by described output stage, the second end of described electric capacity connects described reference voltage by described the first switch, and connects output stage by described second switch
Wherein, described the first switch is in the phase one conducting, and described second switch is in the subordinate phase conducting, and described phase one and described subordinate phase hocket.
4. current driving circuit according to claim 3, it is characterized in that, described a plurality of switch also comprises the 3rd switch, and the input end of described operational amplifier connects the output terminal of described operational amplifier by described the 3rd switch, and described the 3rd switch is in described phase one conducting.
5. current driving circuit according to claim 3 is characterized in that, described a plurality of switches also comprise the 4th switch, and the output terminal of described operational amplifier connects described output stage by described the 4th switch, and described the 4th switch is in described subordinate phase conducting.
6. current driving circuit according to claim 5 is characterized in that, described the first switch, second switch, the 3rd switch and the 4th switch are all realized by switching transistor.
7. current driving circuit according to claim 6, it is characterized in that, described the first switch, second switch, the 3rd switch and the 4th switch are all realized by the switching transistor of same type and size, wherein said the first switch and the 3rd switch are by the first clock control, described second switch and the 4th switch are controlled by second clock, and described the first clock and second clock be inversion clock each other.
8. current driving circuit according to claim 5, it is characterized in that, described output stage realizes by a transistor, voltage when described transistorized control end is maintained constant flow regulation unit, the described second level of constant flow regulation steady operation can not produce voltage jump to guarantee described output channel when described phase one and subordinate phase replace.
9. current driving circuit according to claim 1 is characterized in that, described first order constant flow regulation unit comprises a current mirror and described the first resistance, and the input end of described current mirror connects described reference current, and output terminal connects described the first resistance;
Described current mirror is used for that described reference current is carried out mirror image and amplifies, and carries out electric current to voltage transitions by the reference current of described the first resistance after its output terminal amplifies mirror image, to produce described reference voltage.
10. current driving circuit according to claim 1 is characterized in that, described circuit also comprises:
The control signal generation unit produces serial GTG input data, clock input signal, data latch control signal and enables the control inputs signal;
Shift register cell receives described serial GTG input data and clock input signal, and according to described clock input signal described serial luma data is deposited;
The data latches unit, receive described latch control signal and enable the control inputs signal, from described shift register cell, read described serial GTG input data according to described latch control signal, and parallel output, and according to the described opening that enables each described output channel of control inputs signal controlling.
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