CN105742430A - LED epitaxial structure and preparation method therefor - Google Patents

LED epitaxial structure and preparation method therefor Download PDF

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Publication number
CN105742430A
CN105742430A CN201610128773.7A CN201610128773A CN105742430A CN 105742430 A CN105742430 A CN 105742430A CN 201610128773 A CN201610128773 A CN 201610128773A CN 105742430 A CN105742430 A CN 105742430A
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gan layer
thickness
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epitaxial structure
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贾伟
赵晨
李天保
余春燕
许并社
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Taiyuan University of Technology
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H01L33/18Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

The invention discloses an LED epitaxial structure. The LED epitaxial structure comprises a substrate, and a GaN core-forming layer, a non-doping GaN layer, an N type GaN layer, a dual-heterojunction layer and a P type GaN layer which are laminated on the substrate in sequence, wherein the LED epitaxial structure also comprises an SiN<x> layer positioned between the N type GaN layer and the dual-heterojunction layer; and multiple cut-through nano holes are formed in the SiN<x> layer. The SiN<x> layer adopts a nano porous structure, so that the dislocation density of the active region formed by the dual-heterojunction layer can be effectively lowered, the non-radiation recombination center of the active region is reduced consequently, and the internal quantum efficiency of the LED epitaxial structure is improved; and in addition, the in-situ grown SiN<x> layer with the nano porous structure also can reduce the total reflection loss of light, and the light output efficiency of the LED epitaxial structure can be improved as well. The preparation method for the LED epitaxial structure is simple and easy to implement, low in process cost, and capable of effectively ensuring the product yield.

Description

A kind of LED epitaxial structure and preparation method thereof
Technical field
The present invention relates to technical field of semiconductors, be specifically related to a kind of LED epitaxial structure and preparation method thereof.
Background technology
GaN base LED as novel energy-conserving light source, is expected to send to light for the whole world population up to 1,500,000,000, but it wants to substitute general lighting comprehensively, and real comes into huge numbers of families, in addition it is also necessary to reduce cost further, improves luminous intensity and luminous efficiency.These are required for based on novel high-performance GaN base LED epitaxial structure research and development, thus it is significant to carry out the research of GaN base New LED epitaxial structure.
At present, commercial GaN base LED epitaxial layer mostly is the multi-layer film structure of two dimension, mainly includes the p-type layer of undoped layer, the n-layer of Si doping, InGaN/GaN multiple quantum well active layer and Mg doping.Recently as the increasing day by day to high-power, high brightness and long-life LED component demand, said structure exposes following problem:
The first, higher dislocation density.Owing to having bigger lattice mismatch and thermal coefficient of expansion with commercial Sapphire Substrate, there is a large amount of dislocation in the GaN material of growth, its density is typically in 108-109cm-2Between.The scattering process of carrier is substantially reduced electric current distribution in active layer by dislocation, is the main electrical current source of leakage in LED structure, and dislocation is easily created non-radiative recombination center in active layer, and these have all had a strong impact on the luminous efficiency of LED.
The second, quantum confined Stark effect.Due to the stress field effect that the wurtzite structure feature of GaN material and lattice mismatch and thermal mismatching cause, very strong polarized electric field is there is in active layer, make it possible to inclination, potential well deepens, electronics separates with the wave function space in hole, cause that Carrier recombination probability reduces, the internal quantum efficiency of LED structure reduces, red shift of the emission spectra.
3rd, efficiency rapid drawdown.Owing to the carrier of the polarized electric field in auger recombination effect, active layer and Carrier Leakage, the hole uneven carrier tunnelling relevant with defect of injection and rich In district goes many reasons such as localization, the luminous efficiency of LED structure can reduce rapidly along with the increase of injected current density.
4th, total reflection loss.Owing to there is bigger refractivity between Sapphire Substrate, GaN epitaxial layer and air, when the light sent in active layer is mapped to the interface of both the above material, total reflection phenomenon can be there is, consequently only that small part light can emit, cause that the light extraction efficiency of LED is very low.
5th, it is necessary to synthesize white light by fluorescent material.White light LEDs is presently mainly the blue-light excited transmitting yellow fluorescent powder to produce in GaN epitaxial layer and produces, and its transformation efficiency is relatively low, and color rendering index is poor.
For this, Chinese patent literature CN102842659A discloses the manufacture method of a kind of gallium nitride based light emitting semiconductor device epitaxial wafer, and it comprises the steps: to grow into stratum nucleare at patterned substrate surface low-temperature;After nucleating layer high annealing, form scraggly surface;Grow undoped GaN layer, N-GaN layer, InGaN/GaN multiple quantum well active layer and P type AlGaN layer on the patterned substrate surface with graininess nucleus successively and mix magnesium P type GaN layer, thus forming LED active layer and the surface layer structure with rough and uneven in surface surface.Similar with epitaxial lateral overgrowth technology or patterned substrate epitaxy technology, said structure can reduce dislocation density, thus improving luminous efficiency and the light extraction efficiency of light emitting semiconductor device, but it is initially with more costly patterned substrate, the more important thing is that device emission wavelength controlling is relatively poor, the halfwidth of its glow peak is bigger, it is difficult to realize the white light emission of LED.
Summary of the invention
For this, to be solved by this invention is the problem that existing LED epitaxial structure preparation cost is high, be difficult to realize white light emission, thus providing a kind of preparation cost low and the LED epitaxial structure being capable of white light emission and preparation method thereof.
For solving above-mentioned technical problem, the technical solution used in the present invention is as follows:
A kind of LED epitaxial structure of the present invention, including substrate, stacks gradually the GaN nucleating layer, undoped GaN layer, N-type GaN layer, double heterojunction layer and the P type GaN layer that are formed over the substrate;Also include the SiN being arranged between described N-type GaN layer and described double heterojunction layerxLayer.
Described SiNxThe thickness of layer is 10nm~20nm;And described SiNxLayer is formed with some through nano apertures.
Described double heterojunction layer includes the first GaN layer, InGaN layer and the second GaN layer that stacking is arranged;Described first GaN layer, including having (0001) polar surface of nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face.
(0001) polar surface that described InGaN layer includes having nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face.
Described second GaN layer is arranged near described P type GaN layer, and described second GaN layer (0001) polar surface that includes having nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face.
The thickness of described first GaN layer be 200nm~500nm, described InGaN layer thickness be 15nm~25nm, described second GaN layer thickness be 5nm~10nm.
Described P type GaN layer is the P type GaN layer of Mg doping, has the rough surface of nanoscale, and thickness is 100nm~200nm;
The thickness of described GaN nucleating layer be 15nm~45nm, described undoped GaN layer thickness be 2000nm~3000nm, described N-type GaN layer thickness be 2000nm~3000nm.
The preparation method of LED epitaxial structure of the present invention, comprises the steps:
S1, on substrate, sequentially form GaN nucleating layer, undoped GaN layer, N-type GaN layer;
S2, described N-type GaN layer is formed there is the SiN of some through nano aperturesxLayer;
S3, at described SiNxLayer is formed double heterojunction layer and P type GaN layer.
Preferably, in described step S2, described SiNxThe silicon source of layer is SiH4, nitrogenous source is NH4, growth temperature is 800 DEG C~900 DEG C, and growth time is 200s~500s, and thickness is 10nm~20nm.
Preferably, in described step S1, the growth temperature of described GaN nucleating layer is 520 DEG C~570 DEG C, and thickness is 15nm~45nm;The growth temperature of described undoped GaN layer is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm;The growth temperature of described N-type GaN layer is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm;In described step S3, described P type GaN layer is the P type GaN layer of Mg doping, and growth temperature is 900 DEG C~1000 DEG C, and thickness is 100nm~200nm.
Preferably, in described step S3, the preparation process of described double heterojunction layer farther includes:
S31, at described SiNxDirectly forming the first GaN layer on layer, growth temperature is 720 DEG C~800 DEG C, and thickness is 200nm~500nm;
S32, directly forming InGaN layer in described first GaN layer, growth temperature is 720 DEG C~780 DEG C, and thickness is 15nm~25nm;
S33, directly forming the second GaN layer in described InGaN layer, growth temperature is 800 DEG C~860 DEG C, and thickness is 5nm~10nm.
The technique scheme of the present invention has the advantage that compared to existing technology
1, a kind of LED epitaxial structure described in the embodiment of the present invention, including substrate, stacks gradually the GaN nucleating layer, undoped GaN layer, N-type GaN layer, double heterojunction layer and the P type GaN layer that are formed over the substrate;Also include the SiN being arranged between described N-type GaN layer and described double heterojunction layerxLayer, described SiNxLayer is formed with some through nano apertures.Due to SiNxLayer has nano-porous structure, effectively reducing the dislocation density of active area in double heterojunction layer, thus reducing the non-radiative recombination center of active area, improving the internal quantum efficiency of described LED epitaxial structure.It addition, the SiN with nano-porous structure of growth in situxLayer can also reduce the total reflection loss of light, improves the light extraction efficiency of described LED epitaxial structure.
2, a kind of LED epitaxial structure described in the embodiment of the present invention, due to SiNxLayer has nano-porous structure, so, it is formed directly into SiNxDouble heterojunction layer growth on layer is three dimensional structure.On the one hand, the double heterojunction layer with three dimensional structure can be greatly reduced polarization phenomena, thus suppressing the efficiency rapid drawdown of described LED epitaxial structure;It addition, have in the double heterojunction layer of three dimensional structure, polar surface and semi-polarity mask have different In content, it is possible to send the light of different wave length, because of without by fluorescent material, being just directly realized by white light emission, be effectively simplified white light parts structure.
3, a kind of LED epitaxial structure described in the embodiment of the present invention, P type GaN layer has the rough surface of nanoscale, it is possible to effectively reduces the total reflection loss of light, improves the light extraction efficiency of epitaxial structure.
4, the preparation method of the LED epitaxial structure described in the embodiment of the present invention, comprises the steps: S1, sequentially forms GaN nucleating layer on substrate, undoped GaN layer, N-type GaN layer;S2, described N-type GaN layer is formed there is the SiN of some through nano aperturesxLayer;S3, at described SiNxLayer is formed double heterojunction layer and P type GaN layer.The preparation method of described LED epitaxial structure is simply easily implemented, and not only process costs is low, and can effectively ensure that product yield.
Accompanying drawing explanation
In order to make present disclosure be more likely to be clearly understood, below according to specific embodiments of the invention and in conjunction with accompanying drawing, the present invention is further detailed explanation, wherein
Fig. 1 is the LED epitaxial structure structural representation described in the embodiment of the present invention;
Fig. 2 is the LED epitaxial structure preparation method flow chart described in the embodiment of the present invention;
In figure, accompanying drawing labelling is expressed as: 1-substrate, 2-GaN nucleating layer, 3-undoped GaN layer, 4-N type GaN layer, 5-SiNxLayer, 6-the first GaN layer, 7-InGaN layer, 8-the second GaN layer, 9-P type GaN layer.
Detailed description of the invention
In order to make the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiments of the present invention are described in further detail.
The present invention can be embodied in many different forms, and should not be construed as limited to embodiment set forth herein.On the contrary, it is provided that these embodiments so that the disclosure will be thorough and complete, and the design of the present invention being fully conveyed to those skilled in the art, the present invention will only be defined by the appended claims.In the accompanying drawings, for clarity, the size in layer and region and relative size can be exaggerated.It should be appreciated that when element such as layer, region or substrate be referred to as " formed exist " or " being arranged on " another element " on " time, this element can be arranged directly on another element described, or can also there is intermediary element.On the contrary, when element is referred to as on " being formed directly into " or " being set directly at " another element, it is absent from intermediary element.
Embodiment
The present embodiment provides a kind of LED epitaxial structure, as it is shown in figure 1, include substrate 1, stacks gradually the GaN nucleating layer 2, undoped GaN layer 3, N-type GaN layer 4, double heterojunction layer and the P type GaN layer 9 that are formed on the substrate 2.
Also include the SiN being arranged between N-type GaN layer 4 and double heterojunction layerxLayer 5, SiNxLayer 5 is interposed layer, is the nano-porous structure being formed with some through nano apertures.As one embodiment of the present of invention, it is preferable that as shown in Figure 1.
Due to SiNxLayer 5 has nano-porous structure, effectively reducing the dislocation density of active area in double heterojunction layer, thus reducing the non-radiative recombination center of active area, improving the internal quantum efficiency of described LED epitaxial structure.
It addition, the SiN with nano-porous structure of growth in situxLayer 5 can also reduce the total reflection loss of light, improves the light extraction efficiency of described LED epitaxial structure.
SiNxThe thickness of layer 5 is 10nm~20nm;As one embodiment of the present of invention, SiN in the present embodimentxThe thickness of layer 5 is 15nm.
In the present embodiment, double heterojunction layer includes the first GaN layer 6, InGaN layer 7 and the second GaN layer 8 that stacking is arranged, and the second GaN layer 8 is arranged near P type GaN layer 9.
Due to SiNxLayer 5 has nano-porous structure, so, it is formed directly into SiNxThe first GaN layer 6 on layer 5 is grown to three dimensional structure, has multiple non-polar plane;Including having (0001) polar surface of nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face etc..
The InGaN layer 7 being grown in having in the first GaN layer 6 of three dimensional structure also forms three dimensional structure, has multiple non-polar plane;Including having (0001) polar surface of nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face etc..
Simultaneously, second GaN layer 8 forms three dimensional structure, including having (0001) polar surface of nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face etc..
On the one hand, the double heterojunction layer with three dimensional structure can be greatly reduced polarization phenomena, thus suppressing the efficiency rapid drawdown of described LED epitaxial structure;It addition, polar surface and semi-polarity mask have different In content, it is possible to send the light of different wave length, because of without by fluorescent material, being just directly realized by white light emission, be effectively simplified white light parts structure.
As one embodiment of the present of invention, in the present embodiment, the thickness of the first GaN layer 6 is 300nm;The thickness of InGaN layer 7 is 20nm;The thickness of the second GaN layer 8 is 8nm.As the convertible embodiment of the present invention, the thickness of the first GaN layer 6 be 200nm~500nm, InGaN layer 7 thickness be 15nm~25nm, the second GaN layer 8 thickness be 5nm~10nm, all can realize the purpose of the present invention, belong to protection scope of the present invention.
As one embodiment of the present of invention, in the present embodiment, P type GaN layer 9 is the Mg P type GaN layer adulterated, and has the rough surface of nanoscale, and thickness is 150nm.Nanoscale rough surface can effectively reduce the total reflection loss of light, improves the light extraction efficiency of epitaxial structure.As the convertible embodiment of the present invention, described P type GaN layer thickness can also be 100nm~200nm, all can realize the purpose of the present invention, belong to protection scope of the present invention.
As one embodiment of the present of invention, in the present embodiment, the thickness of GaN nucleating layer 2 is 30nm, and in the present embodiment, the thickness of undoped GaN layer 3 is 2500nm, and in the present embodiment, the thickness of N-type GaN layer 4 is 2500nm.Convertible embodiment as the present invention; the thickness of GaN nucleating layer 2 be 15nm~45nm, undoped GaN layer 3 thickness be 2000nm~3000nm, N-type GaN layer 4 thickness be 2000nm~3000nm; all can realize the purpose of the present invention, belong to protection scope of the present invention.
The preparation method of described LED epitaxial structure, as in figure 2 it is shown, comprise the steps:
S1, sequentially form GaN nucleating layer 2, undoped GaN layer 3, N-type GaN layer 4 on substrate 1;As one embodiment of the present of invention, in the present embodiment, the growth temperature of GaN nucleating layer 2 is 520 DEG C~570 DEG C, and thickness is 15nm~45nm;The growth temperature of undoped GaN layer 3 is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm;The growth temperature of N-type GaN layer 4 is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm.
Concrete step is as follows:
S11, by Sapphire Substrate 1 at 1060 DEG C, H2Anneal in atmosphere 300s, and it is carried out nitrogen treatment;
S12, employing TMGa are as gallium source, NH3As nitrogenous source, H2As carrier gas, growth temperature is 520 DEG C-570 DEG C, and growth time is 120s-300s, and chamber pressure is 600mbar, and annealing temperature is 1040 DEG C, and annealing time is 200s-500s, namely grows GaN nucleating layer 2 in Sapphire Substrate 1;
S13, employing TMGa are as gallium source, NH3As nitrogenous source, H2As carrier gas, growth temperature is 1020 DEG C-1070 DEG C, and growth time is 3000s-4500s, and chamber pressure is 600mbar, namely grows undoped GaN layer 3 on GaN nucleating layer 2;
S14, employing TMGa are as gallium source, SiH4As silicon source, NH3As nitrogenous source, H2As carrier gas, growth temperature is 1020 DEG C-1070 DEG C, and growth time is 1500s-3600s, and chamber pressure is 600mbar, namely grows N-type GaN layer 4 in undoped GaN layer 3.
S2, by situ synthesis, N-type GaN layer 4 is formed the SiN with some through nano aperturesxLayer 5;As one embodiment of the present of invention, in the present embodiment, SiNxThe silicon source of layer 5 is SiH4, nitrogenous source is NH4, growth temperature is 800 DEG C~900 DEG C, and growth time is 200s~500s, and chamber pressure is 600mbar, and thickness is 15nm.
S3, at SiNxLayer 5 is formed double heterojunction layer and P type GaN layer 9.
As one embodiment of the present of invention, in the present embodiment, P type GaN layer 9 is the Mg P type GaN layer adulterated, and growth temperature is 900 DEG C~1000 DEG C, and thickness is 100nm.
As one embodiment of the present of invention, in the present embodiment, the preparation process of double heterojunction layer farther includes:
S31, at SiNxDirectly forming the first GaN layer 6 on layer 5, growth temperature is 720 DEG C~800 DEG C, and thickness is 300nm;
S32, in the first GaN layer 6 directly formed InGaN layer 7, growth temperature is 720 DEG C~800 DEG C, and thickness is 20nm;
S33, directly forming the second GaN layer 8 in InGaN layer 7, growth temperature is 720 DEG C~800 DEG C, and thickness is 8nm.
The preparation method of described LED epitaxial structure is simply easily implemented, and not only process costs is low, and can effectively ensure that product yield.
Obviously, above-described embodiment is only for clearly demonstrating example, and is not the restriction to embodiment.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here without also cannot all of embodiment be given exhaustive.And the apparent change thus extended out or variation are still among protection scope of the present invention.

Claims (10)

1. a LED epitaxial structure, including substrate, stacks gradually the GaN nucleating layer, undoped GaN layer, N-type GaN layer, double heterojunction layer and the P type GaN layer that are formed over the substrate;It is characterized in that: also include the SiN being arranged between described N-type GaN layer and described double heterojunction layerxLayer.
2. LED epitaxial structure according to claim 1, it is characterised in that: described SiNxThe thickness of layer is 10nm~20nm;And described SiNxLayer is formed with some through nano apertures.
3. LED epitaxial structure according to claim 1 and 2, it is characterised in that: described double heterojunction layer includes the first GaN layer, InGaN layer and the second GaN layer that stacking is arranged;(0001) polar surface that described InGaN layer includes having nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face.
4. the LED epitaxial structure according to any one of claim 1-3, it is characterized in that: described second GaN layer is arranged near described P type GaN layer, and described second GaN layer (0001) polar surface that includes there is nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face;(0001) polar surface that described first GaN layer includes having nano-scale and/or (11-22) semi-polarity face and/or (11-21) semi-polarity face and/or (10-12) semi-polarity face and/or (10-11) semi-polarity face and/or (11-23) semi-polarity face.
5. the LED epitaxial structure according to any one of claim 1-4, it is characterised in that: the thickness of described first GaN layer be 200nm~500nm, described InGaN layer thickness be 15nm~25nm, described second GaN layer thickness be 5nm~10nm.
6. the LED epitaxial structure according to any one of claim 1-5, it is characterised in that: described P type GaN layer is the P type GaN layer of Mg doping, has the rough surface of nanoscale, and thickness is 100nm~200nm;
The thickness of described GaN nucleating layer be 15nm~45nm, described undoped GaN layer thickness be 2000nm~3000nm, described N-type GaN layer thickness be 2000nm~3000nm.
7. the preparation method of the LED epitaxial structure described in an any one of claim 1-6, it is characterised in that comprise the steps:
S1, on substrate, sequentially form GaN nucleating layer, undoped GaN layer, N-type GaN layer;
S2, described N-type GaN layer is formed there is the SiN of some through nano aperturesxLayer;
S3, at described SiNxLayer is formed double heterojunction layer and P type GaN layer.
8. the preparation method of LED epitaxial structure according to claim 7, it is characterised in that in described step S2, described SiNxThe silicon source of layer is SiH4, nitrogenous source is NH4, growth temperature is 800 DEG C~900 DEG C, and growth time is 200s~500s, and thickness is 10nm~20nm.
9. the preparation method of the LED epitaxial structure according to claim 7 or 8, it is characterised in that in described step S1, the growth temperature of described GaN nucleating layer is 520 DEG C~570 DEG C, and thickness is 15nm~45nm;The growth temperature of described undoped GaN layer is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm;The growth temperature of described N-type GaN layer is 1020 DEG C~1070 DEG C, and thickness is 2000nm~3000nm;In described step S3, described P type GaN layer is the P type GaN layer of Mg doping, and growth temperature is 900 DEG C~1000 DEG C, and thickness is 100nm~200nm.
10. the preparation method of the LED epitaxial structure according to any one of claim 7-9, it is characterised in that in described step S3, the preparation process of described double heterojunction layer farther includes:
S31, at described SiNxDirectly forming the first GaN layer on layer, growth temperature is 720 DEG C~800 DEG C, and thickness is 200nm~500nm;
S32, directly forming InGaN layer in described first GaN layer, growth temperature is 720 DEG C~780 DEG C, and thickness is 15nm~25nm;
S33, directly forming the second GaN layer in described InGaN layer, growth temperature is 800 DEG C~860 DEG C, and thickness is 5nm~10nm.
CN201610128773.7A 2016-03-07 2016-03-07 LED epitaxial structure and preparation method therefor Pending CN105742430A (en)

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