CN105742180A - GaN HEMT器件的制作方法 - Google Patents

GaN HEMT器件的制作方法 Download PDF

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CN105742180A
CN105742180A CN201610141454.XA CN201610141454A CN105742180A CN 105742180 A CN105742180 A CN 105742180A CN 201610141454 A CN201610141454 A CN 201610141454A CN 105742180 A CN105742180 A CN 105742180A
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陈一峰
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Chengdu Hiwafer Technology Co Ltd
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Abstract

本发明提供了一种GaN HEMT器件的制作方法，包括：提供生长衬底并在生长衬底表面涂覆压印胶；将具有纳米图形的压印模板压入压印胶并使压印模板的纳米图形与生长衬底直接接触，以在压印胶上形成与纳米图形相反的压印图形，压印图形为多个凹陷结构；刻蚀露出在凹陷结构内的生长衬底以在生长衬底上形成多个孔洞；去除压印胶，在生长衬底具有孔洞的表面横向生长成核层以及在成核层上形成GaN HEMT器件结构。通过上述方式，本发明能够避免异质外延的横向生长过程中形成孔洞，减少横向生长缺陷。

Description

GaN HEMT器件的制作方法
技术领域
本发明涉及半导体制造技术领域，特别是涉及一种GaNHEMT器件的制作方法。
背景技术
作为宽禁带半导体的典型代表，GaN具有更宽的禁带宽度、更高的饱和电子漂移速度、更大的临界击穿电场强度、更好的导热性能优点特点，更重要的是它与AlGaN能够形成AlGaN/GaN异质结，便于制作HEMT器件。
目前，大面积的GaN衬底仍处于研发状态，GaN器件多生长在Si衬底、蓝宝石衬底和SiC衬底上，异质外延由于晶格常数、热膨胀系数等差异，容易在界面处易形成缺陷，从而影响外延质量，导致器件性能下降。以常用的SiC衬底为例，虽然SiC和GaN均为六方晶系，且晶格常数差异仅有3％，但在异质外延过程中，SiC与GaN生长界面处仍有较多的位错出现，影响GaN器件性能。
2000年以后，图形化衬底逐渐应用于外延中，传统的图形化衬底，尺寸较大，一般在数百纳米到数微米之间，形成的外延下方多有孔洞或部分悬空，不方便芯片背面工艺制作和器件的特殊环境使用：以GaN器件为例，减薄、背孔等工艺需考虑位置、大小等因素；实际应用中需考虑高温、高压等环境因素对器件可靠性的影响。
发明内容
本发明主要解决的技术问题是提供一种GaNHEMT器件的制作方法，能够避免异质外延的横向生长过程中形成孔洞，减少横向生长缺陷。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种GaNHEMT器件的制作方法，包括：提供生长衬底并在所述生长衬底表面涂覆压印胶；将具有纳米图形的压印模板压入压印胶并使所述压印模板的纳米图形与所述生长衬底直接接触，以在所述压印胶上形成与所述纳米图形相反的压印图形，所述压印图形为多个凹陷结构；刻蚀露出在所述凹陷结构内的生长衬底以在所述生长衬底上形成多个孔洞；去除所述压印胶，在所述生长衬底具有孔洞的表面横向生长成核层以及在所述成核层上形成GaNHEMT器件结构。
优选地，所述生长衬底的材料为Si、SiC、蓝宝石或金刚石。
优选地，所述多个孔洞在所述生长衬底上均匀分布，所述孔洞的形状为长方形、正方形或圆形。
优选地，所述孔洞的深度和宽度小于100nm，相邻两个孔洞之间的间隔小于100nm。
优选地，所述成核层的材料为AlyGa1-yN，其中，y的范围为0～1。
优选地，所述GaNHEMT器件结构包括由下自上依次形成的GaN沟道层和AlxGa1-xN势垒层，所述AlxGa1-xN势垒层上形成有栅极、源极和漏极，其中，x的范围为0.1～0.3。
优选地，所述源级和漏极与所述AlxGa1-xN势垒层为欧姆接触，所述栅极与所述AlxGa1-xN势垒层为肖特基接触。
优选地，所述孔洞的刻蚀方式为干法刻蚀或湿法刻蚀。
区别于现有技术的情况，本发明的有益效果是：
1、与传统的图形化衬底相比，图形更小，能有效减少生长缺陷并进一步避免传统图形化衬底在外延过程中引入的孔洞，有利于后续的器件制作和使用；
2、通过在图形化衬底上横向生长成核层，可以形成连续致密的薄膜，较少横向生长缺陷；
3、采用纳米压印技术使衬底图形化，从而在横向生长发生时，衬底图形的底部也生长薄膜，由于图形尺寸较小，不易形成孔洞。
附图说明
图1是本发明实施例GaNHEMT器件的制作方法的流程示意图。
图2是采用本发明实施例半导体器件的制作方法在生长衬底表面涂覆压印胶后的截面示意图。
图3是采用本发明实施例半导体器件的制作方法在压印胶上制作压印图形后的截面示意图。
图4是采用本发明实施例半导体器件的制作方法在生长衬底上刻蚀孔洞后的截面示意图。
图5是采用本发明实施例半导体器件的制作方法去除压印胶后的截面示意图。
图6是采用本发明实施例半导体器件的制作方法横向生长成核层后的截面示意图。
图7是采用本发明实施例半导体器件的制作方法形成GaNHEMT器件结构后的截面示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
参见图1，是本发明实施例GaNHEMT器件的制作方法的流程示意图。本实施例的制作方法包括：
S1：提供生长衬底并在生长衬底表面涂覆压印胶。
其中，生长衬底的材料为Si、SiC、蓝宝石或金刚石，当然，也可以是其他材料。如图2所示，压印胶2倍涂覆于生长衬底1上。
S2：将具有纳米图形的压印模板压入压印胶并使压印模板的纳米图形与生长衬底直接接触，以在压印胶上形成与纳米图形相反的压印图形，压印图形为多个凹陷结构。
其中，纳米图形为多个凸起结构。其中，当压印模板压入压印胶后，可以通过加热使压印胶和压印模板达到玻璃化温度以上，并使压力和温度都保持在适当的水平，通过紫外线曝光或者是改变温度使压印胶上的图形成型固化，之后在一定温度下分离压印模板和压印胶，待压印胶完全固化后其上就出现与纳米图形相反的压印图形。如图3所示，经过压印模板3纳米压印后，压印胶2上形成了与多个凸起结构31相反的多个凹陷结构21，这些凹陷结构21贯穿压印胶2，生长衬底1露出在凹陷结构21中。
S3：刻蚀露出在凹陷结构内的生长衬底以在生长衬底上形成多个孔洞。
其中，孔洞的刻蚀方式可以为干法刻蚀或湿法刻蚀。如图4所示，经过刻蚀后，露出在凹陷结构21内的生长衬底1被刻蚀掉一部分形成孔洞11，而被压印胶2遮挡的部分没有被刻蚀。
S4：去除压印胶，在生长衬底具有孔洞的表面横向生长成核层以及在成核层上形成GaNHEMT器件结构。
其中，如图5所示，去除压印胶2后，生长衬底1上就形成多个孔洞11，这些孔洞11的排列方式与压印模板3上的纳米图形一致，在本实施例中，孔洞11在生长衬底1上均匀分布，孔洞11的形状可以是规则图形，例如为长方形、正方形或圆形，也可以为不规则图形。需要注意的是，本发明并不对孔洞11的分布方式作限定，在其他一些实施例中，孔洞11也可以在生长衬底上非均匀分布。由于压印模板3上的纳米图形尺寸可以达到100nm级别，因此，孔洞11的尺寸很小，在本实施例中，孔洞11的深度和宽度小于100nm，相邻两个孔洞11之间的间隔小于100nm。
如图6所示，成核层4在具有孔洞11的生长衬底1上横向生长形成，成核层4可以采用具有良好横向生长特性的材料，该材料横向生长覆盖孔洞，形成连续薄膜，由于材料与生长衬底1的接触面减小，可以有效地释放接触面由于晶格匹配和热膨胀系数差异造成的应力，降低缺陷密度，形成致密的薄膜。在本实施例中，成核层4的材料为AlyGa1-yN，其中，成核层4的材料为AlyGa1-yN时，y的范围为0～1。
如图7所示，GaNHEMT器件结构形成在成核层4上，最终得到GaNHEMT器件。在本实施例中，GaNHEMT器件结构包括由下自上依次形成的GaN沟道层5和AlxGa1-xN势垒层6，AlxGa1-xN势垒层6上形成有栅极7、源极8和漏极9，其中，x的范围为0.1～0.3。进一步地，源级8和漏极9与AlxGa1-xN势垒层6为欧姆接触，栅极7与AlxGa1-xN势垒层6为肖特基接触。
通过上述方式，本发明实施例的制作方法通过采用纳米压印技术在生长衬底上制作孔洞，并在孔洞上横向生长成核层，从而能够避免异质外延的横向生长过程中形成孔洞，减少横向生长缺陷。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (8)

1.一种GaNHEMT器件的制作方法，其特征在于，包括：
提供生长衬底并在所述生长衬底表面涂覆压印胶；
将具有纳米图形的压印模板压入压印胶并使所述压印模板的纳米图形与所述生长衬底直接接触，以在所述压印胶上形成与所述纳米图形相反的压印图形，所述压印图形为多个凹陷结构；
刻蚀露出在所述凹陷结构内的生长衬底以在所述生长衬底上形成多个孔洞；
去除所述压印胶，在所述生长衬底具有孔洞的表面横向生长成核层以及在所述成核层上形成GaNHEMT器件结构。
2.根据权利要求1所述的GaNHEMT器件的制作方法，其特征在于，所述生长衬底的材料为Si、SiC、蓝宝石或金刚石。
3.根据权利要求1所述的GaNHEMT器件的制作方法，其特征在于，所述多个孔洞在所述生长衬底上均匀分布，所述孔洞的形状为长方形、正方形或圆形。
4.根据权利要求3所述的GaNHEMT器件的制作方法，其特征在于，所述孔洞的深度和宽度小于100nm，相邻两个孔洞之间的间隔小于100nm。
5.根据权利要求1所述的GaNHEMT器件的制作方法，其特征在于，所述成核层的材料为AlyGa1-yN，其中，y的范围为0～1。
6.根据权利要求5所述的GaNHEMT器件的制作方法，其特征在于，所述GaNHEMT器件结构包括由下自上依次形成的GaN沟道层和AlxGa1-xN势垒层，所述AlxGa1-xN势垒层上形成有栅极、源极和漏极，其中，x的范围为0.1～0.3。
7.根据权利要求6所述的GaNHEMT器件的制作方法，其特征在于，所述源级和漏极与所述AlxGa1-xN势垒层为欧姆接触，所述栅极与所述AlxGa1-xN势垒层为肖特基接触。
8.根据权利要求1所述的GaNHEMT器件的制作方法，其特征在于，所述孔洞的刻蚀方式为干法刻蚀或湿法刻蚀。
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