CN105742164A - Preparation method of ordered Sr/Si interface structure - Google Patents

Preparation method of ordered Sr/Si interface structure Download PDF

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Publication number
CN105742164A
CN105742164A CN201610225799.3A CN201610225799A CN105742164A CN 105742164 A CN105742164 A CN 105742164A CN 201610225799 A CN201610225799 A CN 201610225799A CN 105742164 A CN105742164 A CN 105742164A
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silicon chip
preparation
vacuum
orderly
silicon
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CN201610225799.3A
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杜文汉
杨景景
赵宇
张燕
刘珂琴
熊超
朱锡芳
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Changzhou Institute of Technology
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Changzhou Institute of Technology
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    • H01L21/2026

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  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

The invention discloses a preparation method of an ordered Sr/Si interface structure. The method comprises the following steps of cleaning a silicon wafer substrate; depositing a strontium oxide nanometer film on the silicon substrate by a pulsed laser deposition method; and preparing a 2*1-Sr/Si monoatomic layer ordered surface structure. By high-vacuum deposition methods, such as a pulsed laser deposition technology or a radio-frequency magnetron sputtering deposition technology, strontium oxide which is 1nm thick is deposited on the silicon substrate free of an oxidation layer; and then annealing treatment is carried out within a certain temperature range for a certain time period, so that an Sr/Si interface buffer layer with a 2*1 structure is obtained. According to the preparation method disclosed by the invention, through utilization of a pulsed laser deposition coating technology and a strontium oxide material, the equipment cost is reduced; the stability of the raw material is improved; and the 2*1-Sr/Si ordered surface buffer layer structure is obtained through treatment of a subsequent annealing process.

Description

A kind of preparation method of orderly Sr/Si interfacial structure
Technical field
The present invention relates to the preparation method of a kind of orderly Sr/Si interfacial structure, belong to semiconductor components and devices field.
Background technology
Along with the raising of integrated circuit integrated level, the gate insulating layer material SiO in cmos basic cell2Thickness continues thinning, And SiO2Dielectric constant is only 3.9, works as SiO2Thickness be reduced to nanometer scale after, quantum tunneling effect now can occur, lead Cause a large amount of electronics and pass through SiO2Insulating barrier so that leakage current is excessive causes cmos device to lose efficacy.For overcoming this problem, can be by SiO2Insulating barrier replaces to the SrTiO that dielectric constant is 3003, accordingly even when insulating barrier keeps identical physical thickness, use SrTiO3After leakage current can be reduced to use SiO2About the 1/100 of insulating barrier, so that cmos device can stablize work Make.
In order to obtain high-quality SrTiO on a monocrystaline silicon substrate3Thin film, generally uses film deposition rate to be only 1~2nm/h Molecular beam epitaxial growth technology, and at silicon and SrTiO3Between increase monoatomic layer thickness Sr/Si interface cushion, thus Eliminate silicon substrate and SrTiO in subsequent high temperature processes3Middle oxygen reacts the problem bringing decreasing insulating.
In order to obtain the monatomic boundary layer of Sr/Si, generally use molecular beam epitaxial growth technology that Preparation of Metallic Strontium is deposited on non-oxidation layer On silicon substrate.It is known that strontium is as a kind of active metal material, instability is easy to react life with oxygen in an atmosphere Become strontium oxide, it is difficult to preserve;Additionally molecular beam epitaxy technique needs ultrahigh vacuum equipment, expensive.
Summary of the invention
The problems referred to above existed for the preparation method of the monatomic boundary layer of Sr/Si in prior art, the present invention provides a kind of orderly The preparation method of Sr/Si interfacial structure, uses fine vacuum deposition process such as pulsed laser deposition or r. f. magnetron sputtering technology, By in strontium oxide deposition thick for 1nm to the silicon substrate of non-oxidation layer, in certain temperature range, then make annealing treatment certain time, Thus obtain the Sr/Si interface cushion with 2 × 1 structures.
Technical scheme is as follows:
The preparation method of a kind of orderly Sr/Si interfacial structure, comprises the steps:
Step 1: cleaning silicon chip substrate;
Step 2: use pulse laser sediment method deposited oxide strontium nano thin-film on a silicon substrate;
Step 3: the preparation orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
Further, described step 1 comprises the steps:
Step 1-1: use analytical pure acetone ultrasonic cleaning to remove the oils and fats that silicon chip surface exists;
Step 1-2: use ultra-pure water ultrasonic cleaning;
Step 1-3: the silicon chip after above-mentioned two steps are cleaned is put in Fluohydric acid. and soaks, to remove the oxide layer of silicon chip surface, from And obtain non-oxidation layer silicon substrate;
Step 1-4: use ultra-pure water flowing to clean non-oxidation layer silicon chip clean to be removed by remaining hydrogen fluoric acid;
Step 1-5: use high pure nitrogen to dry up silicon chip, and quickly put into vacuum chamber.
Further, described step 2 comprises the steps:
Step 2-1: evacuation so that the base vacuum of vacuum chamber reaches 1.0 × 10-4Pa;
Step 2-2: underlayer temperature controls, temperature range is room temperature~350 DEG C;
Step 2-3: use pulse laser sediment method, target be purity be the strontium oxide ceramic material of 99.9%, heavy on silicon chip Long-pending 0.5~2nm thick strontium oxide nano thin-film;Lasing condition is: optical maser wavelength 266nm, pulse frequency 10Hz, laser energy Density 1~2J/cm, vacuum is 0.05Pa, sedimentation time 10~30 seconds.
Further, described step 3 comprises the steps:
Step 3-1: SrO/Si sample is heated to 550~650 DEG C, vacuum is 1.0 × 10-4Pa;
Step 3-2: keeping 0.5~1 hour at 550~650 DEG C, vacuum is 1.0 × 10-4Pa, in this thermostatic process, oxygen Change oxygen and pasc reaction in strontium and generate gaseous oxidation Asia silicon spilling sample surfaces;
Step 3-3: in vacuum 1.0 × 10-4Under the conditions of Pa, sample is dropped to room temperature, is scanned tunnel microscope and characterizes measurement, Obtain the orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
Further, in step 1-1, the purity of analytical pure acetone is 99%, and the ultrasonic cleaning time is 15 minutes, and silicon chip is electronics The Si (100) of level purity;In step 1-2 and step 1-4, ultrapure resistivity of water is 15 megaohms;In step 1-3, hydrogen fluorine The concentration of acid is 10%, and soak time is 10~30 seconds.
Beneficial effects of the present invention is as follows:
The preparation method of the present invention orderly Sr/Si interfacial structure, by pulsed laser deposition coating technique and the utilization of strontium oxide material, I.e. reduce equipment cost, improve raw-material stability, obtain out further through the process of subsequent annealing process and there is 2 × 1-Sr/Si Orderly surface buffer Rotating fields.
Accompanying drawing explanation
Fig. 1 is the surface scan tunnel microscope picture of the 2 × 1-Sr/Si using the method for the present invention to prepare.
Detailed description of the invention
With embodiment, the present invention is described in further detail below in conjunction with the accompanying drawings.
Embodiment one
The first step: the cleaning of silicon chip substrate:
1, the analytical pure acetone ultrasonic cleaning 15 minutes using purity to be 99% is to remove silicon chip (Si (100), electron level purity) Surface oils and fats that may be present;
2, with 15 megaohms of ultra-pure water ultrasonic cleaning 3 times;
3, the silicon chip after above-mentioned two steps are cleaned is put into immersion 10 seconds in the Fluohydric acid. that concentration is 10%, to remove silicon chip surface Oxide layer, thus obtain non-oxidation layer silicon substrate;
4,15 megaohms of ultra-pure water flowings are used to clean non-oxidation layer silicon chip clean to be removed by remaining hydrogen fluoric acid;
5, use high pure nitrogen to dry up silicon chip, and quickly put into vacuum chamber.
Second step: use pulse laser sediment method deposited oxide strontium nano thin-film on a silicon substrate:
1, evacuation so that the base vacuum of vacuum chamber reaches 1.0 × 10-4Pa;
2, underlayer temperature controls, and temperature is 25 DEG C;
3, use pulse laser sediment method, target be purity be the strontium oxide ceramic material of 99.9%, on silicon chip deposit 0.5 Thick strontium oxide nano thin-film, lasing condition is: optical maser wavelength 266nm, pulse frequency 10Hz, laser energy density 1J/cm, Vacuum is 0.05Pa, sedimentation time 30 seconds.
3rd step: the preparation orderly surface texture of 2 × 1-Sr/Si monoatomic layer:
1, SrO/Si sample being heated to 550 DEG C, vacuum is 1.0 × 10-4Pa;
2, keeping 1h at 550 DEG C, vacuum is 1.0 × 10-4Pa, in this thermostatic process, in strontium oxide, oxygen is raw with pasc reaction Gaseous oxidation Asia silicon is become to overflow sample surfaces;
3, in vacuum 1.0 × 10-4Under the conditions of Pa, sample is dropped to room temperature, be scanned tunnel microscope and characterize measurement, surface Structure is the orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
Embodiment two
The first step: the cleaning of silicon chip substrate:
1, the analytical pure acetone ultrasonic cleaning 15 minutes using purity to be 99% is to remove silicon chip (Si (100), electron level purity) Surface oils and fats that may be present;
2, with 15 megaohms of ultra-pure water ultrasonic cleaning 3 times;
3, by through above-mentioned two steps clean after silicon chip put in the Fluohydric acid. that concentration is 10% soak 20 with remove silicon chip surface oxygen Change layer, thus obtain non-oxidation layer silicon substrate;
4,15 megaohms of ultra-pure water flowings are used to clean non-oxidation layer silicon chip clean to be removed by remaining hydrogen fluoric acid;
5, use high pure nitrogen to dry up silicon chip, and quickly put into vacuum chamber.
Second step: use pulse laser sediment method deposited oxide strontium nano thin-film on a silicon substrate:
1, evacuation so that the base vacuum of vacuum chamber reaches 1.0 × 10-4Pa;
2, underlayer temperature controls, and temperature is 180 DEG C;
3, use pulse laser sediment method, target be purity be the strontium oxide ceramic material of 99.9%, on silicon chip deposit 1.3nm Thick strontium oxide nano thin-film, lasing condition is: optical maser wavelength 266nm, pulse frequency 10Hz, laser energy density 1.5J/cm, Vacuum is 0.05Pa, sedimentation time 20 seconds.
3rd step: the preparation orderly surface texture of 2 × 1-Sr/Si monoatomic layer:
1, SrO/Si sample being heated to 600 DEG C, vacuum is 1.0 × 10-4Pa;
2, keeping 0.7h at 600 DEG C, vacuum is 1.0 × 10-4Pa, in this thermostatic process, oxygen and pasc reaction in strontium oxide Generate gaseous oxidation Asia silicon and overflow sample surfaces;
3, in vacuum 1.0 × 10-4Under the conditions of Pa, sample is dropped to room temperature, be scanned tunnel microscope and characterize measurement, surface Structure is the orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
Embodiment three
The first step: the cleaning of silicon chip substrate:
1, the analytical pure acetone ultrasonic cleaning 15 minutes using purity to be 99% is to remove silicon chip (Si (100), electron level purity) Surface oils and fats that may be present;
2, with 15 megaohms of ultra-pure water ultrasonic cleaning 3 times;
3, the silicon chip after above-mentioned two steps are cleaned is put into immersion 30 seconds in the Fluohydric acid. that concentration is 10%, to remove silicon chip surface Oxide layer, thus obtain non-oxidation layer silicon substrate;
4,15 megaohms of ultra-pure water flowings are used to clean non-oxidation layer silicon chip clean to be removed by remaining hydrogen fluoric acid;
5, use high pure nitrogen to dry up silicon chip, and quickly put into vacuum chamber.
Second step: use pulse laser sediment method deposited oxide strontium nano thin-film on a silicon substrate:
1, evacuation so that the base vacuum of vacuum chamber reaches 1.0 × 10-4Pa;
2, underlayer temperature controls, and temperature is 350 DEG C;
3, use pulse laser sediment method, target be purity be the strontium oxide ceramic material of 99.9%, on silicon chip deposit 2nm Thick strontium oxide nano thin-film, lasing condition is: optical maser wavelength 266nm, pulse frequency 10Hz, laser energy density 2J/cm, Vacuum is 0.05Pa, sedimentation time 5 seconds.
3rd step: the preparation orderly surface texture of 2 × 1-Sr/Si monoatomic layer:
1, SrO/Si sample being heated to 650 DEG C, vacuum is 1.0 × 10-4Pa;
2, keeping 0.5h at 650 DEG C, vacuum is 1.0 × 10-4Pa, in this thermostatic process, oxygen and pasc reaction in strontium oxide Generate gaseous oxidation Asia silicon and overflow sample surfaces;
3, in vacuum 1.0 × 10-4Under the conditions of Pa, sample is dropped to room temperature, be scanned tunnel microscope and characterize measurement, surface Structure is the orderly surface texture of 2 × 1-Sr/Si monoatomic layer shown in Fig. 1.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention.All spirit in the present invention and former Any amendment, equivalent and the improvement etc. made within then, should be included within the scope of the present invention.

Claims (5)

1. a preparation method for orderly Sr/Si interfacial structure, comprises the steps:
Step 1: cleaning silicon chip substrate;
Step 2: use pulse laser sediment method deposited oxide strontium nano thin-film on a silicon substrate;
Step 3: the preparation orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
The preparation method of a kind of orderly Sr/Si interfacial structure the most according to claim 1, it is characterised in that: described step 1 is wrapped Include following steps:
Step 1-1: use analytical pure acetone ultrasonic cleaning to remove the oils and fats that silicon chip surface exists;
Step 1-2: use ultra-pure water ultrasonic cleaning;
Step 1-3: the silicon chip after above-mentioned two steps are cleaned is put in Fluohydric acid. and soaks, to remove the oxide layer of silicon chip surface, from And obtain non-oxidation layer silicon substrate;
Step 1-4: use ultra-pure water flowing to clean non-oxidation layer silicon chip clean to be removed by remaining hydrogen fluoric acid;
Step 1-5: use high pure nitrogen to dry up silicon chip, and quickly put into vacuum chamber.
The preparation method of a kind of orderly Sr/Si interfacial structure the most according to claim 1, it is characterised in that: described step 2 is wrapped Include following steps:
Step 2-1: evacuation so that the base vacuum of vacuum chamber reaches 1.0 × 10-4Pa;
Step 2-2: underlayer temperature controls, temperature range is room temperature~350 DEG C;
Step 2-3: use pulse laser sediment method, target be purity be the strontium oxide ceramic material of 99.9%, heavy on silicon chip Long-pending 0.5~2nm thick strontium oxide nano thin-film;Lasing condition is: optical maser wavelength 266nm, pulse frequency 10Hz, laser energy Density 1~2J/cm, vacuum is 0.05Pa, sedimentation time 10~30 seconds.
The preparation method of a kind of orderly Sr/Si interfacial structure the most according to claim 1, it is characterised in that: described step 3 is wrapped Include following steps:
Step 3-1: SrO/Si sample is heated to 550~650 DEG C, vacuum is 1.0 × 10-4Pa;
Step 3-2: keeping 0.5~1 hour at 550~650 DEG C, vacuum is 1.0 × 10-4Pa, in this thermostatic process, oxygen Change oxygen and pasc reaction in strontium and generate gaseous oxidation Asia silicon spilling sample surfaces;
Step 3-3: in vacuum 1.0 × 10-4Under the conditions of Pa, sample is dropped to room temperature, is scanned tunnel microscope and characterizes measurement, Obtain the orderly surface texture of 2 × 1-Sr/Si monoatomic layer.
The preparation method of a kind of orderly Sr/Si interfacial structure the most according to claim 2, it is characterised in that: in step 1-1, point The purity of analysis pure acetone is 99%, and the ultrasonic cleaning time is 15 minutes, and silicon chip is the Si (100) of electron level purity;Step 1-2 With in step 1-4, ultrapure resistivity of water is 15 megaohms;In step 1-3, the concentration of Fluohydric acid. is 10%, and soak time is 10~30 seconds.
CN201610225799.3A 2016-04-12 2016-04-12 Preparation method of ordered Sr/Si interface structure Pending CN105742164A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106319634A (en) * 2016-09-28 2017-01-11 常州工学院 Preparation method of atomic-scale flat monocrystalline silicon (100) surface
CN106399929A (en) * 2016-09-28 2017-02-15 常州工学院 Preparation method of atomic flat Sr/Si(100)-(2 * 3) reconstruction surface

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US20050263774A1 (en) * 2004-05-25 2005-12-01 Samsung Electronics Co., Ltd Polycrystalline Si thin film structure and fabrication method thereof and method of fabricating TFT using the same
CN101122048A (en) * 2007-04-30 2008-02-13 浙江大学 Epitaxy strontium lead titanate film with LiNiO2 cushioning layer

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106319634A (en) * 2016-09-28 2017-01-11 常州工学院 Preparation method of atomic-scale flat monocrystalline silicon (100) surface
CN106399929A (en) * 2016-09-28 2017-02-15 常州工学院 Preparation method of atomic flat Sr/Si(100)-(2 * 3) reconstruction surface
CN106319634B (en) * 2016-09-28 2018-08-31 常州工学院 A kind of atomically flating monocrystalline silicon(100)The preparation method on surface
CN106399929B (en) * 2016-09-28 2018-10-30 常州工学院 A kind of atomically flating Sr/Si(100)The preparation method on -2 × 3 structure surfaces again

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