CN105720970B - A kind of exclusive or based on FinFET/same to OR circuit - Google Patents

Abstract

The invention discloses a kind of exclusive or based on FinFET/same to OR circuits, including the first FinFET pipes, the 2nd FinFET pipes, the 3rd FinFET pipes, the 4th FinFET pipes, the 5th FinFET pipes and the 6th FinFET pipes, first FinFET is managed and the 4th FinFET pipes are p-type FinFET pipes, and the 2nd FinFET pipes, the 3rd FinFET pipes, the 5th FinFET pipes and the 6th FinFET pipes are N-type FinFET pipes；First FinFET is managed and the 4th FinFET pipes are Low threshold FinFET pipes, 2nd FinFET pipes, the 3rd FinFET pipes, the 5th FinFET pipes and the 6th FinFET pipes are high threshold FinFET pipes, first FinFET is managed and the number of the 4th FinFET pipe fins is 1, and the 2nd FinFET pipes, the 3rd FinFET pipes, the 5th FinFET are managed and the number of the 6th FinFET pipe fins is 2；Advantage is on the basis of with correct logic function, and circuit area, delay, power consumption and power-consumption design are smaller.

Description

A XOR/NOR gate circuit based on FinFET devices

technical field

The invention relates to an XOR/XOR gate circuit, in particular to an XOR/XOR gate circuit based on a FinFET device.

Background technique

The basic logic circuit is the most basic logic circuit in the digital circuit, and the XOR/XOR gate circuit is an indispensable part of the basic logic circuit. The dual-rail logic of differential cascaded voltage switching logic provides differential output, but traditional voltage switching logic still faces the problems of large number of transistors, large power consumption and complex design. With the continuous advancement of VISL technology, the operating speed and power consumption requirements of digital systems continue to increase, and the performance requirements for basic logic units are also more stringent, requiring that basic logic units should have low power consumption and short delay.

As the size of transistors continues to shrink, limited by the short-channel effect and the current manufacturing process, the space for reducing the size of ordinary CMOS transistors is extremely narrowed. When the size of an ordinary CMOS transistor is reduced to below 20nm, the leakage current of the device will increase sharply, resulting in a large leakage power consumption of the circuit. Moreover, the short-channel effect of the circuit becomes more obvious, and the device becomes quite unstable, which greatly limits the improvement of the circuit performance. FinFET tube (Fin Field-Effect Transistor, Fin Field-Effect Transistor) is a new complementary metal oxide semiconductor (CMOS) transistor is a new type of 3D transistor, the channel of the FinFET tube is zero-doped or low-doped The channel is surrounded on three sides by the gate. This special three-dimensional structure enhances the control of the gate to the channel, greatly suppresses the short channel effect, and suppresses the leakage current of the device. FinFET has the advantages of low power consumption and small area, and has gradually become one of the excellent devices to replace ordinary CMOS devices and continue Moore's Law.

In view of this, it is of great significance to design an XOR/XOR gate circuit based on FinFET devices with correct logic function and small circuit area, delay, power consumption and power consumption delay product.

Contents of the invention

The technical problem to be solved by the present invention is to provide a FinFET device-based XOR/XOR gate circuit with small circuit area, delay, power consumption and power consumption delay product on the basis of correct logic function.

The technical solution adopted by the present invention to solve the above technical problems is: an XOR/XOR gate circuit based on FinFET devices, including a first FinFET tube, a second FinFET tube, a third FinFET tube, a fourth FinFET tube, a fifth FinFET tube, The FinFET tube and the sixth FinFET tube, the first FinFET tube and the fourth FinFET tube are all P-type FinFET tubes, the second FinFET tube, the third FinFET tube, the first FinFET tube Both the fifth FinFET tube and the sixth FinFET tube are N-type FinFET tubes; the first FinFET tube and the fourth FinFET tube are low-threshold FinFET tubes, and the second FinFET tube, the The third FinFET tube, the fifth FinFET tube and the sixth FinFET tube are all high-threshold FinFET tubes, and the number of fins in the first FinFET tube and the fourth FinFET tube is 1 , the number of fins of the second FinFET tube, the third FinFET tube, the fifth FinFET tube and the sixth FinFET tube is 2;

The source of the first FinFET and the source of the fourth FinFET are connected to the power supply, the drain of the first FinFET, the drain of the second FinFET, the The drain of the third FinFET tube is connected to the front gate of the fourth FinFET tube and the back gate of the fourth FinFET tube, and its connection terminal is the XOR/NOR gate circuit based on the FinFET device The first output terminal of the XOR/NOR gate circuit based on the FinFET device is used to output the XOR signal, the front gate of the first FinFET tube, the first FinFET tube The back gate of the fifth FinFET, the drain of the fifth FinFET, the drain of the fourth FinFET and the drain of the sixth FinFET are connected, and the connection end is the different terminal of the FinFET-based device. The second output end of the OR/NOR gate circuit, the second output end of the exclusive OR/NOR gate circuit based on the FinFET device is used to output the NOR signal, the front gate of the third FinFET tube and the The front gate of the fifth FinFET tube is connected and its connection end is the first input end of the XOR/NOR gate circuit based on the FinFET device, and the first input end is used to input the first input signal, The back gate of the third FinFET tube is connected to the back gate of the sixth FinFET tube, and its connection terminal is the second input terminal of the XOR/XOR gate circuit based on the FinFET device, and the The second input terminal is used to input the second input signal, the front gate of the second FinFET tube is connected to the front gate of the sixth FinFET tube, and its connection terminal is the XOR/Same of the FinFET-based device The first inverting input terminal of the OR gate circuit, the first inverting input terminal is used to input the inverting signal of the first input signal, the back gate of the second FinFET tube and the fifth FinFET tube The back gate is connected and its connection terminal is the second inverting input terminal of the XOR/NOR gate circuit based on the FinFET device, and the second inverting input terminal is used to input the second inverting input signal, The source of the second FinFET, the third FinFET, the fifth FinFET and the sixth FinFET are all grounded.

The threshold voltages of the first FinFET tube and the fourth FinFET tube are both 0.1V, and the second FinFET tube, the third FinFET tube, the fifth FinFET tube and the The threshold voltages of the sixth FinFETs are all 0.6V.

Compared with the prior art, the present invention has the advantage of including the first FinFET tube, the second FinFET tube, the third FinFET tube, the fourth FinFET tube, the fifth FinFET tube and the sixth FinFET tube, the first FinFET tube and the fourth FinFET tube The FinFET tubes are all P-type FinFET tubes, the second FinFET tube, the third FinFET tube, the fifth FinFET tube and the sixth FinFET tube are all N-type FinFET tubes; the first FinFET tube and the fourth FinFET tube are low-threshold FinFET tubes , the second FinFET tube, the third FinFET tube, the fifth FinFET tube and the sixth FinFET tube are all high-threshold FinFET tubes, the number of fins in the first FinFET tube and the fourth FinFET tube is 1, the second FinFET tube, the sixth FinFET tube The number of fins of the third FinFET tube, the fifth FinFET tube and the sixth FinFET tube is 2; through the first FinFET tube and the fourth FinFET tube, the differential output is realized, and through the second FinFET tube, the third FinFET tube, and the fifth FinFET tube And the sixth FinFET tube realizes the "AND function", which is equivalent to connecting two traditional CMOS tubes in series to reduce the delay of the circuit. The circuit performance is basically the same as that of the traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit, the branch composed of the second FinFET and the third FinFET works alternately with the branch composed of the fifth FinFET and the sixth FinFET , when the front gate and rear gate of the second FinFET respectively input the inversion signal Ab of the first input signal and the inversion signal Bb of the second input signal, when the front gate and rear gate of the third FinFET respectively input the first input Signal A and the second input signal B, the branch output composed of the second FinFET tube and the third FinFET tube is an XOR symbol; when the front gate and the rear gate of the fifth FinFET respectively input the first input signal A and the inversion signal Bb of the second input signal, when the front gate and the rear gate of the sixth FinFET respectively input the first input Signal B and the second input signal reverse signal Ab, the branch output composed of the fifth FinFET tube and the sixth FinFET tube For the same-or symbol, it realizes differential output, eliminates static power consumption, and realizes the same-or and exclusive-or output at the same time. It does not need to add an inverter to obtain the opposite logic output, which further reduces the number of transistors. Based on the correct logic function, the circuit area, delay, power consumption and power delay product are all small.

When the threshold voltages of the first FinFET and the fourth FinFET are both 0.1V, and the threshold voltages of the second FinFET, the third FinFET, the fifth FinFET and the sixth FinFET are all 0.6V, the threshold voltage in the circuit The lower the value, the faster the circuit working speed, but too fast circuit working speed will lead to a significant increase in power consumption. When the threshold voltage is 0.1V and 0.6V, on the basis of ensuring a faster working speed of the circuit, the power consumption will not rise much. obvious.

Description of drawings

Fig. 1 is the circuit diagram of traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit;

Fig. 2 is the circuit diagram of a kind of XOR/NOR gate circuit based on FinFET device of the present invention;

Fig. 3 is the simulated waveform diagram based on the BSIMIMG standard process of the XOR/NOR gate circuit based on the FinFET device of the present invention under the standard voltage (1v);

FIG. 4 is a simulation waveform diagram of the XOR/XOR gate circuit based on the FinFET device of the present invention based on the BSIMIMG standard process at a super-threshold voltage (0.8v).

Detailed ways

The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

Embodiment 1: As shown in FIG. 2, an XOR/XOR gate circuit based on FinFET devices includes a first FinFET tube M1, a second FinFET tube M2, a third FinFET tube M3, a fourth FinFET tube M4, a The fifth FinFET tube M5 and the sixth FinFET tube M6, the first FinFET tube M1 and the fourth FinFET tube M4 are P-type FinFET tubes, the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube The tube M6 is an N-type FinFET tube; the first FinFET tube M1 and the fourth FinFET tube M4 are low-threshold FinFET tubes, the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube M6 Both are high-threshold FinFET tubes, the number of fins of the first FinFET tube M1 and the fourth FinFET tube M4 is 1, the fins of the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube M6 The number of is 2;

Both the source of the first FinFET M1 and the source of the fourth FinFET M4 are connected to the power supply, the drain of the first FinFET M1, the drain of the second FinFET M2, the drain of the third FinFET M3 and the fourth FinFET The front gate of the four FinFET tubes M4 is connected to the back gate of the fourth FinFET tube M4, and its connection terminal is the first output terminal of the XOR/NOR gate circuit based on the FinFET device, and the XOR/NOR gate circuit based on the FinFET device The first output end of the first FinFET is used to output the XOR signal, the front gate of the first FinFET M1, the back gate of the first FinFET M1, the drain of the fifth FinFET M5, the drain of the fourth FinFET M4 and the sixth The drain of the FinFET tube M6 is connected and its connection terminal is the second output terminal of the XOR/NOR gate circuit based on the FinFET device, and the second output terminal of the XOR/NOR gate circuit based on the FinFET device is used to output the same OR signal, the front gate of the third FinFET tube M3 is connected to the front gate of the fifth FinFET tube M5 and its connection terminal is the first input terminal of the XOR/XOR gate circuit based on the FinFET device, and the first input terminal is used to input the An input signal, the back gate of the third FinFET tube M3 is connected to the back gate of the sixth FinFET tube M6 and its connection terminal is the second input terminal of the XOR/XOR gate circuit based on the FinFET device, and the second input terminal is used for Input the second input signal, the front gate of the second FinFET tube M2 is connected to the front gate of the sixth FinFET tube M6 and its connection terminal is the first inverting input terminal of the XOR/XOR gate circuit based on the FinFET device, the first The inverting input terminal is used to input the inverting signal of the first input signal, the back gate of the second FinFET tube M2 is connected to the back gate of the fifth FinFET tube M5, and its connection terminal is an exclusive OR/exclusive OR gate circuit based on FinFET devices The second inverting input terminal, the second inverting input terminal is used to input the second inverting input signal, the source of the second FinFET M2, the source of the third FinFET M3, the source of the fifth FinFET M5 and the source of the sixth FinFET tube M6 are both grounded.

Embodiment 2: As shown in FIG. 2, an XOR/XOR gate circuit based on FinFET devices includes a first FinFET tube M1, a second FinFET tube M2, a third FinFET tube M3, a fourth FinFET tube M4, a The fifth FinFET tube M5 and the sixth FinFET tube M6, the first FinFET tube M1 and the fourth FinFET tube M4 are P-type FinFET tubes, the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube The tube M6 is an N-type FinFET tube; the first FinFET tube M1 and the fourth FinFET tube M4 are low-threshold FinFET tubes, the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube M6 Both are high-threshold FinFET tubes, the number of fins of the first FinFET tube M1 and the fourth FinFET tube M4 is 1, the fins of the second FinFET tube M2, the third FinFET tube M3, the fifth FinFET tube M5 and the sixth FinFET tube M6 The number of is 2;

Both the source of the first FinFET M1 and the source of the fourth FinFET M4 are connected to the power supply, the drain of the first FinFET M1, the drain of the second FinFET M2, the drain of the third FinFET M3 and the fourth FinFET The front gate of the four FinFET tubes M4 is connected to the back gate of the fourth FinFET tube M4, and its connection terminal is the first output terminal of the XOR/NOR gate circuit based on the FinFET device, and the XOR/NOR gate circuit based on the FinFET device The first output end of the first FinFET is used to output the XOR signal, the front gate of the first FinFET M1, the back gate of the first FinFET M1, the drain of the fifth FinFET M5, the drain of the fourth FinFET M4 and the sixth The drain of the FinFET tube M6 is connected and its connection terminal is the second output terminal of the XOR/NOR gate circuit based on the FinFET device, and the second output terminal of the XOR/NOR gate circuit based on the FinFET device is used to output the same OR signal, the front gate of the third FinFET tube M3 is connected to the front gate of the fifth FinFET tube M5 and its connection terminal is the first input terminal of the XOR/XOR gate circuit based on the FinFET device, and the first input terminal is used to input the An input signal, the back gate of the third FinFET tube M3 is connected to the back gate of the sixth FinFET tube M6 and its connection terminal is the second input terminal of the XOR/XOR gate circuit based on the FinFET device, and the second input terminal is used for Input the second input signal, the front gate of the second FinFET tube M2 is connected to the front gate of the sixth FinFET tube M6 and its connection terminal is the first inverting input terminal of the XOR/XOR gate circuit based on the FinFET device, the first The inverting input terminal is used to input the inverting signal of the first input signal, the back gate of the second FinFET tube M2 is connected to the back gate of the fifth FinFET tube M5, and its connection terminal is an exclusive OR/exclusive OR gate circuit based on FinFET devices The second inverting input terminal, the second inverting input terminal is used to input the second inverting input signal, the source of the second FinFET M2, the source of the third FinFET M3, the source of the fifth FinFET M5 and the source of the sixth FinFET tube M6 are both grounded.

In this embodiment, the threshold voltages of the first FinFET M1 and the fourth FinFET M4 are both 0.1V, and the threshold voltages of the second FinFET M2, the third FinFET M3, the fifth FinFET M5 and the sixth FinFET M6 are 0.1V. All 0.6V.

The working principle of an XOR/XOR gate circuit based on FinFET devices of the present invention is: realize differential output through the first FinFET tube and the fourth FinFET tube, and realize differential output through the second FinFET tube, the third FinFET tube, and the fifth FinFET tube And the sixth FinFET tube realizes the "AND function", which is equivalent to connecting two traditional CMOS tubes in series to reduce the delay of the circuit. The circuit performance is basically the same as that of the traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit, the branch composed of the second FinFET and the third FinFET works alternately with the branch composed of the fifth FinFET and the sixth FinFET , when the front gate and rear gate of the second FinFET respectively input the inversion signal Ab of the first input signal and the inversion signal Bb of the second input signal, when the front gate and rear gate of the third FinFET respectively input the first input Signal A and the second input signal B, the branch output composed of the second FinFET tube and the third FinFET tube is an XOR symbol; when the front gate and the rear gate of the fifth FinFET respectively input the first input signal A and the inversion signal Bb of the second input signal, when the front gate and the rear gate of the sixth FinFET respectively input the first input Signal B and the second input signal reverse signal Ab, the branch output composed of the fifth FinFET tube and the sixth FinFET tube For the same-or symbol, it realizes differential output, eliminates static power consumption, and realizes the same-or and exclusive-or output at the same time. It does not need to add an inverter to obtain the opposite logic output, which further reduces the number of transistors. Based on the correct logic function, the circuit area, delay, power consumption and power delay product are all small.

In order to verify the superiority of a kind of XOR/NOR gate circuit based on FinFET devices of the present invention, under the standard technology of BSIMIMG, use the circuit simulation tool HSPICE in the input frequency of the circuit of 100MHz, 400MHz, 800MHz, 1GHz Under the conditions, a kind of XOR/NOR gate circuit based on FinFET device of the present invention, traditional CMOS differential cascade voltage switch logic XOR/NOR gate circuit shown in Fig. 1 (abbreviation traditional XOR/NOR gate circuit) circuit) and BSIMIMG process library based on FinFET devices based on the same gate XOR/NOR gate circuit (referred to as the same gate XOR/Same OR gate circuit), these three kinds of XOR/Same OR gate circuits are simulated and compared and analyzed. The power supply voltage corresponding to the BSIMIMG process library is 1V. Under the standard voltage (1v), the XOR/NOR gate circuit based on the FinFET device of the present invention is based on the simulation waveform diagram of the BSIMIMG standard process as shown in Figure 3. The simulation waveform diagram of the OR/NOR gate circuit based on the BSIMIMG standard process is shown in Figure 4.

In the BSIMIMG standard process, the input frequency is 100MHz under the condition of a kind of XOR/NOR gate circuit based on FinFET device of the present invention, the traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG The same-gate XOR/XOR gate circuit based on FinFET devices in the process library is simulated and compared, and its performance comparison table is shown in Table 1.

When the input frequency of table 1 is 100MHz, in a kind of XOR/NOR gate circuit based on FinFET device of the present invention, traditional CMOS differential cascaded voltage switch logic XOR/NOR gate circuit shown in Fig. 1 and BSIMIMG process library The performance comparison table of the same-gate XOR/XOR gate circuit based on FinFET devices

From Table 1, it can be drawn that the XOR/NOR gate circuit based on FinFET devices of the present invention is similar to the same-gate XOR/NOR gate circuit based on FinFET devices and the DCVSL logic XOR/NOR gate circuit of traditional CMOS. Compared, the number of transistors is reduced by 2, the delay is reduced by 33% and 58% respectively, the average total power consumption is reduced by 15% and increased by 1% respectively, and the power consumption delay product is reduced by 42% and 1% respectively 58%.

In the BSIMIMG standard process, the input frequency is under the condition of 400MHz to a kind of XOR/NOR gate circuit based on FinFET device of the present invention, the traditional CMOS differential cascade voltage switch logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG The same-gate XOR/XOR gate circuit based on FinFET devices in the process library is simulated and compared, and its performance comparison table is shown in Table 2.

Table 2 When the input frequency is 400MHz, a kind of XOR/NOR gate circuit based on FinFET device of the present invention, traditional CMOS differential cascade voltage switch logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG process library The performance comparison table of the same-gate XOR/XOR gate circuit based on FinFET devices

From Table 2, it can be drawn that the XOR/NOR gate circuit based on FinFET devices of the present invention is similar to the same gate XOR/NOR gate circuit based on FinFET devices and the DCVSL logic XOR/NOR gate circuit of traditional CMOS. Compared, the number of transistors is reduced by 2, the delay is reduced by 33% and 58% respectively, the average total power consumption is reduced by 15% and increased by 1%, and the power consumption delay product is reduced by 44% and 58% respectively 60%.

In the BSIMIMG standard process, the input frequency is under the condition of 800MHz to a kind of XOR/NOR gate circuit based on FinFET device of the present invention, the traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG The same-gate XOR/XOR gate circuit based on FinFET devices in the process library is simulated and compared, and its performance comparison table is shown in Table 3.

Table 3 When the input frequency is 800MHz, in a kind of XOR/NOR gate circuit based on FinFET device of the present invention, traditional CMOS differential cascade voltage switch logic XOR/NOR gate circuit shown in FIG. 1 and BSIMIMG process library The performance comparison table of the same-gate XOR/XOR gate circuit based on FinFET devices

From Table 3, it can be drawn that the XOR/NOR gate circuit based on the FinFET device of the present invention is similar to the exclusive OR/NOR gate circuit based on the same gate XOR/NOR gate circuit of the FinFET device and the DCVSL logic XOR/NOR gate circuit of traditional CMOS. Compared, the number of transistors is reduced by 2, the delay is reduced by 33% and 58% respectively, the average total power consumption is reduced by 17% and increased by 1%, and the power consumption delay product is reduced by 44% and 58% respectively 60%.

In the BSIMIMG standard process, the input frequency is 1G under the condition of a kind of XOR/NOR gate circuit based on FinFET device of the present invention, the traditional CMOS differential cascade voltage switching logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG The same-gate XOR/XOR gate circuit based on FinFET devices in the process library is simulated and compared, and its performance comparison table is shown in Table 4.

Table 4 When the input frequency is 1G, in a kind of XOR/NOR gate circuit based on FinFET device of the present invention, traditional CMOS differential cascade voltage switch logic XOR/NOR gate circuit shown in Figure 1 and BSIMIMG process library The performance comparison table of the same-gate XOR/XOR gate circuit based on FinFET devices

From Table 4, it can be drawn that the XOR/NOR gate circuit based on the FinFET device of the present invention is similar to the exclusive OR/NOR gate circuit based on the same gate XOR/NOR gate circuit of the FinFET device and the DCVSL logic XOR/NOR gate circuit of the traditional CMOS. Compared, the number of transistors is reduced by 2, the delay is reduced by 33% and 58% respectively, the average total power consumption is reduced by 21% and increased by 1% respectively, and the power consumption delay product is reduced by 44.5% and 1% respectively 60%.

It can be seen from the above comparison data that, on the basis of having correct logic function and not affecting circuit performance, the XOR/NOR gate circuit based on the FinFET device proposed by the present invention is different from the XOR/NOR gate circuit based on the same gate of the FinFET device. Compared with the traditional CMOS DCVSL logic XOR/XOR gate circuit, the number of transistors is reduced by 2, and the delay, power consumption and power consumption delay product have also been significantly optimized.

Claims (2)

1. An XOR/NOR gate circuit based on FinFET devices, characterized in that it comprises a first FinFET tube, a second FinFET tube, a third FinFET tube, a fourth FinFET tube, a fifth FinFET tube and a sixth FinFET tube, The first FinFET tube and the fourth FinFET tube are all P-type FinFET tubes, and the second FinFET tube, the third FinFET tube, the fifth FinFET tube and the first FinFET tube are all P-type FinFET tubes. The six FinFET tubes are all N-type FinFET tubes; the first FinFET tube and the fourth FinFET tube are low-threshold FinFET tubes, and the second FinFET tube, the third FinFET tube, and the The fifth FinFET tube and the sixth FinFET tube are both high-threshold FinFET tubes, the number of fins in the first FinFET tube and the fourth FinFET tube is 1, and the second FinFET tube , the number of fins of the third FinFET tube, the fifth FinFET tube and the sixth FinFET tube is 2; The source of the first FinFET and the source of the fourth FinFET are connected to the power supply, the drain of the first FinFET, the drain of the second FinFET, the The drain of the third FinFET tube is connected to the front gate of the fourth FinFET tube and the back gate of the fourth FinFET tube, and its connection terminal is the XOR/NOR gate circuit based on the FinFET device The first output terminal of the XOR/NOR gate circuit based on the FinFET device is used to output the XOR signal, the front gate of the first FinFET tube, the first FinFET tube The back gate of the fifth FinFET, the drain of the fifth FinFET, the drain of the fourth FinFET and the drain of the sixth FinFET are connected, and the connection end is the different terminal of the FinFET-based device. The second output end of the OR/NOR gate circuit, the second output end of the exclusive OR/NOR gate circuit based on the FinFET device is used to output the NOR signal, the front gate of the third FinFET tube and the The front gate of the fifth FinFET tube is connected and its connection end is the first input end of the XOR/NOR gate circuit based on the FinFET device, and the first input end is used to input the first input signal, The back gate of the third FinFET tube is connected to the back gate of the sixth FinFET tube, and its connection terminal is the second input terminal of the XOR/XOR gate circuit based on the FinFET device, and the The second input terminal is used to input the second input signal, the front gate of the second FinFET tube is connected to the front gate of the sixth FinFET tube, and its connection terminal is the XOR/Same of the FinFET-based device The first inverting input terminal of the OR gate circuit, the first inverting input terminal is used to input the inverting signal of the first input signal, the back gate of the second FinFET tube and the fifth FinFET tube The back gate is connected and its connection terminal is the second inverting input terminal of the XOR/NOR gate circuit based on the FinFET device, and the second inverting input terminal is used to input the second inverting input signal, The source of the second FinFET, the third FinFET, the fifth FinFET and the sixth FinFET are all grounded. 2. The XOR/XOR gate circuit based on FinFET devices according to claim 1, characterized in that the threshold voltages of the first FinFET and the fourth FinFET are both 0.1V, so The threshold voltages of the second FinFET, the third FinFET, the fifth FinFET and the sixth FinFET are all 0.6V.