CN105718985A - RFID anti-fake circuit - Google Patents

RFID anti-fake circuit Download PDF

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Publication number
CN105718985A
CN105718985A CN201410734726.8A CN201410734726A CN105718985A CN 105718985 A CN105718985 A CN 105718985A CN 201410734726 A CN201410734726 A CN 201410734726A CN 105718985 A CN105718985 A CN 105718985A
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connects
resistance
diode
nmos tube
junction point
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CN201410734726.8A
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CN105718985B (en
Inventor
邸鹏
杨叶飞
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Sichuan kailuwei Technology Co., Ltd
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JIANGSU KILOWAY ELECTRONIC TECHNOLOGY Co Ltd
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Publication of CN105718985A publication Critical patent/CN105718985A/en
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Abstract

The invention discloses an RFID anti-fake circuit, and relates to the RFID technology. The circuit comprises an RFID unit, and is characterized in that the circuit also comprises a static breakdown unit and a detection amplification unit; the static breakdown unit comprises a breakdown NMOS tube, a preposed diode protection circuit, and a postposed diode protection circuit; a PAD end is connected with the grid electrode of the breakdown NMOS tube through the preposed diode protection circuit; the grid electrode of the breakdown NMOS tube is connected with a first output point through the postposed diode protection circuit; the source and drain electrodes of the breakdown NMOS tube are grounded; and a first output point is connected with an RFID unit through a detection amplification unit. The circuit enables a chip to be able to change the internal state through static breakdown, and causes no damage. After static breakdown, the circuit guarantees that the chip cannot be recycled, and also can guarantee that the original tracking information can be read accurately.

Description

The anti-tseudo circuit of RFID
Technical field
The present invention relates to RFID technique.
Background technology
RFID technique and radio RF recognition technology, it it is a kind of non-contacting automatic identification technology, its ultimate principle is the transmission characteristic utilizing radiofrequency signal and Space Coupling (inductance or electromagnetic coupled) or radar reflection, it is achieved the automatic identification to identified object.It is false proof that current RFID chip has begun to for article, for instance High Grade Liquor false proof.In order to prevent fake producer from recycling RFID antifalsification label, usually tamper-evident, frangible technology is utilized to be in due course and destroyed by RFID tag, but RFID chip is recycled after still can being removed label in theory, this is the false proof of a kind of " mechanical damage " mode.Also have the false proof of a kind of " circuit damage " mode, such as Chinese invention patent " utilizing electrostatic breakdown principle to destroy the method for RFID chip in bottle cap " (201210037777.6) discloses a kind of method, directly RFID chip is destroyed by the method for electrostatic breakdown, solve the problem that above-mentioned RFID chip can be recovered.But, RFID chip is once destroyed, and the information of the inside cannot read completely, inconvenience can be formed in some occasion, for instance, verify first and all carry out at place of distributors, when not getting rid of distributors's malicious modification card-reading apparatus, consumer cannot carry out secondary examination voluntarily.
Summary of the invention
The technical problem to be solved be to provide a kind of can the anti-tseudo circuit of RFID of multiple authentication.
This invention address that described technical problem employed technical scheme comprise that, the anti-tseudo circuit of RFID, including RFID unit, it is characterised in that also include electrostatic breakdown unit and detection amplifying unit；
Described electrostatic breakdown unit includes puncturing NMOS tube NM0 and preposition protective circuit of diode, rearmounted protective circuit of diode; PAD end connects the grid puncturing NMOS tube by preposition protective circuit of diode, and the grid puncturing NMOS tube connects the first output point also by rearmounted protective circuit of diode；Puncture source electrode and the grounded drain of NMOS tube；
First output point connects RFID unit by detecting amplifying unit.
Further, described preposition protective circuit of diode includes the first resistance, the second resistance, the 3rd resistance, the first diode, the second diode, the 3rd diode,
First resistance, the second resistance, the 3rd resistance are in sequential series between PAD end and the grid puncturing NMOS tube,
First diode cathode ground connection, negative pole connects PAD end；
Second diode cathode ground connection, negative pole connects the first resistance and the junction point of the second resistance；
3rd diode cathode ground connection, negative pole connects the second resistance and the junction point of the 3rd resistance.
Described rearmounted protective circuit of diode includes the 4th resistance, the 5th resistance, the 6th resistance, the 4th diode, the 5th diode, the 6th diode,
4th resistance, the 5th resistance, the 6th resistance are in sequential series in puncturing between the grid of NMOS tube and the first output point,
4th diode cathode ground connection, negative pole connects the junction point of the 4th resistance and the 5th resistance；
5th diode cathode ground connection, negative pole connects the junction point of the 5th resistance and the 6th resistance；
6th diode cathode ground connection, negative pole connects the first output point.
The invention has the beneficial effects as follows, make chip can pass through electrostatic breakdown and change internal state but be unlikely to damage.After there is electrostatic breakdown, namely guarantee that chip cannot be recycled, can ensure that again original tracing information can be correctly read.The present invention is simple, with low cost, does not destroy RFID chip itself, and namely after generation electrostatic breakdown, the basic function of chip is constant, and simply internal state changes.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of the present invention.
Fig. 2 is the circuit diagram of electrostatic breakdown unit of the present invention.
Fig. 3 is the circuit diagram of the detection amplifying unit of the present invention.
Detailed description of the invention
Referring to Fig. 1～3.
The anti-tseudo circuit of RFID, including RFID unit, also includes electrostatic breakdown unit and detection amplifying unit；
Described electrostatic breakdown unit includes puncturing NMOS tube NM0 and preposition protective circuit of diode, rearmounted protective circuit of diode; PAD end connects the grid puncturing NMOS tube NM0 by preposition protective circuit of diode, and the grid puncturing NMOS tube NM0 connects the first output point P0 also by rearmounted protective circuit of diode；Puncture source electrode and the grounded drain of NMOS tube NM0；
First output point P0 connects RFID unit by detecting amplifying unit.
Described preposition protective circuit of diode includes the first resistance R1, the second resistance R2, the 3rd resistance R3, the first diode D1, the second diode D2, the 3rd diode D3,
First resistance R1, the second resistance R2, the 3rd resistance R3 are in sequential series between PAD end and the grid puncturing NMOS tube NM0,
First diode D1 plus earth, negative pole connects PAD end；
Second diode D2 plus earth, negative pole connects the first resistance R1 and the junction point of the second resistance R2；
3rd diode D3 plus earth, negative pole connects the junction point of the second resistance R2 and the three resistance R3.
Described rearmounted protective circuit of diode includes the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 4th diode D4, the 5th diode D5, the 6th diode D6,
4th resistance R4, the 5th resistance R5, the 6th resistance R6 are in sequential series in puncturing between the grid of NMOS tube NM0 and the first output point P0,
4th diode D4 plus earth, negative pole connects the junction point of the 4th resistance R4 and the five resistance R5；
5th diode D5 plus earth, negative pole connects the junction point of the 5th resistance R5 and the six resistance R6；
6th diode D6 plus earth, negative pole meets the first output point P0.
The structure of described detection amplifying unit is:
The source electrode of the first PMOS PM1 connects UNK end, grid and drain electrode and meets the first junction point P1, BN and terminate the first junction point P1；
The source electrode of the second PMOS PM2 connects UNK end, and grid meets the first junction point P1, and drain electrode meets the second junction point P2；
The grid of the 3rd PMOS PM3 meets the first junction point P1, and source electrode connects UNK end, and drain electrode meets the 3rd junction point P3；
First NMOS tube NM1 grid and drain electrode connect the first junction point P1, source ground；
Second NMOS tube NM2 drain electrode connects the second junction point P2, grid and source ground；
3rd NMOS tube NM3 drain and gate connects the second junction point P2, source ground；
4th NMOS tube NM4 grid connects the second junction point P2, source ground, and drain electrode meets the 3rd junction point P3；
First output point P0 meets the second junction point P2 by resistance R0；
4th PMOS PM4 source electrode and substrate connect vdd terminal, and drain electrode connects the source electrode of the 5th PMOS PM5, and grid meets the 3rd junction point P3；
The substrate of the 5th PMOS PM5 connects vdd terminal, and drain electrode meets the second output point OUT, and grid meets the 3rd junction point P3；
The substrate of the 6th PMOS PM6 connects vdd terminal, grounded drain, and grid meets the second output point OUT, and source electrode connects the drain electrode of the 4th PMOS PM4；
5th NMOS tube NM5 Substrate ground, drain electrode meets the second output point OUT, and grid meets the 3rd junction point P3；Source electrode connects the drain electrode of the 6th NMOS tube NM6；
6th NMOS tube NM6 source electrode and Substrate ground, grid meets the 3rd junction point P3；
The grid of the 7th NMOS tube NM7 meets the second output point OUT, and drain electrode connects vdd terminal, and source electrode connects the source electrode of the 5th NMOS tube PM5, Substrate ground；
Second output point OUT is the detection amplifying unit signal output part to RFID unit.
Described UNK end is the voltage voltage source higher than VDD.
Described BN end is bias voltage source.
The present invention increases an electrostatic breakdown unit in RFID chip.When the external world applies instantaneous electrostatic high-pressure, in this unit there is controlled electrical breakdown in particular electrical circuit, and state generation physical property changes；This unit is connected with digital circuit in chip also by interconnector, and therefore digital circuit may identify which out the state change of electrostatic breakdown device.Whole RFID chip obtains energy by coil and transmits information from the external world, and when extraneous card reader reads the data of particular address in RFID chip by coil, RFID chip is according to the different information of the feedback of status of electrostatic breakdown module.So, as long as there is electrostatic breakdown, RFID just can remember this state the status information returned when card reader reads the data of particular address.
The present invention adds electrostatic breakdown state detecting information in original RFID information, is sent to card reader by coil in radio-frequency card Card Reader process, can reflect in card reader one end that whether this anti-counterfeiting chip is once breakdown.Specific to commodity application, by Card Reader information, consumer not only can know that the production of product is dispatched from the factory information, it is also possible to knows that whether this chip is through reclaiming reprocessing, is effectively prevented the false making behavior that anti-counterfeiting chip is reprocessed.
Description has clearly described the necessary technology content of the present invention, and those of ordinary skill can implement the present invention according to description, therefore repeats no more ins and outs more specifically.

Claims (4)

  1. The anti-tseudo circuit of 1.RFID, including RFID unit, it is characterised in that also include electrostatic breakdown unit and detection amplifying unit；
    Described electrostatic breakdown unit includes puncturing NMOS tube (NM0) and preposition protective circuit of diode, rearmounted protective circuit of diode; PAD end connects the grid puncturing NMOS tube (NM0) by preposition protective circuit of diode, and the grid puncturing NMOS tube (NM0) connects the first output point (P0) also by rearmounted protective circuit of diode；Puncture source electrode and the grounded drain of NMOS tube (NM0)；
    First output point (P0) connects RFID unit by detecting amplifying unit.
  2. 2. the anti-tseudo circuit of RFID as claimed in claim 1; it is characterized in that; described preposition protective circuit of diode includes the first resistance (R1), the second resistance (R2), the 3rd resistance (R3), the first diode (D1), the second diode (D2), the 3rd diode (D3)
    First resistance (R1), the second resistance (R2), the 3rd resistance (R3) are in sequential series between PAD end and the grid puncturing NMOS tube (NM0),
    First diode (D1) plus earth, negative pole connects PAD end；
    Second diode (D2) plus earth, negative pole connects the first resistance (R1) and the junction point of the second resistance (R2)；
    3rd diode (D3) plus earth, negative pole connects the second resistance (R2) and the junction point of the 3rd resistance (R3).
  3. 3. the anti-tseudo circuit of RFID as claimed in claim 1; it is characterized in that; described rearmounted protective circuit of diode includes the 4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6), the 4th diode (D4), the 5th diode (D5), the 6th diode (D6)
    4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6) are in sequential series in puncturing between the grid of NMOS tube (NM0) and the first output point (P0),
    4th diode (D4) plus earth, negative pole connects the junction point of the 4th resistance (R4) and the 5th resistance (R5)；
    5th diode (D5) plus earth, negative pole connects the junction point of the 5th resistance (R5) and the 6th resistance (R6)；
    6th diode (D6) plus earth, negative pole connects the first output point (P0).
  4. 4. the anti-tseudo circuit of RFID as claimed in claim 1, it is characterised in that the structure of described detection amplifying unit is:
    The source electrode of the first PMOS (PM1) connects UNK end, grid and drain electrode and connects the first junction point (P1), and BN terminates the first junction point (P1)；
    The source electrode of the second PMOS (PM2) connects UNK end, and grid connects the first junction point (P1), and drain electrode connects the second junction point (P2)；
    The grid of the 3rd PMOS (PM3) connects the first junction point (P1), and source electrode connects UNK end, and drain electrode connects the 3rd junction point (P3)；
    First NMOS tube (NM1) grid and drain electrode connect the first junction point (P1), source ground；
    Second NMOS tube (NM2) drain electrode connects the second junction point (P2), grid and source ground；
    3rd NMOS tube (NM3) drain and gate connects the second junction point (P2), source ground；
    4th NMOS tube (NM4) grid connects the second junction point (P2), source ground, and drain electrode connects the 3rd junction point (P3)；
    First output point (P0) connects the second junction point (P2) by resistance (R0)；
    4th PMOS (PM4) source electrode and substrate connect vdd terminal, and drain electrode connects the source electrode of the 5th PMOS (PM5), and grid connects the 3rd junction point (P3)；
    The substrate of the 5th PMOS (PM5) connects vdd terminal, and drain electrode meets the second output point OUT, and grid connects the 3rd junction point (P3)；
    The substrate of the 6th PMOS (PM6) connects vdd terminal, grounded drain, and grid meets the second output point OUT, and source electrode connects the drain electrode of the 4th PMOS (PM4)；
    5th NMOS tube (NM5) Substrate ground, drain electrode meets the second output point OUT, and grid connects the 3rd junction point (P3)；Source electrode connects the drain electrode of the 6th NMOS tube (NM6)；
    6th NMOS tube (NM6) source electrode and Substrate ground, grid connects the 3rd junction point (P3)；
    The grid of the 7th NMOS tube (NM7) meets the second output point OUT, and drain electrode connects vdd terminal, and source electrode connects the source electrode of the 5th NMOS tube (PM5), Substrate ground；
    Second output point OUT is the detection amplifying unit signal output part to RFID unit.
CN201410734726.8A 2014-12-04 2014-12-04 The anti-tseudo circuit of RFID Active CN105718985B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410734726.8A CN105718985B (en) 2014-12-04 2014-12-04 The anti-tseudo circuit of RFID

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Application Number Priority Date Filing Date Title
CN201410734726.8A CN105718985B (en) 2014-12-04 2014-12-04 The anti-tseudo circuit of RFID

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CN105718985B CN105718985B (en) 2019-04-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108229631A (en) * 2016-12-22 2018-06-29 Em微电子-马林有限公司 Has the dual communication frequency RFID circuit in anti-tamper circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201194115Y (en) * 2008-04-03 2009-02-11 北京顺特科技有限公司 Friction type radio frequency anti-theft label preventing reusing
CN102439609A (en) * 2009-05-21 2012-05-02 传感电子有限责任公司 Method and system for deactivation of combination eas/rfid tags

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201194115Y (en) * 2008-04-03 2009-02-11 北京顺特科技有限公司 Friction type radio frequency anti-theft label preventing reusing
CN102439609A (en) * 2009-05-21 2012-05-02 传感电子有限责任公司 Method and system for deactivation of combination eas/rfid tags

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108229631A (en) * 2016-12-22 2018-06-29 Em微电子-马林有限公司 Has the dual communication frequency RFID circuit in anti-tamper circuit
CN108229631B (en) * 2016-12-22 2020-10-27 Em微电子-马林有限公司 Dual communication frequency RFID circuit with tamper-resistant loop

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Effective date of registration: 20190312

Address after: 621000 No. 128 Mianxing East Road, Mianyang High-tech Zone, Sichuan Province

Applicant after: Sichuan Kiloway Electron Inc.

Address before: 214434 B3 Floor, Cyberport, Yangtze River Creative Intelligence Industrial Park, 201 Jinshan Road, Jiangyin City, Wuxi City, Jiangsu Province

Applicant before: Jiangsu kiloway Electronic Technology Co., Ltd.

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Effective date of registration: 20191111

Address after: 621000 a412, No.133, mianxing East Road, high tech Zone, Mianyang City, Sichuan Province

Patentee after: Sichuan kailuwei Technology Co., Ltd

Address before: 621000 Sichuan city of Mianyang province high tech Zone Mian Xing Road No. 128

Patentee before: Sichuan Kiloway Electron Inc.