CN105706168B - 用于经由数据掩蔽来降低存储器i/o功率的系统、方法和计算机可读介质 - Google Patents

用于经由数据掩蔽来降低存储器i/o功率的系统、方法和计算机可读介质 Download PDF

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Publication number
CN105706168B
CN105706168B CN201480061437.4A CN201480061437A CN105706168B CN 105706168 B CN105706168 B CN 105706168B CN 201480061437 A CN201480061437 A CN 201480061437A CN 105706168 B CN105706168 B CN 105706168B
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China
Prior art keywords
data masking
state
pin
data
memory
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Expired - Fee Related
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CN201480061437.4A
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English (en)
Chinese (zh)
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CN105706168A (zh
Inventor
H-J·罗
D·全
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G11C7/1009—Data masking during input/output
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3253—Power saving in bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
CN201480061437.4A 2013-11-13 2014-11-13 用于经由数据掩蔽来降低存储器i/o功率的系统、方法和计算机可读介质 Expired - Fee Related CN105706168B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/079,620 2013-11-13
US14/079,620 US9383809B2 (en) 2013-11-13 2013-11-13 System and method for reducing memory I/O power via data masking
PCT/US2014/065356 WO2015073613A1 (en) 2013-11-13 2014-11-13 System and method for reducing memory i/o power via data masking

Publications (2)

Publication Number Publication Date
CN105706168A CN105706168A (zh) 2016-06-22
CN105706168B true CN105706168B (zh) 2018-07-03

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CN201480061437.4A Expired - Fee Related CN105706168B (zh) 2013-11-13 2014-11-13 用于经由数据掩蔽来降低存储器i/o功率的系统、方法和计算机可读介质

Country Status (6)

Country Link
US (1) US9383809B2 (enExample)
EP (1) EP3069345B1 (enExample)
JP (1) JP6363191B2 (enExample)
KR (1) KR20160085779A (enExample)
CN (1) CN105706168B (enExample)
WO (1) WO2015073613A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180335828A1 (en) * 2017-05-19 2018-11-22 Qualcomm Incorporated Systems and methods for reducing memory power consumption via device-specific customization of ddr interface parameters
US10332582B2 (en) 2017-08-02 2019-06-25 Qualcomm Incorporated Partial refresh technique to save memory refresh power
JP7197998B2 (ja) 2018-05-02 2022-12-28 キヤノン株式会社 メモリコントローラおよびメモリコントローラで実施される方法
US10795830B2 (en) 2018-07-20 2020-10-06 Qualcomm Incorporated Write access control for double data rate write-x/datacopy0 commands
CN109388177B (zh) * 2018-10-15 2021-07-27 北京电子工程总体研究所 基于多内核dsp的内核间时序同步方法和数据传输方法
US11150818B2 (en) * 2019-09-11 2021-10-19 International Business Machines Corporation Memory array having power consumption characteristics
CN115565563A (zh) * 2021-07-02 2023-01-03 脸萌有限公司 存储电路、芯片、数据处理方法和电子设备
US11948625B2 (en) 2021-09-09 2024-04-02 Winbond Electronics Corporation Systems on chips, memory circuits, and methods for accessing data in a memory circuit directly using a transistor-level operation signal

Citations (7)

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Publication number Priority date Publication date Assignee Title
US6904506B2 (en) * 2001-03-28 2005-06-07 Via Technologies, Inc. Method and motherboard for automatically determining memory type
CN1983329A (zh) * 2005-12-15 2007-06-20 辉达公司 用于图形存储器集线器的装置、系统和方法
US7359253B2 (en) * 2004-08-30 2008-04-15 Fujitsu Limited Semiconductor memory device with input buffer
US20090196107A1 (en) * 2008-02-05 2009-08-06 Elpida Memory, Inc. Semiconductor device and its memory system
CN101673227A (zh) * 2008-09-11 2010-03-17 英业达股份有限公司 存储器位错误产生装置
CN102282619A (zh) * 2008-11-20 2011-12-14 Ati技术无限责任公司 用以在ddr dram写入期间三态控制未使用数据字节的方法、系统及设备
US20130141990A1 (en) * 2011-11-01 2013-06-06 Renesas Electronics Corporation Memory control device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7830726B2 (en) 2008-09-30 2010-11-09 Seagate Technology Llc Data storage using read-mask-write operation
JP2011170942A (ja) 2010-02-22 2011-09-01 Elpida Memory Inc 半導体装置
JP5398664B2 (ja) 2010-08-13 2014-01-29 ルネサスエレクトロニクス株式会社 半導体メモリ
US8726139B2 (en) * 2011-12-14 2014-05-13 Advanced Micro Devices, Inc. Unified data masking, data poisoning, and data bus inversion signaling

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6904506B2 (en) * 2001-03-28 2005-06-07 Via Technologies, Inc. Method and motherboard for automatically determining memory type
US7359253B2 (en) * 2004-08-30 2008-04-15 Fujitsu Limited Semiconductor memory device with input buffer
CN1983329A (zh) * 2005-12-15 2007-06-20 辉达公司 用于图形存储器集线器的装置、系统和方法
US20090196107A1 (en) * 2008-02-05 2009-08-06 Elpida Memory, Inc. Semiconductor device and its memory system
CN101673227A (zh) * 2008-09-11 2010-03-17 英业达股份有限公司 存储器位错误产生装置
CN102282619A (zh) * 2008-11-20 2011-12-14 Ati技术无限责任公司 用以在ddr dram写入期间三态控制未使用数据字节的方法、系统及设备
US20130141990A1 (en) * 2011-11-01 2013-06-06 Renesas Electronics Corporation Memory control device

Also Published As

Publication number Publication date
CN105706168A (zh) 2016-06-22
KR20160085779A (ko) 2016-07-18
JP6363191B2 (ja) 2018-07-25
EP3069345B1 (en) 2020-07-15
EP3069345A1 (en) 2016-09-21
JP2016537720A (ja) 2016-12-01
WO2015073613A1 (en) 2015-05-21
US9383809B2 (en) 2016-07-05
US20150134989A1 (en) 2015-05-14

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