CN105702713B - Semiconductor structure - Google Patents
Semiconductor structure Download PDFInfo
- Publication number
- CN105702713B CN105702713B CN201410705861.XA CN201410705861A CN105702713B CN 105702713 B CN105702713 B CN 105702713B CN 201410705861 A CN201410705861 A CN 201410705861A CN 105702713 B CN105702713 B CN 105702713B
- Authority
- CN
- China
- Prior art keywords
- grid
- metal part
- semiconductor structure
- metal
- doped region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention discloses a kind of semiconductor structures.Semiconductor structure includes one first doped region, one second doped region, a field oxide, a gate structure and a metal layer.First doped region has a first conductive type.Second doped region is formed in the first doped region, and has the second conductive type relative to the first conductive type.Field oxide is located on the first doped region.Gate structure includes a first grid part and a second grid part, is separated each other, wherein second grid part is located on field oxide, and second grid part is electrically connected to source-side.Metal layer is located on gate structure, and metal layer includes one first metal part and one second metal part, separates each other.
Description
Technical field
The invention relates to a kind of semiconductor structures, and in particular to a kind of half with stable threshold voltage
Conductor structure.
Background technique
Between recent decades, semiconductor industry persistently reduces the size of semiconductor structure, and improve simultaneously rate, efficiency,
The unit cost of density and integrated circuit.For semiconductor element (such as metal-oxide semiconductor (MOS) of high pressure or superelevation press operation
MOS for), when component size diminution, and MOS transistor is under operation with high pressure, it will usually lead to the problem of electrical property efficiency.
Therefore, researcher is dedicated to how research produces stable high-voltage MOS transistor.
Summary of the invention
The invention relates to a kind of semiconductor structures.In embodiment, pass through setting for the gate structure in semiconductor structure
Meter, so that semiconductor structure has stable threshold voltage (threshold voltage).
An embodiment according to the present invention is to propose a kind of semiconductor structure.Semiconductor structure include one first doped region,
One second doped region, a field oxide, a gate structure and a metal layer.First doped region has a first conductive type.The
Two doped regions are formed in the first doped region, and have the second conductive type relative to the first conductive type.Field oxide is located at
On first doped region.Gate structure includes a first grid part and a second grid part, is separated each other, wherein second
Grid part is located on field oxide, and second grid part is electrically connected to source-side.Metal layer is located at gate structure
On, metal layer includes one first metal part and one second metal part, is separated each other.
It according to another embodiment of the present invention, is to propose a kind of semiconductor structure.Semiconductor structure includes a gate structure
An and metal layer.Gate structure includes a first grid part and a second grid part, is separated each other, wherein first
Grid part and second grid part have cyclic structure, and first grid partially surrounds second grid part.Metal layer is located at
On gate structure, metal layer includes one first metal part and one second metal part, is separated each other, wherein second gate
Pole part is to be electrically connected to source-side via the second metal part.
More preferably understand to have to above-mentioned and other aspect of the invention, preferred embodiment is cited below particularly, and cooperates institute
Accompanying drawings are described in detail below:
Detailed description of the invention
Figure 1A is painted the top view of semiconductor structure according to an embodiment of the invention.
Figure 1B is painted the local top view of the semiconductor structure of Figure 1A.
Fig. 1 C is painted cross-sectional view of the semiconductor structure along hatching 1C-1C ' of Figure 1A.
The technique that Fig. 2~Fig. 4 is painted the semiconductor structure of one embodiment of content according to the present invention.
Fig. 5 A is the I-V curve according to the semiconductor structure of one comparative example of the content of present invention.
Fig. 5 B is the I-V curve according to the semiconductor structure of one embodiment of the content of present invention.
【Symbol description】
100:Semiconductor structure
110:Substrate
120:First doped region
130:Second doped region
135:Third doped region
140:Gate structure
141:First grid part
143:Second grid part
150:Field oxide
160:Metal layer
161:First metal part
161a:First C character form structure
161b:2nd C character form structure
163:Second metal part
163a:Peripheral C character form structure
163b:Inner annular structure
165:Third metal part
167:4th metal part
171:First doped electrode area
173:Second doped electrode area
175:Third doped electrode area
177:4th doped electrode area
191a:Push up doped region
191b:Doped layer
193:Dielectric layer
1C-1C':Hatching
D1:First distance
D2,D2':Second distance
G:Gate-voltage source
H:Protrusion peak
I-1,I-2,I-1,II-2:Curve
S:Source terminal
W1:First width
W2:Second width
Specific embodiment
It in an embodiment of the present invention, is to propose a kind of semiconductor structure and its manufacturing method.In embodiment, by partly leading
The design of gate structure in body structure, so that semiconductor structure has stable threshold voltage (threshold voltage).
However, embodiment only to illustrate as example, can't limit the range of the invention to be protected.In addition, the figure in embodiment
Formula is the element for omitting part and wanting, to clearly show that technical characterstic of the invention.
Figure 1A~Fig. 1 C is please referred to, Figure 1A is painted the upper view of the semiconductor structure 100 of one embodiment of content according to the present invention
Figure, Figure 1B are painted the local top view of the semiconductor structure 100 of Figure 1A, and Fig. 1 C is painted the semiconductor structure 100 of Figure 1A along section
The cross-sectional view of line 1C-1C '.
As shown in Figure 1A~Fig. 1 C, semiconductor structure 100 includes one first doped region 120, one second doped region 130, one
Gate structure 140, a field oxide 150 and a metal layer 160.First doped region 120 has a first conductive type.Second doping
Area 130 is formed in the first doped region 120, and has the second conductive type relative to the first conductive type.Field oxide 150
In on the first doped region 120.Gate structure 140 includes a first grid part 141 and a second grid part 143, the first grid
Pole part 141 and second grid part 143 separate each other, and wherein second grid part 143 is located on field oxide 150,
And second grid part 143 is electrically connected to source-side S.Metal layer 160 includes one first metal part 161 and one second
Metal part 163, the first metal part 161 and the second metal part 163 separate each other.
In embodiment, by the design of the gate structure 140 in semiconductor structure 100, wherein the first of gate structure 140
Grid part 141 and second grid part 143 are separated from one another, and 143 electricity of second grid part being located on field oxide 150
Property is connected to source terminal S, and makes semiconductor structure 100 that can have stable threshold voltage (threshold voltage).
In embodiment, as shown in Figure 1A and Fig. 1 C, the second grid part 143 of gate structure 140 is via metal layer 160
The second metal part 163 be electrically connected to source terminal S.
In embodiment, as shown in Figure 1A~Fig. 1 C, the second metal part 163 of metal layer 160 further includes a periphery C font
Structure 163a and inner annular structure a 163b, peripheral C character form structure 163a and inner annular structure 163b electrically connect jointly
It is connected to source terminal S.As shown in Figure 1 C, the second grid part 143 of gate structure 140 is electrically connected to the second metal part
163 inner annular structure 163b.In other words, the second grid part 143 of gate structure 140 is in fact direct contact metal
The inner annular structure 163b of second metal part 163 of layer 160, and it is electrically connected to source terminal S.
In embodiment, as shown in Figure 1 C, the drift region of semiconductor structure 100 is located among the first doped region 120, and field oxygen
Change layer 150 to be located between the second grid part 143 and drift region of gate structure 140.
In embodiment, as shown in Figure 1A~Figure 1B, the first grid part 141 and second grid part of gate structure 140
143 all have cyclic structure, and first grid part 141 is around second grid part 143.
In embodiment, as shown in Figure 1A and Fig. 1 C, the first grid part 141 of gate structure 140 is located at the second doped region
On 130, and first grid part 141 is electrically connected to a gate-voltage source G.
In embodiment, as shown in Figure 1A and Fig. 1 C, the first grid part 141 of gate structure 140 is via metal layer 160
The first metal part 161 be electrically connected to gate-voltage source G.
In embodiment, as shown in Figure 1A~Fig. 1 C, the first metal part 161 of metal layer 160 further includes one the oneth C font
Structure 161a.As shown in Figure 1 C, the first grid part 141 of gate structure 140 is electrically connected to the first metal part 161
First C character form structure 161a.In other words, the first grid part 141 of gate structure 140 is in fact direct contact metal layer
First C character form structure 161a of 160 the first metal part 161, and it is electrically connected to gate-voltage source G.
In embodiment, by the design of the gate structure 140 in semiconductor structure 100, it is especially not only located at field oxidation
Second grid part 143 on layer 150 is electrically connected to source terminal S, the first grid part on the second doped region 130
141 are electrically connected to gate-voltage source G, that is to say, that separated two part of gate structure 140 is respectively connected to source terminal
S and gate-voltage source G, so that semiconductor structure 100 can have stable threshold voltage.
Specifically, reaching electric connection via the metallic circuit that single metal layer 160 is formed in semiconductor structure 100
Effect, traditional gate structure however single metal layer is arranged in pairs or groups is easy to cause similar secondary conducting when applying grid voltage
The phenomenon that, and cause the raising of threshold voltage.According to an embodiment of the invention, passing through the gate structure in semiconductor structure 100
Separated two part of 140 design, gate structure 140 is respectively connected to source terminal S and gate-voltage source G, especially position
Gate-voltage source G is electrically connected in the cyclic annular first grid part 141 in outside and is located at the cyclic annular second grid part of inside
143 are electrically connected to source terminal S, therefore can be to avoid the generation of secondary conducting, and then reduce threshold voltage, reach so that partly leading
Body structure 100 can have the effect of stable threshold voltage.
In embodiment, as shown in Figure 1A~Fig. 1 C, the first grid part 141 of gate structure 140 has one first width
There is one second width W2, the first width W1 and the second width W2 can be for W1, the second grid part 143 of gate structure 140
It is identical or different.
In embodiment, as shown in Figure 1A~Fig. 1 C, the first C character form structure 161a of the first metal part 161 is located at second
Between the peripheral C character form structure 163a and inner annular structure 163b of metal part 163.
In embodiment, as shown in Figure 1A, the first metal part 161 of metal layer 160 further includes one the 2nd C character form structure
161b, twoth C character form structure 161b of second metal part 163 around the first metal part 161.
Specifically, as shown in Figure 1A, in embodiment, the inner annular structure 163b of the second metal part 163 is around the
2nd C character form structure 161b of one metal part 161.
In embodiment, the 2nd C character form structure 161b of the first metal part 161 is by the interior side ring of the second metal part 163
Shape structure 163b is surround, and the 2nd C character form structure 161b of the first metal part 161 is equally electrically connected to gate structure
140 first grid part 141.The 2nd C font in this way, which the first C character form structure 161a of the first metal part 161 arranges in pairs or groups
Structure 161b substantially along gate structure 140 141 distributing position of first grid part and configure, therefore apply grid electricity
When pressure, can substantially uniform conducting first grid part 141 all areas, thus can be improved semiconductor structure 100 dress
The switching speed set.
In embodiment, as shown in Figure 1 C, semiconductor structure 100 more may include that one first doped electrode area 171,1 second is mixed
Strays polar region 173 and a third doped electrode area 175.First doped electrode area 171 is formed in the first doped region 120.Second
Doped electrode area 173 and third doped electrode area 175 are formed in the second doped region 130, wherein 173 He of the second doped electrode area
Third doped electrode area 175 is electrically connected to the second metal part 163 of metal layer 160.
In embodiment, as shown in Figure 1A~Fig. 1 C, metal layer 160 further includes a third metal part 165, third metal portion
Points 165 and first metal part 161 and the second metal part 163 separate each other.As shown in Figure 1 C, third metal part
165 are electrically connected to the first doped electrode area 171.
In embodiment, as shown in Figure 1A~Fig. 1 C, the first grid part 141 and second grid part of gate structure 140
It is separated by a first distance D1 between 143, is separated by one between the first metal part 161 and the second metal part 163 of metal layer 160
Second distance D2, first distance D1 are, for example, to be greater than or equal to second distance D2.
In detail, the second distance being separated by between the first metal part 161 and the second metal part 163 can be first
Between first C character form structure 161a of metal part 161 and the inner annular structure 163b of the second metal part 163 second away from
From D2, it is also possible to the first C character form structure 161a of the first metal part 161 and the peripheral C font knot of the second metal part 163
Second distance D2 ' between structure 163a.First distance D1 is, for example, to be greater than or equal to second distance D2 '.In embodiment, second away from
It can be identical or different from D2 and second distance D2 '.
As shown in Figure 1B~Fig. 1 C, semiconductor structure 100 further includes a substrate 110, a third doped region 135, one top is mixed
Miscellaneous area 191a, a doped layer 191b and one the 4th doped electrode area 177.First doped region 120 and third doped region 135 are formed in
In substrate 110.4th doped electrode area 177 is formed in third doped region 135, and top doped region 191a is formed in the first doped region
In 120, doped layer 191b is formed in the doped region 191a of top.
In embodiment, semiconductor structure 100 further includes dielectric layer 193, and metal layer 160 further includes one the 4th metal part
167.Metal layer 160 via the contact hole in dielectric layer 193 and under dielectric layer 193 element or doped region be electrically connected.
4th metal part 167 is electrically connected to the 4th doped electrode area 177.
In embodiment, the first doped region 120 and doped layer 191b has the first conductive type such as N-conductivity, the first doping
Area 120 is, for example, high pressure N trap (HVNW), and doped layer 191b is, for example, N grades of doping (N-grade implant).Substrate 110,
Two doped regions 130, third doped region 135, third doped electrode area 175, the 4th doped electrode area 177 and top doped region 191a tool
There is the second conductive type such as P conductivity type relative to the first conductive type, substrate 110 is, for example, p-type substrate or p-type extension (P-
epi)。
In one embodiment, semiconductor structure 100 is metal-oxide semiconductor (MOS) device.In this example, the first doping electricity
Polar region 171 and the second doped electrode area 173 have the first conductive type such as N-conductivity.First doped electrode area 171 is to be used as leakage
Pole, the second doped electrode area 173 are used as source electrode.
In another embodiment, semiconductor structure 100 is insulated gate bipolar transistor (IGBT) device.In this example,
First doped electrode area 171 has the second conductive type such as P conductivity type, and the second doped electrode area 173 has the first conductive type example
Such as N-conductivity.First doped electrode area 171 is used as anode, and the second doped electrode area 173 is used as cathode.
The technique that Fig. 2~Fig. 4 is painted the semiconductor structure 100 of one embodiment of content according to the present invention.
As shown in Fig. 2, providing silicon (SOI) on substrate 110 such as block silicon or insulator layer.Formed the first doped region 120 in
In substrate 110.The second doped region 130 is formed in the first doped region 120.Third doped region 135 is formed in substrate 110.One
In embodiment, the first doped region 120 has the first conductive type such as N-conductivity, and all has the second conductive type such as P conductivity type
The second doped region 130 with third doped region 135 be formed simultaneously using same mask.Then, formed top doped region 191a in
In first doped region 120, doped layer 191b is formed in the doped region 191a of top.In embodiment, doped region 191a and doped layer are pushed up
191b is to be utilized respectively different masks to be formed.
As shown in figure 3, forming field oxide 150 on doped layer 191b.Field oxide 150 can more be formed in the first doping
In area 120 and between the second doped region 130 and third doped region 135.Field oxide 150 is not limited to field as shown in Figure 3
Oxide may also comprise other suitable dielectric structures.
Then, as shown in figure 4, forming gate structure 140 on the first doped region 120 and the second doped region 130.Embodiment
In, gate structure 140 may include polysilicon and the metal silicide such as tungsten silicide that is formed on polysilicon, gate structure 140
Clearance wall may include silica such as tetraethoxysilane (Tetraethoxy silane;TEOS).
In embodiment, the manufacturing method of gate structure 140 is for example including following steps:Form polysilicon and metal silicide
Layer, patterns polysilicon and metal silicide layer with mask etch process, to form the first grid part separated
141 then form clearance wall on side wall with second grid part 143.So far gate structure 140 as shown in Figure 4 is formed.
In embodiment, the pattern of above-mentioned gate structure 140 is completed in a mask etch process.
Then, Figure 1A~Fig. 1 C is please referred to, forms the first doped electrode area 171 in the first doped region 120.Form second
Doped electrode area 173 and third doped electrode area 175 are in the second doped region 130.The 4th doped electrode area 177 is formed in third
In doped region 135.In embodiment, the first doped electrode area 171, the second doped electrode area 173, third doped electrode area 175
It is heavy doping with the 4th doped electrode area 177.
Then, Figure 1A~Fig. 1 C figure is please referred to, forms dielectric layer 193 in substrate 110.It is filled using conductive metallic material
The opening (contact hole) of dielectric layer 193 pattern conductive metal material afterwards, to form metal layer 160.Metal layer 160 includes for example
Tungsten, copper, aluminium etc..
Fig. 5 A is according to the I-V curve of the semiconductor structure of one comparative example of the content of present invention, and Fig. 5 B is according in the present invention
Hold the I-V curve of the semiconductor structure 100 of an embodiment.In embodiment, semiconductor structure 100 can be applied to high pressure, super-pressure
The device of (such as 300V~1000V), such as MOS, IGBT and diode.
In Fig. 5 A, curve I-1 indicates that the I-V of the semiconductor structure of the gate structure without the embodiment of the present invention is bent
Line, curve I-2 indicate the once differentiation curve of curve I-1.In Fig. 5 B, curve II-1 indicates that the I-V of semiconductor structure 100 is bent
Line, curve II-2 indicate the once differentiation curve of curve II-1.As shown in Figure 5A, in traditional semiconductor structure, there is single layer
Metal layer but do not have as previous embodiment gate structure 140 when, once differentiation curve (curve I-2) meeting of I-V curve
The phenomenon that because of similar secondary conducting and generate a protrusion peak H, and threshold voltage is caused to be increased to the situation of about 1.73V.
In contrast, as shown in Figure 5 B, according to an embodiment of the invention, the once differentiation curve of the I-V curve of semiconductor structure 100
(curve II-2) does not have any protrusion peak, and its threshold voltage is about 0.9V.
It in other words, can be with according to an embodiment of the invention, by the design of the gate structure 140 in semiconductor structure 100
It avoids that secondary conducting occurs when applying grid voltage, and then reduces threshold voltage, reach so that semiconductor structure 100 can have surely
Determine the effect of threshold voltage.
Although however, it is not to limit the invention in conclusion the present invention has been disclosed as a preferred embodiment.This hair
Bright those of ordinary skill in the art, without departing from the spirit and scope of the present invention, when various changes can be made
With retouching.Therefore, subject to protection scope of the present invention ought be defined depending on appended claims range.
Claims (16)
1. a kind of semiconductor structure, including:
One first doped region has a first conductive type;
One second doped region is formed in first doped region, and has the second conductive type relative to the first conductive type;
One field oxide is located on first doped region;
One gate structure, including a first grid part and a second grid part, separate, wherein the first grid each other
Part is located on second doped region, which is located on the field oxide;And
One metal layer is located on the gate structure, which includes one first metal part and one second metal part, that
This is to separate;
Wherein, the first grid part and the second grid part all have cyclic structure, and the first grid partially surrounds this
Second grid part, cyclic annular first grid part positioned at outside is electrically connected to a gate-voltage source, and is located inside
The cyclic annular second grid part be electrically connected to source-side.
2. semiconductor structure according to claim 1, wherein the second grid part is via second metal part electricity
Property is connected to the source terminal.
3. semiconductor structure according to claim 1, wherein the first grid part is via first metal part electricity
Property is connected to the gate-voltage source.
4. semiconductor structure according to claim 1 further includes a drift region, it is located among first doped region, and should
Field oxide is located between the second grid part and the drift region.
5. semiconductor structure according to claim 1, further includes:
One first doped electrode area is formed in first doped region;And
One second doped electrode area and a third doped electrode area, are formed in second doped region, wherein the second doping electricity
Polar region and the third doped electrode area are electrically connected to second metal part.
6. semiconductor structure according to claim 5, wherein the metal layer further includes a third metal part, third gold
Belong to part and first metal part and second metal part is separated each other, wherein the third metal part electrically connects
It is connected to the first doped electrode area.
7. semiconductor structure according to claim 1, wherein phase between the first grid part and the second grid part
It is separated by a second distance between a first distance, first metal part and second metal part, which is greater than
Or it is equal to the second distance.
8. a kind of semiconductor structure, including:
One gate structure, including a first grid part and a second grid part, separate, wherein the first grid each other
Part and the second grid part have cyclic structure, and the first grid partially surrounds the second grid part;And
One metal layer is located on the gate structure, which includes one first metal part and one second metal part, that
This is to separate, and wherein the second grid part is to be electrically connected to source-side via second metal part.
9. semiconductor structure according to claim 8, wherein the first grid part is via first metal part electricity
Property is connected to a gate-voltage source.
10. semiconductor structure according to claim 8, wherein first metal part includes one the oneth C character form structure.
11. semiconductor structure according to claim 10, wherein second metal part include a periphery C character form structure with
And an inner annular structure, the first C character form structure of first metal part are located at periphery C character form structure and the interior side ring
Between shape structure.
12. semiconductor structure according to claim 8, wherein second metal part include a periphery C character form structure with
And an inner annular structure, wherein periphery C character form structure and the inner annular structure are electrically connected to the source terminal jointly, should
Second grid part is electrically connected to the inner annular structure.
13. semiconductor structure according to claim 8, wherein first metal part includes one the 2nd C character form structure, should
Second metal part is around the 2nd C character form structure.
14. semiconductor structure according to claim 13, wherein second metal part include a periphery C character form structure with
And an inner annular structure, the inner annular structure ring is around the 2nd C character form structure.
15. semiconductor structure according to claim 8, wherein the first grid part has one first width, this second
Grid part has one second width, and first width and second width are identical or different.
16. semiconductor structure according to claim 8, wherein phase between the first grid part and the second grid part
It is separated by a second distance between a first distance, first metal part and second metal part, which is greater than
Or it is equal to the second distance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410705861.XA CN105702713B (en) | 2014-11-28 | 2014-11-28 | Semiconductor structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410705861.XA CN105702713B (en) | 2014-11-28 | 2014-11-28 | Semiconductor structure |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105702713A CN105702713A (en) | 2016-06-22 |
CN105702713B true CN105702713B (en) | 2018-11-16 |
Family
ID=56230277
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410705861.XA Active CN105702713B (en) | 2014-11-28 | 2014-11-28 | Semiconductor structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105702713B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102117807A (en) * | 2010-01-05 | 2011-07-06 | 台湾积体电路制造股份有限公司 | High voltage devices and methods of forming the same |
CN103296067A (en) * | 2012-02-24 | 2013-09-11 | 旺宏电子股份有限公司 | Semiconductor structure and forming method thereof |
CN103887336A (en) * | 2012-12-19 | 2014-06-25 | 旺宏电子股份有限公司 | Semiconductor structure and manufacturing method thereof |
-
2014
- 2014-11-28 CN CN201410705861.XA patent/CN105702713B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102117807A (en) * | 2010-01-05 | 2011-07-06 | 台湾积体电路制造股份有限公司 | High voltage devices and methods of forming the same |
CN103296067A (en) * | 2012-02-24 | 2013-09-11 | 旺宏电子股份有限公司 | Semiconductor structure and forming method thereof |
CN103887336A (en) * | 2012-12-19 | 2014-06-25 | 旺宏电子股份有限公司 | Semiconductor structure and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN105702713A (en) | 2016-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8629513B2 (en) | HV interconnection solution using floating conductors | |
CN105070756B (en) | Super-pressure LDMOS device structure | |
JP6101183B2 (en) | Semiconductor device | |
CN103579313A (en) | Structure for improving breakdown voltages of high-voltage LDMOS device | |
US9923091B2 (en) | Semiconductor device including power MOS transistor | |
CN108091573B (en) | Manufacturing method of shielded gate trench MOSFET ESD structure | |
TW202004921A (en) | Laterally diffused metal oxide semiconductor structure and method for forming same | |
CN102610641B (en) | High-voltage LDMOS (laterally diffused metal oxide semiconductor) device and manufacturing method thereof | |
CN106531777A (en) | Semiconductor device having gate structures and manufacturing method thereof | |
CN106449752A (en) | Semiconductor device | |
CN107342325B (en) | Transverse double-diffusion metal oxide semiconductor device | |
CN102569392A (en) | Laterally diffused metal oxide semiconductor (LDMOS) transistor, layout method and manufacture method | |
CN105702713B (en) | Semiconductor structure | |
CN104201204A (en) | Transverse symmetrical DMOS (double diffusion metal-oxide-semiconductor) pipe and manufacture method thereof | |
US8368390B2 (en) | Vertical hall sensor and method for manufacturing a vertical hall sensor | |
CN103887336B (en) | Semiconductor structure and manufacture method thereof | |
US20140159110A1 (en) | Semiconductor device and operating method for the same | |
US20140175560A1 (en) | Semiconductor structure and method for manufacturing the same | |
CN105990435B (en) | Semiconductor device | |
US8952744B1 (en) | Semiconductor device and operating method for the same | |
TWI509792B (en) | Semiconductor device and operating method for the same | |
TWI429073B (en) | Semiconductor structure and method for forming the same | |
US9059283B1 (en) | Semiconductor structure | |
CN105161546B (en) | high voltage Schottky diode device | |
CN205488136U (en) | Perpendicular electrically conductive integrated electron device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |