CN105702289A - Writing circuit and method of phase change storage - Google Patents
Writing circuit and method of phase change storage Download PDFInfo
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- CN105702289A CN105702289A CN201610087830.1A CN201610087830A CN105702289A CN 105702289 A CN105702289 A CN 105702289A CN 201610087830 A CN201610087830 A CN 201610087830A CN 105702289 A CN105702289 A CN 105702289A
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- 238000006243 chemical reaction Methods 0.000 description 2
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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Abstract
The invention discloses a writing circuit and method of a phase change storage.The circuit comprises: an operating unit, a logic control unit and a voltage regulation feedback unit; the operating unit executes a corresponding writing operation to a phase change storage array basic unit according to a received writing operating signal; the voltage regulation feedback unit selects a threshold voltage corresponding to the writing operating signal and compares to an end voltage, and outputs a switch-off control signal to the logic control unit when the end voltage is higher than the threshold voltage; the logic control unit controls the operating unit to disconnect with the phase change storage array basic unit after receiving the switch-off control signal.Data writing uniformity is maintained for the phase change storage.
Description
Technical field
The present invention relates to phase transition storage correlative technology field, particularly the write circuit of a kind of phase transition storage and wiring method。
Background technology
Phase transition storage, being specially phase change resistor (PCM), to have memory cell size little, non-volatile, have extended cycle life, good stability, low in energy consumption and can embed the advantages such as function is strong, particularly the advantage in the micro of device feature size is especially prominent, and industry is thought and had increasing technical advantage in the near future。Therefore it is considered as one of best solution of non-volatile memory technology of future generation, and in low pressure, low-power consumption, at a high speed, high density and embedded storage aspect hold out broad prospects。
Phase transition storage, mainly by applying different size of special burst, causes that phase-change material regional area produces amorphous state (amorphousstate) and crystalline state (crystallinestate) change because of different temperatures。Amorphous state represents logical one, and crystalline state represents logical zero。
Ordinary circumstance, is called set (Set) by material conversion process from noncrystal to multicrystal, is called replacement (Reset) from polycrystal to non-crystal conversion process。For reset operation, it is only necessary to temperature is risen to the then cooling rapidly of more than fusion temperature and just can reach non-crystal state, be easier comparatively speaking。But for set operation, then need temperature is risen to more than crystallization temperature, below fusion temperature, then crystallisation by cooling slowly。
The method for writing data of current phase transition storage is mainly: adopt write structure to add an electric current or potential pulse on top of the phase change material。Wherein, as seen in figure la and lb, abscissa is the time to the schematic diagram of current impulse, and vertical coordinate is electric current。Fig. 1 a represents replacement (Reset) electric current that write circuit produces, and resets when (Reset) operates and is added into phase-change material so that it is occur crystalline state to amorphous transformation。Fig. 1 b represents set (Set) electric current, does to be added into phase-change material when set (Set) operates so that it is occur amorphous state to the transformation of crystalline state。If phase transition process is correctly completed, then after current impulse terminates, phase-change material maintains the state of correspondence until write operation next time。
Owing to set (Set) operation needs temperature to decline slowly so that the state that phase-change material can reach crystallization reaches low-resistance electrology characteristic, therefore for having certain requirement the fall time of temperature。
Due to phase change memory process deviation and immature, the phase-change material occurrence when high-impedance state and low resistive state is unknown, the write of every secondary data is done set (Set) or resets (Reset) when operating, the resistance that phase transition storage presents is all different, brings uncertainty to write data and reading data。
Summary of the invention
Based on this, it is necessary to for the prior art inaccurate technical problem of phase transition storage write data, it is provided that the write circuit of a kind of phase transition storage and wiring method。
A kind of write circuit of phase transition storage, including: operating unit, logic control element and Voltage Cortrol feedback unit；
Described operating unit, for performing corresponding write operation according to the write operation signal received to the phase change memory array elementary cell including described phase transition storage；
Described Voltage Cortrol feedback unit, for obtaining the terminal voltage of said write operation signal and described phase transition storage, the said write operation corresponding threshold voltage of signal is selected to compare with described terminal voltage, when described terminal voltage is more than described threshold voltage, disconnect switch controlling signal to the output of described logic control element；
Described logic control element, for, after receiving described disconnection switch controlling signal, controlling described operating unit and disconnect with described phase change memory array elementary cell。
A kind of wiring method of phase transition storage, including:
Operating unit output step, including: perform corresponding write operation according to the write operation signal received to the phase change memory array elementary cell including described phase transition storage；
Voltage Feedback step, including: obtain the terminal voltage of write operation signal and described phase transition storage, select the said write operation corresponding threshold voltage of signal to compare with described terminal voltage, and:
When described terminal voltage is more than described threshold voltage, controls described operating unit and disconnect with described phase change memory array elementary cell。
The voltage of phase transition storage is compared with threshold voltage by the present invention by Voltage Cortrol feedback unit, the connection of opening operation unit and phase change memory array elementary cell when the voltage of phase transition storage reaches threshold voltage, thus stopping phase change memory array elementary cell is read operation。Owing to directly detecting the voltage of phase transition storage, therefore when write data, even if the resistance of phase transition storage is uncertain, a phase transition storage fixing magnitude of voltage when amorphous state and crystalline state can be obtained, thus maintaining the concordance of write data。
Accompanying drawing explanation
Current impulse schematic diagram when Fig. 1 a is reset operation；
Current impulse schematic diagram when Fig. 1 b is set operation；
Fig. 2 is the circuit theory diagrams of the write circuit of a kind of phase transition storage of the present invention；
Fig. 3 is the schematic diagram of voltage-regulating circuit in an example；
Fig. 4 is the workflow diagram of the wiring method of a kind of phase transition storage of the present invention；
Fig. 5 is the circuit theory diagrams of logic control element in one embodiment of the invention。
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention will be further described in detail。
It is illustrated in figure 2 the circuit theory diagrams of the write circuit of a kind of phase transition storage of the present invention, including: operating unit 1, logic control element 2 and and Voltage Cortrol feedback unit 4；
Described operating unit 1, for performing corresponding write operation according to the write operation signal received to the phase change memory array elementary cell 3 including described phase transition storage 31；
Described Voltage Cortrol feedback unit 4, for obtaining the terminal voltage of said write operation signal and described phase transition storage, the said write operation corresponding threshold voltage of signal is selected to compare with described terminal voltage, when described terminal voltage is more than described threshold voltage, disconnect switch controlling signal to the output of described logic control element；
Described logic control element 2, for, after receiving described disconnection switch controlling signal, controlling described operating unit 2 and disconnect with described phase change memory array elementary cell 3。
When phase change memory array elementary cell 3 is performed write operation, gate tube 32 gating, phase change memory array elementary cell 3 is performed write operation by operating unit 1, write operation performed by operating unit 1 can adopt existing various write operation mode, for instance the method adding an electric current or potential pulse on top of the phase change material introduced in background technology。Namely operating unit 1 performs write operation can be that operating unit 1 exports reset current, and wherein, the schematic diagram of current impulse is as shown in Figure 1。When phase change memory array elementary cell 3 is performed write operation by operating unit 1, the terminal voltage of the phase transition storage 31 of phase change memory array elementary cell 3 can rise, when the voltage of terminal voltage continues to be increased beyond threshold voltage corresponding with write operation, Voltage Cortrol feedback unit 4 output disconnects switch controlling signal, thus stopping phase change memory array elementary cell 3 is read operation。Therefore so that the terminal voltage of phase transition storage 31 can stably at threshold voltage corresponding with write operation so that every time during write data, a fixing magnitude of voltage can be obtained when amorphous state and crystalline state, thus maintaining the concordance of write data。
Described Voltage Cortrol feedback unit 4 includes: reference voltage output circuit 42 and comparator 41, the outfan of described reference voltage output circuit 42 is connected with the first input end of described comparator 41, second input of described comparator 41 is connected with described phase change memory array elementary cell 3, the outfan of described comparator 41 is connected with described logic control element 2, and described reference voltage output circuit output said write operates corresponding threshold voltage。
In the present embodiment, threshold voltage and the voltage of the phase transition storage 31 of phase change memory array elementary cell 3 that reference voltage output circuit 42 is exported by employing comparator 41 compare, it is ensured that measure accurately。
As an example, the first input end of comparator 41 is positive input terminal, second input of comparator 41 is negative input end, and when the voltage of phase transition storage 31 is greater than or equal to threshold voltage, the outfan output high level of comparator 41 is as disconnecting switch controlling signal。
Wherein in an embodiment:
Said write operation includes set operation and reset operation, described threshold voltage includes setting threshold threshold voltage corresponding with set operation reset threshold voltage corresponding with reset operation, said write operation signal includes set operation signal corresponding with set operation reset operation signal corresponding with reset operation, and described setting threshold threshold voltage is lower than described reset threshold voltage；
Described reference voltage output circuit 42 includes: voltage-regulating circuit 421, setting switch 422 and Resetting Switching 423, described voltage-regulating circuit 421 includes the set reference voltage output end of output setting threshold threshold voltage and the replacement reference voltage output end of output reset threshold voltage, one end of described setting switch 422 is connected with described set reference voltage output end, the other end is connected with the first input end of described comparator 41 as the outfan of described reference voltage output circuit 42, one end of described Resetting Switching 423 is connected with described replacement reference voltage output end, the other end is connected with the first input end of described comparator 41 as the outfan of described reference voltage output circuit 42；When described reference voltage output circuit 42 receives described set operation signal, described setting switch 422 closes, and described Resetting Switching 423 disconnects；
When described reference voltage output circuit 42 receives described reset operation signal, described setting switch 422 disconnects, and described Resetting Switching 423 closes。
Voltage-regulating circuit 421 exports multiple threshold voltage, is controlled the threshold voltage exported by setting switch 422 and Resetting Switching 423。
When phase transition storage 31 is in crystalline state, phase transition storage 31 resistance is relatively low, and now corresponding threshold voltage is chosen as setting threshold threshold voltage Vl；When phase transition storage 31 is in amorphous state, phase transition storage 31 resistance is higher, and corresponding threshold voltage is chosen as reset threshold voltage Vh, wherein Vh > Vl。
The mode of the present embodiment can export different threshold voltages neatly, voltage-regulating circuit 421 can adopt bleeder circuit to realize simply, such as, in the circuit shown in Fig. 3, voltage VCC carries out dividing potential drop by different divider resistances 4211,4212,4213 and draws different outfans 4214,4215,4216 respectively thus obtaining different voltage。
Wherein in an embodiment, described threshold voltage also includes state threshold voltage undetermined, described state threshold voltage undetermined is more than described setting threshold threshold voltage and less than described reset threshold voltage, described reference voltage output circuit 42 also includes: state switch 424 undetermined, described voltage-regulating circuit 421 also includes the state reference voltage output end undetermined of output state threshold voltage undetermined, one end of described state switch undetermined 424 is connected with described state reference voltage output end undetermined, the other end is connected with the first input end of described comparator 41 as the outfan of described reference voltage output circuit 42；
When described reference voltage output circuit 42 is when being not received by described set operation signal and being not received by described reset operation signal, described state switch 424 undetermined closes, and described setting switch 422 disconnects, and described Resetting Switching 423 disconnects；
When receiving described set operation signal or described reset operation signal when described reference voltage output circuit 42, described state switch 424 undetermined disconnects。
Wherein in an embodiment, described logic control element 2, it is additionally operable to receive and controls enabling signal and said write operation signal, when receiving described control enabling signal, then export said write operation signal to described operating unit and described Voltage Cortrol feedback unit。
The present embodiment logic control element 2, only just starts the write operation of phase change memory array elementary cell 3 is controlled, thus improving motility after receiving control enabling signal。
As it is shown in figure 5, wherein in an embodiment, described logic control element 2 includes: the first NAND gate the 21, second NAND gate the 22, the 3rd NAND gate the 23, first phase inverter the 24, second phase inverter the 25, the 3rd phase inverter 26 and field effect transistor 27；
One input of described first NAND gate 21 is connected the described disconnection switch controlling signal of reception with described Voltage Cortrol feedback unit 4, another input receives described control enabling signal, the outfan of described first NAND gate 21 is connected with the input of described first phase inverter 24, the outfan of described first phase inverter 24 is connected with the grid of described field effect transistor 27, and the source electrode of described field effect transistor 27 is connected with described phase change memory array elementary cell；
One input of described second NAND gate 22 receives said write operation signal, another input receives described control enabling signal, the outfan of described second NAND gate 22 is connected with the input of described second phase inverter 25, and the outfan of described second phase inverter 25 is connected output said write operation signal with described operating unit 1；
One input of described 3rd NAND gate 23 receives said write operation signal, another input receives described control enabling signal, the outfan of described 3rd NAND gate 23 is connected with the input of described 3rd phase inverter 26, and the outfan of described 3rd phase inverter 26 is connected output said write operation signal with described Voltage Cortrol feedback unit 4。
Wherein, field effect transistor 27 is controlled by the first NAND gate 21 and the first phase inverter 24 according to the output controlling enabling signal and Voltage Cortrol feedback unit 4, operating unit 1 is controlled by the second NAND gate 22 and the second phase inverter 25 according to control enabling signal and write operation signal, and Voltage Cortrol feedback unit 4 is controlled by the 3rd NAND gate 23 and the 3rd phase inverter 26 according to control enabling signal and write operation signal。
It is illustrated in figure 4 the workflow diagram of the wiring method of a kind of phase transition storage of the present invention, including:
Step S401, including: perform corresponding write operation according to the write operation signal received to the phase change memory array elementary cell including described phase transition storage；
Step S402, including: obtain the terminal voltage of write operation signal and described phase transition storage, select the said write operation corresponding threshold voltage of signal to compare with described terminal voltage, and:
When described terminal voltage is more than described threshold voltage, controls said write operation and disconnect with described phase change memory array elementary cell。
Wherein in an embodiment:
Said write operation includes set operation and reset operation, described threshold voltage includes setting threshold threshold voltage corresponding with set operation reset threshold voltage corresponding with reset operation, said write operation signal includes set operation signal corresponding with set operation reset operation signal corresponding with reset operation, and described setting threshold threshold voltage is lower than described reset threshold voltage；
Described selection threshold voltage corresponding with said write operation signal, specifically includes:
If said write operation signal is described set operation signal, described setting threshold threshold voltage and described terminal voltage is then selected to compare, if said write operation signal is described reset operation signal, then described reset threshold voltage and described terminal voltage is selected to compare。
Wherein in an embodiment, described threshold voltage also includes state threshold voltage undetermined, and described state threshold voltage undetermined is more than described setting threshold threshold voltage and less than described reset threshold voltage；
Described step S402, also includes: when being not received by described set operation signal and being not received by described reset operation signal, then select described state threshold voltage undetermined and described terminal voltage to compare。
Wherein in an embodiment, also include logic control step；
Described logic control step, including: receive and control enabling signal and said write operation signal, when receiving described control enabling signal, then export said write operation signal to described operating unit and described Voltage Cortrol feedback unit。
As highly preferred embodiment of the present invention, Fig. 2 is that the present invention proposes resistance value testing circuit structure as shown in Figure 2, this circuit structure includes: operating unit 1, logic control element 2, phase change memory array elementary cell 3 and Voltage Cortrol feedback unit 4, wherein phase change memory array elementary cell 3 includes phase transition storage 31 and gate tube 32, and phase transition storage 31 is preferably phase change resistor。Voltage feedback circuit 4 includes comparator 41, voltage-regulating circuit 421, setting switch 422, Resetting Switching 423 and state switch 424 undetermined。
Wherein the voltage-regulating circuit 421 of voltage feedback circuit 4 can provide three groups of reference voltages, respectively Vl, Vh, Vref。When being used as set Set operation, when phase transition storage 31 is in crystalline state, phase transition storage 31 resistance is relatively low, and now reference voltage is chosen as Vl；When being used as replacement Reset operation, when phase transition storage 31 is in amorphous state, phase transition storage 31 resistance is higher, and reference voltage is chosen as Vh；When not can determine that making set Set operates or reset Reset operation, reference voltage is Vref。
The physical circuit of logic control element 2 is as it is shown in figure 5, when data write, the Start end of logic control element 2 sends high level。
When being used as set Set operation, the Write end of logic control element 2 sends low level 0, through NAND gate 22 and phase inverter 25 output low level to operating unit 1, operating unit 1 exports Set electric current, in like manner NAND gate 23 and phase inverter 26 output low level are to Voltage Cortrol feedback unit 4, and Voltage Cortrol feedback unit 4 then provides reference voltage Vl；When comparator detects the terminal voltage Vsen0 of phase transition storage 31 more than Vl, the output end vo output high level of comparator 41, with Start signal then through NAND gate 21 and reverser 24, output high level turns off field effect transistor 27, thus stopping write；
When being in like manner used as Reset operation, the Write end of logic control element 2 sends high level, high level is exported to operating unit 1 through NAND gate 22 and phase inverter 25, operating unit 1 exports Reset electric current, NAND gate 23 and phase inverter 26 export high level to Voltage Cortrol feedback unit 4 simultaneously, and Voltage Cortrol feedback unit 4 provides reference voltage Vh；When comparator 41 detects the terminal voltage Vsen0 of phase transition storage 31 more than Vh, the output end vo output high level of comparator 41, with Start signal, then through NAND gate 21 and reverser 24, output high level turns off field effect transistor 27, stops write。
By above operation, fixing voltage reference value can be provided, when no matter doing Set or Reset operation, when detecting voltage more than reference voltage, just write is stopped, thus during each write data, can obtain phase transition storage has a fixed value Rlow corresponding with Vl in amorphous state, a fixed value Rhigh corresponding with Vh is had, thus maintaining the concordance of write data when crystalline state。
Embodiment described above only have expressed the several embodiments of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention。It should be pointed out that, for the person of ordinary skill of the art, without departing from the inventive concept of the premise, it is also possible to making some deformation and improvement, these broadly fall into protection scope of the present invention。Therefore, the protection domain of patent of the present invention should be as the criterion with claims。
Claims (10)
1. the write circuit of a phase transition storage, it is characterised in that including: operating unit, logic control element and Voltage Cortrol feedback unit；
Described operating unit, for performing corresponding write operation according to the write operation signal received to the phase change memory array elementary cell including described phase transition storage；
Described Voltage Cortrol feedback unit, for obtaining the terminal voltage of said write operation signal and described phase transition storage, the said write operation corresponding threshold voltage of signal is selected to compare with described terminal voltage, when described terminal voltage is more than described threshold voltage, disconnect switch controlling signal to the output of described logic control element；
Described logic control element, for, after receiving described disconnection switch controlling signal, controlling described operating unit and disconnect with described phase change memory array elementary cell。
2. write circuit according to claim 1, it is characterized in that, described Voltage Cortrol feedback unit includes: reference voltage output circuit and comparator, the outfan of described reference voltage output circuit is connected with the first input end of described comparator, second input of described comparator is connected with described phase change memory array elementary cell, the outfan of described comparator is connected with described logic control element, described reference voltage output circuit receives said write operation signal, operate the corresponding threshold voltage of signal behavior according to said write to export from the outfan of described reference voltage output circuit。
3. write circuit according to claim 2, it is characterised in that:
Said write operation includes set operation and reset operation, described threshold voltage includes setting threshold threshold voltage corresponding with set operation reset threshold voltage corresponding with reset operation, said write operation signal includes set operation signal corresponding with set operation reset operation signal corresponding with reset operation, and described setting threshold threshold voltage is lower than described reset threshold voltage；
Described reference voltage output circuit includes: voltage-regulating circuit, setting switch and Resetting Switching, described voltage-regulating circuit includes the set reference voltage output end of output setting threshold threshold voltage and the replacement reference voltage output end of output reset threshold voltage, one end of described setting switch is connected with described set reference voltage output end, the other end is connected with the first input end of described comparator as the outfan of described reference voltage output circuit, one end of described Resetting Switching is connected with described replacement reference voltage output end, the other end is connected with the first input end of described comparator as the outfan of described reference voltage output circuit；
When described reference voltage output circuit receives described set operation signal, described setting switch closes, and described Resetting Switching disconnects；
When described reference voltage output circuit receives described reset operation signal, described setting switch disconnects, and described Resetting Switching closes。
4. write circuit according to claim 3, it is characterized in that, described threshold voltage also includes state threshold voltage undetermined, described state threshold voltage undetermined is more than described setting threshold threshold voltage and less than described reset threshold voltage, described reference voltage output circuit also includes: state switch undetermined, described voltage-regulating circuit also includes the state reference voltage output end undetermined of output state threshold voltage undetermined, one end of described state switch undetermined is connected with described state reference voltage output end undetermined, the other end is connected with the first input end of described comparator as the outfan of described reference voltage output circuit；
When described reference voltage output circuit is when being not received by described set operation signal and being not received by described reset operation signal, described state switch Guan Bi undetermined, described setting switch disconnects, and described Resetting Switching disconnects；
When receiving described set operation signal or described reset operation signal when described reference voltage output circuit, described state is undetermined to be switched off。
5. write circuit according to claim 1, it is characterized in that, described logic control element, it is additionally operable to receive and controls enabling signal and said write operation signal, when receiving described control enabling signal, then export said write operation signal to described operating unit and described Voltage Cortrol feedback unit。
6. write circuit according to claim 5, it is characterised in that described logic control element includes: the first NAND gate, the second NAND gate, the 3rd NAND gate, the first phase inverter, the second phase inverter, the 3rd phase inverter and field effect transistor；
One input of described first NAND gate is connected the described disconnection switch controlling signal of reception with described Voltage Cortrol feedback unit, another input receives described control enabling signal, the outfan of described first NAND gate is connected with the input of described first phase inverter, the outfan of described first phase inverter is connected with the grid of described field effect transistor, the drain electrode of described field effect transistor is connected with described operating unit, and the source electrode of described field effect transistor is connected with described phase change memory array elementary cell；
One input of described second NAND gate receives said write operation signal, another input receives described control enabling signal, the outfan of described second NAND gate is connected with the input of described second phase inverter, and the outfan of described second phase inverter is connected output said write operation signal with described operating unit；
One input of described 3rd NAND gate receives said write operation signal, another input receives described control enabling signal, the outfan of described 3rd NAND gate is connected with the input of described 3rd phase inverter, and the outfan of described 3rd phase inverter is connected output said write operation signal with described Voltage Cortrol feedback unit。
7. the wiring method of a phase transition storage, it is characterised in that including:
Operating unit output step, including: perform corresponding write operation according to the write operation signal received to the phase change memory array elementary cell including described phase transition storage；
Voltage Feedback step, including: obtain the terminal voltage of write operation signal and described phase transition storage, select the said write operation corresponding threshold voltage of signal to compare with described terminal voltage, and:
When described terminal voltage is more than described threshold voltage, controls described operating unit and disconnect with described phase change memory array elementary cell。
8. wiring method according to claim 7, it is characterised in that:
Said write operation includes set operation and reset operation, described threshold voltage includes setting threshold threshold voltage corresponding with set operation reset threshold voltage corresponding with reset operation, said write operation signal includes set operation signal corresponding with set operation reset operation signal corresponding with reset operation, and described setting threshold threshold voltage is lower than described reset threshold voltage；
Described selection threshold voltage corresponding with said write operation signal, specifically includes:
If said write operation signal is described set operation signal, described setting threshold threshold voltage and described terminal voltage is then selected to compare, if said write operation signal is described reset operation signal, then described reset threshold voltage and described terminal voltage is selected to compare。
9. wiring method according to claim 8, it is characterised in that described threshold voltage also includes state threshold voltage undetermined, described state threshold voltage undetermined is more than described setting threshold threshold voltage and less than described reset threshold voltage；
Described Voltage Feedback step, also includes: when being not received by described set operation signal and being not received by described reset operation signal, then select described state threshold voltage undetermined and described terminal voltage to compare。
10. wiring method according to claim 7, it is characterised in that also include logic control step；
Described logic control step, including: receive and control enabling signal and said write operation signal, when receiving described control enabling signal, then export said write operation signal to described operating unit and described Voltage Cortrol feedback unit。
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