CN103151072A - Method and device for writing data into phase change memory - Google Patents

Method and device for writing data into phase change memory Download PDF

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CN103151072A
CN103151072A CN2013101054057A CN201310105405A CN103151072A CN 103151072 A CN103151072 A CN 103151072A CN 2013101054057 A CN2013101054057 A CN 2013101054057A CN 201310105405 A CN201310105405 A CN 201310105405A CN 103151072 A CN103151072 A CN 103151072A
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value
data
described
energy loss
target bit
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CN2013101054057A
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CN103151072B (en
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孙健
陈岚
郝晓冉
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中国科学院微电子研究所
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Abstract

The invention discloses a method and a device for writing data into a phase change memory. The method comprises the following steps of: preprocessing a source data as a group of data to be written into a target address of the phase change memory by various different preprocessing modes so as to obtain a plurality of groups of standby data, wherein the digit of each group of the standby data is equal to the digit N of the source data, and the N is a natural number; computing the energy loss value that each group of the alternative data is memorized into the target address to obtain a plurality of energy loss values; and memorizing the standby data which correspond to the minimum energy loss value in the plurality of energy loss values group by the target address. After the method is adopted, the energy loss when the data are written into the phase change memory can be reduced.

Description

The method for writing data of phase transition storage and device

Technical field

The present invention relates to the memory device field, particularly the method for writing data of phase transition storage and device.

Background technology

Phase transition storage PCM(Phase Change Memory) be that (typical material is as Ge take chalcogenide compound 2Sb 2Te 5, GST) be the semiconductor memory on basis.The PCM step-by-step is that unit operates, and utilizes the difference of the resistance of chalcogenide compound between the amorphous state (RESET attitude) of the crystalline state (SET attitude) of low-resistance and high resistant to characterize and stores binary data " 1 " and " 0 ".Keep apart with certain interphase between the so-called homogeneous substance part that has same physical properties in material system that refers to mutually, it and other parts.For example, in the system that is comprised of water and ice, ice is a phase, and water is another phase.Ice becomes the water process and is a phase transition process.

PCM is because fast, non-volatile, the technique of its access speed is simple and high power capacity is regarded as the person of succeeding of flash memory and DRAM (dynamic RAM).

Simultaneously, also there is certain deficiency in PCM, and that is exactly that energy loss when writing the PCM data is larger.The research that energy loss when therefore, reducing to write the PCM data becomes instantly is popular.

Summary of the invention

In view of this, the object of the present invention is to provide method for writing data and the device of phase transition storage, the energy loss when reducing the PCM data writing.

For achieving the above object, the invention provides following technical scheme:

A kind of method for writing data of phase transition storage comprises:

One group of data in will the destination address of recording phase change memory are as source data, adopt multiple different pretreatment mode to carry out pre-service to described source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of described source data, described N is natural number;

Calculate the energy loss value that the alternative data of described each group are stored to described destination address, obtain a plurality of energy loss values;

Make the corresponding alternative data of energy loss value of value minimum in the described a plurality of energy loss values of described destination address storage.

Preferably, in described multiple different pretreatment mode, wherein a kind of pretreatment mode is for carrying out any processing, other pretreatment modes comprise the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode in any one or combination in any.

Preferably, the alternative data of described each group of described calculating are stored to the energy loss value of described destination address, and the process that obtains a plurality of energy loss values comprises:

For arbitrary alternative data, alternative data are compared in the value on the i position in the value on the i position and the current storage data of described destination address, obtain the comparative result that value is identical or value is different, described i is natural number, value and comprises 1 and N between 1 to N;

X target bit as target bit, determined in the comparative result that in described comparative result, value is different corresponding position, and described X is natural number, and value and comprises 1 and N between 1 to N;

Calculate the energy loss value that the value of described alternative data on all target bit is write described destination address relevant position.

Preferably, described alternative data are comprised in the process that the value on the i position compares in the value on the i position and the current storage data of described destination address:

The current storage data of described destination address and described alternative data step-by-step XOR are obtained the XOR result, and the XOR result on the i position is as the comparative result of i position.

Preferably, the value of arbitrary alternative data on each target bit is 0 or 1, and described calculating comprises the process that the value of described alternative data on all target bit writes the energy loss value of described destination address relevant position:

The scale-up factor that setting writes 0 energy loss value and writes 1 energy loss value is a:b;

Statistics value in a described X target bit is the number of 0 target bit, is designated as num0;

Statistics value in a described X target bit is the number of 1 target bit, is designated as num1;

According to formula a *Num0+b *Num1 calculates the energy loss value that the value of alternative data on each target bit is write described destination address relevant position.

Preferably, described method also comprises:

Preserve the reduction mode of the corresponding alternative data of energy loss value of value minimum, so that when reading, will be stored in the corresponding alternative data of energy loss value in described destination address, the value minimum according to the reduction mode of preserving and be reduced into described source data.

A kind of data transfer apparatus of phase transition storage comprises: data preprocessing module, data computation module and data memory module;

Data preprocessing module is used for, one group of data in will the destination address of recording phase change memory are as source data, adopt multiple different pretreatment mode to carry out pre-service to described source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of described source data, described N is natural number;

Data computation module is used for, and calculates the energy loss value that the alternative data of described each group are stored to described destination address, obtains a plurality of energy loss values;

Data memory module is used for, and makes the corresponding alternative data of energy loss value of value minimum in the described a plurality of energy loss values of described destination address storage.

Preferably, described data computation module comprises data comparing unit, target bit generation unit and computing unit;

Described data comparing unit is used for, for arbitrary alternative data, alternative data are compared in the value on the i position in the value on the i position and the current storage data of described destination address, obtain the comparative result that value is identical or value is different, described i is natural number, value and comprises 1 and N between 1 to N;

The target bit generation unit is used for, and X target bit as target bit, determined in the comparative result that in described comparative result, value is different corresponding position, and described X is natural number, and value and comprises 1 and N between 1 to N;

Described computing unit is used for, and calculates the energy loss value that the value of described alternative data on all target bit is write described destination address relevant position.

Preferably, the value of arbitrary alternative data on each target bit is 0 or 1, and described computing unit comprises that subelement, first is set adds up subelement, the second statistics subelement and energy loss value computation subunit;

The described subelement that arranges is used for, and it is a:b that the scale-up factor write 0 energy loss value and to write 1 energy loss value is set;

Described the first statistics subelement is used for, and statistics value in a described X target bit is the number of 0 target bit, and is designated as num0;

Described the second statistics subelement is used for, and statistics value in a described X target bit is the number of 1 target bit, and is designated as num1;

Described energy loss value computation subunit is used for, according to formula a *Num0+b *Num1 calculates the energy loss value that the value of alternative data on each target bit is write described destination address relevant position.

Preferably, described device also comprises recovery module, described recovery module is used for preserving the reduction mode of the minimum corresponding alternative data of energy loss value, so that when reading, will be stored in the corresponding alternative data of energy loss value in described destination address, the value minimum according to the reduction mode of preserving and be reduced into described source data.

Can find out from above-mentioned technical scheme, in embodiments of the present invention, by one group of data in the destination address that will write PCM as source data, source data is carried out multiple pre-service, obtain the alternative data of many groups, calculate respectively the energy loss value that the alternative data of many groups are stored to destination address, obtain a plurality of energy loss values.Make at last the corresponding alternative data of energy loss value of value minimum in a plurality of energy loss values of destination address storage, thus the energy loss when having reduced the PCM data writing.

Description of drawings

In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or description of the Prior Art, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.

Fig. 1 is the method for writing data process flow diagram of the phase transition storage that provides of the embodiment of the present invention;

Fig. 2 is the another process flow diagram of the method for writing data of the phase transition storage that provides of the embodiment of the present invention;

Fig. 3 is the data transfer apparatus structural drawing of the phase transition storage that provides of the embodiment of the present invention;

Fig. 4 is the another structural drawing of the data transfer apparatus of the phase transition storage that provides of the embodiment of the present invention;

Fig. 5 is another structural drawing of the data transfer apparatus of the phase transition storage that provides of the embodiment of the present invention.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.

The invention discloses a kind of phase transition storage PCM(Phase Change Memory) method for writing data, as shown in Figure 1, the method comprises the following steps at least:

S1: will write one group of data in the destination address of PCM as source data, adopt multiple different pretreatment mode to carry out pre-service to source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of source data, wherein N is natural number;

More specifically, source data can be denoted as writedata[N], multiple different pretreatment mode can be denoted as the different pretreatment mode of M+1 kind.For to writedata[N] carry out the pre-service of M+1 kind and the alternative data of M+1 group that obtain, can be the alternative data allocations M+1 of this a M+1 group register, like this, follow-uply can organize alternative data to M+1 and carry out parallel processing, thereby improve processing speed.

In above-mentioned M+1 kind pretreatment mode, wherein " 1 " is expressed as not to writedata[N] carry out any processing, other " M " plant pretreatment mode can comprise the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode etc. in any one or combination in any.

For example, when M=1, to writedata[N] carry out two kinds of pre-service, a kind of for not to writedata[N] carry out any processing, also, make writedata[N] directly as alternative data.Another pretreatment mode can be the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode.

Certainly, also can with the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and the processing mode that obtains of cyclic shift mode combination in any, as above-mentioned another pretreatment mode.Such as, to writedata[N] the step-by-step negate obtains writedata[N] -1(subscript-1 expression step-by-step negate), then with writedata[N] -1Obtain writedata[N with data-oriented step-by-step XOR] -1XOR(subscript XOR represents the step-by-step XOR) is with writedata[N] -1XORAs alternative data.

When M=2, except making writedata[N] directly as alternative data, to writedata[N] carry out another two kinds of pre-service---pre-service A and pre-service B, pre-service A can be the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode etc. in any one, perhaps, also can for by the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode carry out the resulting pretreatment mode of combination in any; And pre-service B can be equally the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode etc. in any one, perhaps, also can for by the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode carry out the resulting pretreatment mode of combination in any.As long as guarantee that pre-service A is different from pre-service B.

By that analogy, can derive a variety of pretreatment modes, as long as guarantee that each pretreatment mode is differing from each other.

S2: calculate the energy loss value that the alternative data of each group are stored to destination address, obtain a plurality of energy loss values;

S3: the corresponding alternative data of energy loss value that make value minimum in a plurality of energy loss values of destination address storage.

Therefore, in embodiments of the present invention, by one group of data in the destination address that will write PCM as source data, source data is carried out multiple pre-service, obtain the alternative data of many groups, calculate respectively the energy loss value that the alternative data of many groups are stored to destination address, obtain a plurality of energy loss values.Make at last the corresponding alternative data of energy loss value of value minimum in a plurality of energy loss values of destination address storage, thus the energy loss when having reduced the PCM data writing.

In other embodiment of the present invention, in above-mentioned all embodiment, step S2 specifically can have multiple implementation.Wherein a kind of implementation can be: for the alternative data of j group (j is natural number, value between 1 to M+1, and comprise 1 and M+1), calculate its energy loss value and be specially:

The scale-up factor that setting writes 0 energy loss value and writes 1 energy loss value is a:b;

Add up value in the alternative data of j group and be 0 number, be designated as n0;

Add up value in the alternative data of j group and be 1 number, be designated as n1;

According to formula a *N0+b *N1 calculates the energy loss value that the N bit data in the alternative data of j group is all write destination address.

Corresponding with it, step S3 can be refined as: the N bit data of the alternative data of energy loss value minimum is all write in destination address.

Another implementation of above-mentioned steps S2 can be:

One, read in advance current storage data readdata[N from destination address];

Two, calculate the energy loss value that the alternative data of each group write destination address;

For the alternative data of j group (j is natural number, value between 1 to M+1, and comprise 1 and M+1), its write destination address energy loss value can by following step calculating (with j from 1 to

M+1 is value successively, can obtain M+1 energy loss value):

Steps A, the alternative data of j group are compared in the value on the i position in the value on the i position and the current storage data of described destination address, obtain the comparative result that value is identical or value is different, i is natural number, value and comprises 1 and N between 1 to N;

Concrete, the alternative data of j group can be denoted as W j[N] can be denoted as W with the i position of the alternative data of j group j[i] can be with the value W of the alternative data of j group on the i position j[i] and the current storage data of the destination address value readdata[i on the i position] whether identical comparative result is denoted as B j[i].

With readdata[N] at i position value readdata[i] and W j[i] compares, and obtains j group alternative data and readdata[N] value on the i position identical comparative result B whether j[i] (i is natural number, and value is between 1 to N), and B jThe value of [i] can be c or d, and c is not identical with the value of d, represents readdata[i when value is c] and W j[i] value is identical, represents readdata[i when value is d] and W j[i] value is not identical.

In other embodiment of the present invention, above-mentioned steps A can be further refined as:

The current storage data of destination address and alternative data step-by-step XOR are obtained the XOR result, and the XOR result on the i position is as the comparative result of i position; Concrete, with readdata[N] and j organize alternative data and carry out the step-by-step XOR, also, with readdata[i] and W j[i] carries out XOR, obtains XOR result (each all corresponding an XOR result), with the XOR result on the i position as above-mentioned comparative result B j[i], at this moment, the concrete value of above-mentioned c is 0 and the concrete value of above-mentioned d to be 1(0 represent alternative data of j group are identical in the value of i position in the value of i position and the current storage data of destination address, and 1 to represent that j organizes alternative data not identical in the value of i position in the value of i position and the current storage data of destination address).

By way of example, suppose N=8, readdata[N] everybody concrete value is respectively: 11110000, and the 1st group of everybody concrete value of alternative data is respectively: 01000111.The XOR result of carrying out step-by-step XOR gained is also that comparative result is: 10110111, and be also B 1[1]=1, B 1[2]=0, B 1[3]=1, B 1[4]=1, B 1[5]=0, B 1[6]=1, B 1[7]=1, B 1[8]=1.

In addition, also can be with readdata[N] and the 1st group of alternative data carry out step-by-step with or, with the same or result on the i position as above-mentioned comparative result B j[i], at this moment, the concrete value of above-mentioned c is 1 and the concrete value of above-mentioned d to be 0(1 represent alternative data of j group are identical in the value of i position in the value of i position and the current storage data of destination address, and 0 to represent that j organizes alternative data not identical in the value of i position in the value of i position and the current storage data of destination address).

Step B, X target bit determined as target bit in the comparative result that value in comparative result is different corresponding position, and X is natural number, and value and comprises 1 and N between 1 to N;

Concrete, with B j[1] to B jIn [N] each value be the comparative result of d corresponding position as target bit, determine X target bit (X is natural number, and value is between 1 to N);

Continue to use aforementioned given example, according to comparative result 10110111, can determine B 1[1], B 1[3], B 1[4], B 1[6], B 1[7], B 1[8] corresponding 6 is target bit, at this moment X=6.

Step C calculates the energy loss value that the value of the j alternative data of group on all target bit is write the destination address relevant position.

More specifically, because each value of source data is 0 or 1, and pre-service is all binary translation, so the value of arbitrary alternative data on each target bit that is obtained by pre-service is 0 or 1, referring to Fig. 2, above-mentioned steps C specifically can comprise the steps:

S201: it is a:b that the scale-up factor write 0 energy loss value and to write 1 energy loss value is set;

Concrete, the value of a:b is determined by the design parameter of PCM, can obtain from PCM supplier and academic documents.For example: writing 0 energy loss value in A Low Power Phase Change Random Access Memory Using a Data-Comparison Write Scheme is 12nJ/bit, write 1 energy loss value for being 64nJ/bit, so a:b can be approximated to be 1:5.

S202: statistics value in X target bit is the number of 0 target bit, is designated as num0;

S203: statistics value in X target bit is the number of 1 target bit, is designated as num1;

S204: according to formula a *Num0+b *Num1 calculates the energy loss value that the value of the j alternative data of group on all target bit is write the destination address relevant position.

Still continue to use aforementioned given example, frontly address, B 1[1], B 1[3], B 1[4], B 1[6], B 1[7], B 1[8] corresponding 6 is target bit.In step S202, will add up the 1st group of alternative data 01 000 111The 1st, 3,4,6,7,8(1,3,4,6,7,8 is 6 target bit) value is 1 number on the position.As can be known, value is that 1 number is 3.In like manner, in step S203, can count 01 000 111Value is that 0 number is 3 on the 1st, 3,4,6,7,8.Then, according to formula a *Num0+b *It is 3a+3b that num1 can calculate the energy loss value that the value of the 1st group of alternative data on all target bit write the destination address relevant position.

Correspondingly, step S3 can be refined as: determine the corresponding alternative data of energy loss value of value minimum in M+1 energy loss value, the value on the X of the alternative data that will determine a simultaneously target bit writes the corresponding positions of destination address.

Still continue to use aforementioned given example, energy loss value as corresponding in last definite the 1st group of alternative data is minimum, utilize the 1st group and replace readdata[N in the value on the 1st, 3,4,6,7,8] value on the 1st, 3,4,6,7,8, also namely, with readdata[1] replace with 0, with readdata[3] replace with 0, with readdata[4] replace with 0, with readdata[6] replace with 1, with readdata[7] replace with 1, with readdata[8] replace with 1.

After replacement is completed, the corresponding alternative data of the energy loss value that is value minimum in M+1 energy loss value of storing in destination address.

In other embodiment of the present invention, the method for above-mentioned all embodiment also can comprise:

Preserve the reduction mode of the corresponding alternative data of energy loss value of value minimum, so that when reading, the data that will be stored in destination address according to the reduction mode of preserving are reduced into source data writedata[N].

Each pretreatment mode is corresponding a kind of anti-pretreatment mode all, for example, suppose, adopt the 1st kind of pretreatment mode that source data 11011100 is processed into 10001110, and according to the 1st kind of anti-pretreatment mode that pretreatment mode is corresponding, can restore into 11011100 with 10001110.

In view of this, the reduction mode of the corresponding alternative data of energy loss value of above-mentioned preservation value minimum can comprise:

For M+1 kind pretreatment mode is numbered;

Record energy loss value minimum alternative data the numbering of corresponding pretreatment mode.

Accordingly, " data that will be stored in destination address according to the reduction mode of preserving are reduced into source data " can specifically comprise:

When reading the storage data, according to the numbering that records, the data that write in destination address are carried out anti-pre-service, it is reduced to source data writedata[N].

Certainly, also can be the anti-pretreatment mode of M+1 kind and be numbered, and record energy loss value minimum alternative data the numbering of corresponding anti-pretreatment mode.And when reading the storage data, according to the numbering that records, the data that write in destination address are carried out anti-pre-service, it is reduced to source data writedata[N].

Corresponding with said method, the embodiment of the invention also discloses the data transfer apparatus of phase transition storage, referring to Fig. 3, it can comprise data preprocessing module 31, data computation module 32 and data memory module 33, wherein:

Data preprocessing module 31 is used for, one group of data in will the destination address of recording phase change memory are as source data, adopt multiple different pretreatment mode to carry out pre-service to source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of source data, N is natural number;

Data computation module 32 is used for, and calculates the energy loss value that the alternative data of each group are stored to destination address, obtains a plurality of energy loss values;

Concrete, as shown in Figure 4, data computation module 32 can comprise data comparing unit 321, target bit generation unit 322 and computing unit 323;

Data comparing unit 321 is used for, for arbitrary alternative data, alternative data are compared in the value on the i position in the value on the i position and the current storage data of destination address, obtain the comparative result that value is identical or value is different, wherein i is natural number, value and comprises 1 and N between 1 to N;

Target bit generation unit 322 is used for, and X target bit determined as target bit in the comparative result that value in comparative result is different corresponding position, and wherein X is natural number, and value and comprises 1 and N between 1 to N;

Computing unit 323 is used for, and calculates the energy loss value that the value of alternative data on all target bit is write the destination address relevant position.

More specifically, the value of arbitrary alternative data on each target bit is 0 or 1.As shown in Figure 5, computing unit can comprise that subelement 3231, first is set adds up subelement 3232, the second statistics subelement 3233 and calculating energy loss value subelement 3234;

Wherein, subelement 3231 is set is used for, it is a:b that the scale-up factor write 0 energy loss value and to write 1 energy loss value is set;

The first statistics subelement 3232 is used for, and statistics value in X target bit is the number of 0 target bit, and is designated as num0;

The second statistics subelement 3233 is used for, and statistics value in X target bit is the number of 1 target bit, and is designated as num1;

Calculating energy loss value subelement 3234 is used for, and calculates the energy loss value that the value of alternative data on each target bit is write the destination address relevant position according to formula a*num0+b*num1.

Data memory module 33 is used for, and makes the corresponding alternative data of energy loss value of value minimum in a plurality of energy loss values of destination address storage.

Each refinement function of data preprocessing module 31, data computation module 32 and data memory module 33 can be referring to the relevant record of said method, and therefore not to repeat here.

In other embodiment of the present invention, still referring to Fig. 3, device in above-mentioned all embodiment also can comprise recovery module 34, recovery module 34 is used for preserving the reduction mode of the minimum corresponding alternative data of energy loss value, so that when reading, will be stored in the corresponding alternative data of energy loss value in destination address, the value minimum according to the reduction mode of preserving and be reduced into source data.Each refinement function of recovery module 34 can be referring to the relevant record of said method, and therefore not to repeat here.

Need to prove, the function of above-mentioned data preprocessing module 31, data computation module 32 and recovery module 34 can be realized by the hardware circuit in PCM.And the function of data memory module 33 is realized by the storage unit in PCM.

Therefore in embodiments of the present invention, data preprocessing module 31 is used for, and will write one group of data in the destination address of PCM as source data, and source data is carried out multiple pre-service, obtains the alternative data of many groups; Data computing unit 32 is used for, and calculates respectively the energy loss value that the alternative data of many groups are stored to destination address, obtains a plurality of energy loss values.Final data memory module 33 is used for, and makes the corresponding alternative data of energy loss value of value minimum in a plurality of energy loss values of destination address storage, thus the energy loss when having reduced the PCM data writing.

To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and General Principle as defined herein can be in the situation that do not break away from the spirit or scope of the present invention, realization in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (10)

1. the method for writing data of a phase transition storage, is characterized in that, comprising:
One group of data in will the destination address of recording phase change memory are as source data, adopt multiple different pretreatment mode to carry out pre-service to described source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of described source data, described N is natural number;
Calculate the energy loss value that the alternative data of described each group are stored to described destination address, obtain a plurality of energy loss values;
Make the corresponding alternative data of energy loss value of value minimum in the described a plurality of energy loss values of described destination address storage.
2. method according to claim 1, it is characterized in that, in described multiple different pretreatment mode, wherein a kind of pretreatment mode is for carrying out any processing, other pretreatment modes comprise the step-by-step negate, with data-oriented step-by-step XOR, with the data-oriented step-by-step with or and cyclic shift mode in any one or combination in any.
3. method according to claim 1, is characterized in that, the alternative data of described each group of described calculating are stored to the energy loss value of described destination address, and the process that obtains a plurality of energy loss values comprises:
For arbitrary alternative data, alternative data are compared in the value on the i position in the value on the i position and the current storage data of described destination address, obtain the comparative result that value is identical or value is different, described i is natural number, value and comprises 1 and N between 1 to N;
X target bit as target bit, determined in the comparative result that in described comparative result, value is different corresponding position, and described X is natural number, and value and comprises 1 and N between 1 to N;
Calculate the energy loss value that the value of described alternative data on all target bit is write described destination address relevant position.
4. method according to claim 3, is characterized in that, described alternative data comprised in the process that the value on the i position compares in the value on the i position and the current storage data of described destination address:
The current storage data of described destination address and described alternative data step-by-step XOR are obtained the XOR result, and the XOR result on the i position is as the comparative result of i position.
5. according to claim 3 or 4 described methods, it is characterized in that, the value of arbitrary alternative data on each target bit is 0 or 1, and described calculating comprises the process that the value of described alternative data on all target bit writes the energy loss value of described destination address relevant position:
The scale-up factor that setting writes 0 energy loss value and writes 1 energy loss value is a:b;
Statistics value in a described X target bit is the number of 0 target bit, is designated as num0;
Statistics value in a described X target bit is the number of 1 target bit, is designated as num1;
According to formula a *Num0+b *Num1 calculates the energy loss value that the value of alternative data on each target bit is write described destination address relevant position.
6. method according to claim 1, is characterized in that, also comprises:
Preserve the reduction mode of the corresponding alternative data of energy loss value of value minimum, so that when reading, will be stored in the corresponding alternative data of energy loss value in described destination address, the value minimum according to the reduction mode of preserving and be reduced into described source data.
7. the data transfer apparatus of a phase transition storage, is characterized in that, comprising: data preprocessing module, data computation module and data memory module;
Data preprocessing module is used for, one group of data in will the destination address of recording phase change memory are as source data, adopt multiple different pretreatment mode to carry out pre-service to described source data, obtain the alternative data of many groups, wherein, each the group alternative data figure place equate with the figure place N of described source data, described N is natural number;
Data computation module is used for, and calculates the energy loss value that the alternative data of described each group are stored to described destination address, obtains a plurality of energy loss values;
Data memory module is used for, and makes the corresponding alternative data of energy loss value of value minimum in the described a plurality of energy loss values of described destination address storage.
8. device according to claim 7, is characterized in that, described data computation module comprises data comparing unit, target bit generation unit and computing unit;
Described data comparing unit is used for, for arbitrary alternative data, alternative data are compared in the value on the i position in the value on the i position and the current storage data of described destination address, obtain the comparative result that value is identical or value is different, described i is natural number, value and comprises 1 and N between 1 to N;
The target bit generation unit is used for, and X target bit as target bit, determined in the comparative result that in described comparative result, value is different corresponding position, and described X is natural number, and value and comprises 1 and N between 1 to N;
Described computing unit is used for, and calculates the energy loss value that the value of described alternative data on all target bit is write described destination address relevant position.
9. device according to claim 8, is characterized in that, the value of arbitrary alternative data on each target bit is 0 or 1, and described computing unit comprises that subelement, first is set adds up subelement, the second statistics subelement and energy loss value computation subunit;
The described subelement that arranges is used for, and it is a:b that the scale-up factor write 0 energy loss value and to write 1 energy loss value is set;
Described the first statistics subelement is used for, and statistics value in a described X target bit is the number of 0 target bit, and is designated as num0;
Described the second statistics subelement is used for, and statistics value in a described X target bit is the number of 1 target bit, and is designated as num1;
Described energy loss value computation subunit is used for, according to formula a *Num0+b *Num1 calculates the energy loss value that the value of alternative data on each target bit is write described destination address relevant position.
10. device according to claim 7, it is characterized in that, also comprise recovery module, described recovery module is used for preserving the reduction mode of the minimum corresponding alternative data of energy loss value, so that when reading, will be stored in the corresponding alternative data of energy loss value in described destination address, the value minimum according to the reduction mode of preserving and be reduced into described source data.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104282333A (en) * 2013-07-12 2015-01-14 华为技术有限公司 Data inversion based storage method and memory
CN104424108A (en) * 2013-09-05 2015-03-18 华为技术有限公司 Write operation method and device
CN105702289A (en) * 2016-02-16 2016-06-22 宁波时代全芯科技有限公司 Writing circuit and method of phase change storage

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7012834B2 (en) * 2003-06-03 2006-03-14 Samsung Electronics Co., Ltd. Writing driver circuit of phase-change memory
CN101329907A (en) * 2008-07-24 2008-12-24 中国科学院上海微系统与信息技术研究所 System and method for reducing programming power consumption of phase-change memory
US20090094405A1 (en) * 2007-10-04 2009-04-09 Samsung Electronics Co., Ltd. Method and apparatus for writing data to and reading data from phase-change random access memory
US20100008133A1 (en) * 2006-04-06 2010-01-14 Samsung Electronics Co., Ltd. Phase change memory devices and systems, and related programming methods
CN102097125A (en) * 2010-12-07 2011-06-15 清华大学 PCM (pulse code modulation) write operation method
CN102592665A (en) * 2011-10-24 2012-07-18 北京时代全芯科技有限公司 High-speed data writing structure and writing method for phase change memory
CN102831929A (en) * 2012-09-04 2012-12-19 中国科学院上海微系统与信息技术研究所 Reading-writing conversion system and reading-writing conversion method of phase change memory

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7012834B2 (en) * 2003-06-03 2006-03-14 Samsung Electronics Co., Ltd. Writing driver circuit of phase-change memory
US20100008133A1 (en) * 2006-04-06 2010-01-14 Samsung Electronics Co., Ltd. Phase change memory devices and systems, and related programming methods
US20090094405A1 (en) * 2007-10-04 2009-04-09 Samsung Electronics Co., Ltd. Method and apparatus for writing data to and reading data from phase-change random access memory
CN101329907A (en) * 2008-07-24 2008-12-24 中国科学院上海微系统与信息技术研究所 System and method for reducing programming power consumption of phase-change memory
CN102097125A (en) * 2010-12-07 2011-06-15 清华大学 PCM (pulse code modulation) write operation method
CN102592665A (en) * 2011-10-24 2012-07-18 北京时代全芯科技有限公司 High-speed data writing structure and writing method for phase change memory
CN102831929A (en) * 2012-09-04 2012-12-19 中国科学院上海微系统与信息技术研究所 Reading-writing conversion system and reading-writing conversion method of phase change memory

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104282333A (en) * 2013-07-12 2015-01-14 华为技术有限公司 Data inversion based storage method and memory
WO2015003653A1 (en) * 2013-07-12 2015-01-15 华为技术有限公司 Storage method and memory based on data inversion
CN104424108A (en) * 2013-09-05 2015-03-18 华为技术有限公司 Write operation method and device
CN104424108B (en) * 2013-09-05 2017-12-15 华为技术有限公司 Write operation method and device
CN105702289A (en) * 2016-02-16 2016-06-22 宁波时代全芯科技有限公司 Writing circuit and method of phase change storage

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