CN105677598A - Module and method for quickly reading data of multiple MEMS sensors on basis of I2C interface - Google Patents

Module and method for quickly reading data of multiple MEMS sensors on basis of I2C interface Download PDF

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Publication number
CN105677598A
CN105677598A CN201610003029.4A CN201610003029A CN105677598A CN 105677598 A CN105677598 A CN 105677598A CN 201610003029 A CN201610003029 A CN 201610003029A CN 105677598 A CN105677598 A CN 105677598A
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data
control unit
cell fifo
dma control
internal storage
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CN201610003029.4A
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CN105677598B (en
Inventor
黄璐
何文涛
冯华星
蔺晓龙
翟昆朋
王浩
殷明
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HANGZHOU ZHONGKE MICROELECTRONICS CO Ltd
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JIAXING MICROELECTRONICS AND SYSTEMS ENGINEERING CENTER CHINESE ACADEMY OF SCIENCES
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

The invention discloses a module for quickly reading data of multiple MEMS sensors on the basis of an I2C interface, and belongs to the field of sensor data communication. The module comprises a DMA control unit, a sent data FIFO unit, a received data FIFO unit and an I2C bus timing sequence control unit; the DMA control unit is configured to be used for sequentially reading data from an internal storage unit to send the data to an I2C host when the I2C bus timing sequence control unit gives out a request signal and sequentially storing the data received by the I2C host in the internal storage unit; the sent data FIFO unit is configured to be used for temporarily storing data needing to be sent and waiting for reading of the I2C host; the received data FIFO unit is configured to be used for temporarily storing the received data and waiting for reading of the DMA control unit; the I2C bus timing sequence control unit is configured to be used for generating a control and data signal according to the data transmitted by the DMA control unit and storing the received data.

Description

Module and the method for multiple MEMS sensor data is quickly read based on I2C interface
Technical field
The present invention relates to data communication technology field, particularly relate to a kind of module and method quickly reading multiple MEMS sensor data based on I2C interface, be applied to the extensive serial data communication in triones navigation system.
Background technology
I2C bus is the bus of main frame more than, uses serial data line (SDA) and serial time clock line (SCL) to transmit information in bus. Each device has a unique identification address, and can serve as a transmitter or receptor. When the multiple host device being connected in I2C bus, simultaneously during transmission data, avoid confusion by arbitrating. SDA and SCL is bidirectional line, is connected to supply voltage by a current source or pull-up resistor. Device output stage must be open-drain or open collector, and when bus free, two lines road is in high level, perform line and function. The speed of I2C bus support has two kinds: the mode standard of maximum 100kbit/s, the quick mode of maximum 400kbit/s. The number of devices being connected to bus is only the limit decision of 400pF by bus capacitance.
The standard time sequence of I2C to be followed 3 control protocols:
START: SDA line is pulled to low level from high level when SCL line keeps high level, and the transmission of representative data starts.
STOP: SDA line is pulled to high level from low level when SCL line keeps high level, the end of transmission of representative data.
ACK: when recipient receives BYTE valid data, it is necessary to drag down the SDA line sender's release simultaneously control to SDA line, represent recipient and receive the response of data.
One traditional I2C HPI reads the workflow of data referring to Fig. 1.
Step 100 writes START and produces to control, and produces START signal in bus.
Data and clock control are sent to from machine by step 200 write transmission data (being usually address of devices) by bus.
Step 210 waits the ACK from machine.If receiving ACK to enter step 300, otherwise process ends.
Step 300 continues to write to transmission data (being usually register address), is sent to data and clock control from machine by bus.
Step 310 waits the ACK of device. If receiving ACK to enter step 400, otherwise process ends.
Step 400 writes START signal and again from machine address of devices, controls to enter read states from machine.
Step 410 waits the ACK of device. If receiving ACK to enter step 500, otherwise process ends.
Step 500 is write dummy data and produces clock in bus and read the data sent from machine simultaneously by bus.
If step 510 reads data and completes, send NACK signal, enter step 600. If also having data to continuous reading, sending ack signal, returning step 500.
Step 600 writes STOP and produces to control, and produces STOP signal in bus.
Step 700 terminates transfer process.
The advantage of said method is in that the step of all control signals and data transmission is all separately performed, so when master/slave machine busy just can be judged by the real-time change controlled with back-signalling, select next step to operate, but this also implies that the beginning of transmission every time, respond, terminating to be required for the participation of master cpu, this can interrupt CPU operation frequently in the application that this large-scale data of navigation system processes, and wastes very much system resource.
Therefore, those skilled in the art is devoted to develop a kind of module and method quickly reading multiple MEMS sensor data based on I2C interface, for this problem, I2C host module is improved, with the addition of DMA (direct memory access) function, it is possible to skip CPU and carry out large batch of back-end data access.
Summary of the invention
Because the drawbacks described above of prior art, the technical problem to be solved is the beginning of transmission every time, responds, and terminates to be required for the participation of master cpu, this can interrupt CPU operation frequently in the application that this large-scale data of navigation system processes, and wastes very much system resource.
The present invention realizes method based on what I2C interface quickly read multiple MEMS sensor data. Can independently read known multiple data from machine under the premise not interrupting CPU operation and put into memory element and read for CPU.
The present invention is a kind of I2C host module that with the addition of DMA function, structure referring to Fig. 2, comprising:
DMA (direct memory access) control unit, all of control signal is set by CPU, successively digital independent is out given from internal storage unit when I2C gives request signal I2C main frame, the data that I2C main frame receives is sequentially stored into internal storage unit simultaneously;
Send data cell fifo, it is necessary to the data of transmission can here be kept in, wait that I2C main frame reads;
Receiving data cell fifo, the data received can here be kept in, and waits that DMA reads;
I2C bus timing control unit, transmits the data come and produces all of control and data signal, and the data received left according to DMA.
What invention further provides the multiple sensing datas of quick reading realizes method, and its step is as follows:
S0) DMA control unit is provided, sends data cell fifo, receives data cell fifo, I2C bus timing control unit and internal storage unit;
S1) according to the sensor component address that be there is a need to access, data amount check, get out corresponding data and put into storage inside;
S2) configuring DMA with CPU and control module, by ready data before the start address point of sendaisle data, destination address points to and sends data FIFO. The start address point receiving channel data is received data FIFO, and destination address points to storage inside any one piece idle. And set the number altogether transmitting data;
S3) when sending data FIFO and being available free, will to DMA request data, DMA takes out data write FIFO from memorizer. Simultaneously once there be data in FIFO, I2C bus timing control module will be taken data away and be transmitted;
S4) when having data receiver to return in I2C bus, I2C bus timing controls module will be stored in reception FIFO by data, receives FIFO once there be data will take data away to DMA request simultaneously, and DMA takes data write memorizer away from receiving FIFO;
S5) after all of default DMA transfer completes, DMA controls module and produces interrupt signal notice CPU, and now CPU can take data away from depositing the storage address receiving data and do corresponding process.
Described a kind of quickly read sensor data method, only needs the intervention of CPU when starting with end operation, and the fifo module of interpolation can better process the difference of message transmission rate between DMA and I2C, reduces DMA transfer and takies the frequency of bus.
Described a kind of quickly read sensor data method, by all of control, respond and transmission data are put together process, the unit data that DMA transmits every time will include START, the actual data information of STOP and 1BYTE (is probably address of devices, register address, dummy data).
Below with reference to accompanying drawing, the technique effect of the design of the present invention, concrete structure and generation is described further, to be fully understood from the purpose of the present invention, feature and effect.
Accompanying drawing explanation
Fig. 1 is the I2C HPI reading data flow journey of standard;
Fig. 2 is the I2C host module functional diagram of a preferred embodiment of the present invention;
Fig. 3 is the flow chart reading multiple MEMS sensor data in a preferred embodiment of the present invention;
Fig. 4 is the transmission data form of a preferred embodiment of the present invention;
Fig. 5 is the transmission signal schematic representation in the I2C bus of a preferred embodiment of the present invention.
Detailed description of the invention
It is simultaneously connected with three kinds of MEMS sensor of BOSCH (Bosch) below by the triones navigation system using the present invention to be embodied as example and illustrate. The three kinds of MEMS sensor used are respectively as follows: BMA280 3-axis acceleration sensor, BMG160 three-axis gyroscope and BMM150 tri-axle magnetometer, it is achieved step is referring to Fig. 3.
Step 100 is according to the address of devices of three MEMS sensor and to read data amount check and gets out transmission data, and data form is shown in Fig. 4, and wherein the address of devices of BMA280 is 0x18, and readings register address is 0x02, and reading number is 6. The address of devices of BMG160 is 0x68, and reading and depositing address is 0x02, and reading number is 6. BMM150 address of devices is 0x10, and reading register address is 0x42, and reading number is 6;
Step 200 is 10bit due to ready data, and according to the 16bit mode addressed, data are put into internal storage unit address 0x10040000;
Step 300 configures DMA with CPU and controls module, and by the start address point 0x10040000 of sendaisle data, destination address points to and sends data FIFO. The start address point receiving channel data is received data FIFO, and destination address points to 0x10048000.The number setting sendaisle transmission data is 27, and receiving channel transmission data number is 18;
Step 400 sends FIFO request data, and DMA takes out 10bit data successively and is stored in transmission FIFO until sending FIFO completely from 0x10040000;
Step 500 (1) I2C sequence generation module from send FIFO take out first data comprising START information and BMA280 address of devices, in bus produce START signal and send address of devices choose BMA280 enter WriteMode. Then take out second information comprising register address, choose the depositor needing to read. Then taking out the 3rd data comprising START signal chooses BMA280 to enter reading mode, finally continuously transmits six dummy data and ack signal, and six data of reading back are sequentially placed into reception FIFO. In the end dummy data send simultaneously need to send out NACK signal and STOP signal, in whole process, in bus, the signal of transmission is referred to Fig. 5.
Step 510, while step 500 carries out, sending the data of FIFO once be sent, will continue to the work of step 400.
Step 520, while step 500 carries out, receives the data of FIFO once effectively, DMA will be asked to take data away, and 8bit is received after data are taken out and is sequentially stored into address 0x10048000 by DMA. Deposit and address according to 8bit.
BMG160, after the operation of BMA280 is terminated, is carried out digital independent from sending the data taken out FIFO by continuations control I2C sequence generation module by step 500 (2), and process is similar with step 500 (1), is not repeating;
BMM150, after the operation of BMG160 is terminated, is carried out digital independent from sending the data taken out FIFO by continuations control I2C sequence generation module by step 500 (3), and process is similar with step 500 (1), is not repeating;
After step 600DMA will receive all 18byte data and be stored in address 0x10048000, DMA controls module and produces interrupt notification CPU process data;
After the data of needs are taken away by step 700CPU, it is possible to reopening DMA transfer in the moment arbitrarily needed, be directly entered step 400 and start to obtain new data, all of DMA arranges and can remain unchanged.
In sum, use the method that realizes of the present invention can quickly read the data of multiple known MEMS sensor when not using CPU to control as far as possible, accelerate the process of data, optimize the configuration of system resource.
The preferred embodiment of the present invention described in detail above. Should be appreciated that the ordinary skill of this area just can make many modifications and variations according to the design of the present invention without creative work. Therefore, all technical staff in the art, all should in the protection domain being defined in the patent claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.

Claims (4)

1. the module quickly reading multiple MEMS sensor data based on I2C interface, it is characterized in that, including DMA control unit, send data cell fifo, reception data cell fifo and I2C bus timing control unit, described DMA control unit is configured to digital independent out to be given from internal storage unit I2C main frame successively, the data that I2C main frame receives is sequentially stored into internal storage unit simultaneously when described I2C bus timing control unit gives request signal; Described transmission data cell fifo, is configured to the temporary data needing and sending, and waits that I2C main frame reads;Described reception data cell fifo, is configured to the temporary data received, waits that described DMA control unit reads; Described I2C bus timing controls data generation control and the data signal that module is configured to transmit according to described DMA control unit, and stores the data received.
2. the method quickly reading multiple MEMS sensor data based on I2C interface, it is characterised in that comprise the following steps:
S0) DMA control unit is provided, sends data cell fifo, receives data cell fifo, I2C bus timing control unit and internal storage unit;
S1) according to the sensor component address and the data amount check that be there is a need to access, corresponding data are put into described internal storage unit;
S2) configuring described DMA control unit, the data that will be placed in the start address point step S1 of sendaisle data in internal storage unit with CPU, destination address points to and sends data cell fifo; The start address point receiving channel data is received data cell fifo, and destination address points to internal storage areas any one piece idle; And set the number altogether transmitting data;
S3) when sending data cell fifo and being available free, will to DMA control unit request data, DMA control unit is taken out data write from internal storage unit and is sent data cell fifo; Sending in data cell fifo once there be data, I2C bus timing control unit will be taken data away and be transmitted simultaneously;
S4) when I2C bus timing control unit has data receiver to return, data will be stored in reception data cell fifo by I2C bus timing control unit, receiving data cell fifo once there be data will take data away to the request of DMA control unit, DMA control unit takes data write internal storage unit away from receiving data cell fifo simultaneously;
S5) after all of default DMA transfer completes, DMA control unit produces interrupt signal notice CPU, and now CPU can take data away from the storage address depositing the internal storage unit receiving data and do corresponding process.
3. the method quickly reading multiple MEMS sensor data based on I2C interface as claimed in claim 2, it is characterised in that the actual data information of START, STOP and 1BYTE will be included in the unit data that DMA control unit is transmitted every time.
4. the method quickly reading multiple MEMS sensor data based on I2C interface as claimed in claim 3, it is characterised in that described actual data information includes address of devices, register address and dummy data.
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CN106055511A (en) * 2016-06-16 2016-10-26 惠州Tcl移动通信有限公司 Data communication method and system for CPU of mobile terminal and sensor
CN110442543A (en) * 2019-08-09 2019-11-12 瓴盛科技有限公司 Communication device and communication means
CN111078606A (en) * 2019-11-18 2020-04-28 上海灵动微电子股份有限公司 Analog I2C slave computer, implementation method thereof, terminal device and storage medium
CN111382092A (en) * 2020-03-05 2020-07-07 上海龙旗科技股份有限公司 Sensor network, method and storage medium
CN114676088A (en) * 2022-02-18 2022-06-28 珠海全志科技股份有限公司 Communication method, device and storage medium
CN117033293A (en) * 2023-10-09 2023-11-10 井芯微电子技术(天津)有限公司 Main mode I2C/SMBUS controller and control method thereof
CN114676088B (en) * 2022-02-18 2024-06-04 珠海全志科技股份有限公司 Communication method, device and storage medium

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CN106055511A (en) * 2016-06-16 2016-10-26 惠州Tcl移动通信有限公司 Data communication method and system for CPU of mobile terminal and sensor
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CN110442543B (en) * 2019-08-09 2023-09-08 瓴盛科技有限公司 Communication device and communication method
CN111078606A (en) * 2019-11-18 2020-04-28 上海灵动微电子股份有限公司 Analog I2C slave computer, implementation method thereof, terminal device and storage medium
CN111078606B (en) * 2019-11-18 2021-05-11 上海灵动微电子股份有限公司 Analog I2C slave computer, implementation method thereof, terminal device and storage medium
CN111382092A (en) * 2020-03-05 2020-07-07 上海龙旗科技股份有限公司 Sensor network, method and storage medium
CN114676088A (en) * 2022-02-18 2022-06-28 珠海全志科技股份有限公司 Communication method, device and storage medium
CN114676088B (en) * 2022-02-18 2024-06-04 珠海全志科技股份有限公司 Communication method, device and storage medium
CN117033293A (en) * 2023-10-09 2023-11-10 井芯微电子技术(天津)有限公司 Main mode I2C/SMBUS controller and control method thereof
CN117033293B (en) * 2023-10-09 2023-12-08 井芯微电子技术(天津)有限公司 Main mode I2C/SMBUS controller and control method thereof

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