CN105656460A - Binary angle quantity signal converting system and method - Google Patents

Abstract

The invention belongs to a binary angle quantity signal converting system and method based on a digital circuit, relates to the technical field of angle signals. In adoption of the method and the system provided by the invention, binary angle quantity can be converted into orthogonal increment pulses. The scheme provided by the invention is that an accumulator and a comparer are designed for storing an internal state angle and comparing the magnitude of the internal state angle and an input angle; through comparing the magnitude of the input angle and the internal state angle, the internal state angle quantity is gradually increased or reduced to the state the same to the input angle; orthogonal increment pulses are calculated in the change process of the internal state angle; through the conversion technique, the binary digital angle quantity can be converted into the orthogonal increment pulses; in adoption of the technique, the drive capabilities of some motor drivers incapable of using rotary transformers can be improved; R/D solution is carried out to the output signals of the rotary transformers; further angle quantity/orthogonal increment pulse conversion is carried out; and the drivers can be compatible with the rotary transformers.

Description

A kind of system and method for binary system angular metric signal conversion

Technical field

The present invention relates to digital circuit technique field.

Background technology

Have in the engineering module rotatablely moving at some, need motor driver to carry out electric machine rotation control. MotorDriver need to obtain the angle information of motor in the time controlling. The sensor that obtains angle information has a lot, whereinRotary transformer has high reliability. But be subject to the restriction of its principle, a lot of drivers can not use rotary transformerAs angular transducer, or the rotary transformer using is had to a lot of restrictions. Therefore need rotary transformerOutput signal is resolved, and obtains binary system angle-data, and this binary system angle-data is converted to orthogonalDelta pulse signal, uses to adapt to driver.

Binary system angle-data is the binary digit amount of multidigit, its value representation the anglec of rotation of rotating mechanism,Its value span is: 0～(2ⁿ-1), figure place is more, and resolution ratio is higher. Orthogonal increment pulse is 3 tunnelsOrthogonal pulse signal, comprises A phase, B phase, and Z phase. Wherein A phase is mutually mutually orthogonal with B, when revolvingWhen rotation structure forward rotation, leading 90 ° than the signal of B phase pulse of the pulse signals of A phase; Work as rotating mechanismWhile rotating backward, the pulse signal of A phase lags behind 90 ° than the pulse signal of B phase; When rotating mechanism forwards 0 toTime, Z exports positive pulse mutually, and other moment are for negative.

Summary of the invention

Technical problem to be solved of the present invention is: based on digital circuit, binary system angle-data is converted toOrthogonal increment pulse, makes to use the driver of rotary transformer or Other Engineering module device to use and revolvesChange depressor.

The system that the invention provides a kind of binary system angular metric signal conversion, is characterized in that, comprises that increase and decrease is cumulativeDevice (1), comparator (2), zero-crossing detector (3), direction door (4) and pulse logic (5):

Increase and decrease accumulator (1), increases and decreases control for latch internal state angle and to it, then by insideState angle signal is exported to comparator (2); Increase and decrease accumulator (1) a kind of embodiment for adopt single or4 increase and decrease accumulators of multistage 74193 binary system.

Comparator (2), for relatively inputting the size of angle and internal state angle, and exports result; OnePlant embodiment for adopting single or multistage 7485 binary system 4 bit comparators.

Zero-crossing detector (3), to further judgement of the big or small logic output of comparator (2), revises the large of zero passageLittle decision logic mistake, exports to direction door (4) by judged result; Input comprises comparator (2) outputRepresent big or small signal, and input angle and internal state angle. When input angle high 2 be all 1 and inPortion's state angle is all 0 o'clock, and output represents the signal results of " being less than "; When high 2 of angle of input is all 0And internal state angle is all 1 o'clock, output represents the signal results of " being greater than "; Otherwise output with from comparator(2) result coming to the same thing of input.

One embodiment of the present invention, zero-crossing detector (3) compares to direction door (4) output with 2 signalsResult, a signal is A>B, one is A<B. In the time that input A is greater than input B, output A>BEffectively, A<B is invalid; When input A is less than input when B, output A>B is invalid, and A<B is effective; When defeatedWhen entering A and equaling to input B, output A>B and A<B all invalid. Zero-crossing detector (3) adopts 4 quadrants to drawThe mode of dividing is carried out the judgement of zero passage size and is revised. By binary system quantity from minimum of a value (0) to maximum (2n)Be divided into 4 quadrants, be respectively 0,1,2,3. Binary number judges by the highest two which it is positioned atIndividual quadrant, as 82 system numbers (01000010)₂Be positioned at the 1st quadrant. When input, A is positioned at the 0th quadrant,And B is positioned at the 3rd quadrant, correction result is A > B; When A is positioned at the 3rd quadrant, and B is positioned at the 0th quadrantTime, correction result is A < B; Other situations are not revised.

Direction door (4), according to the judged result of zero-crossing detector (3) output, the input of guiding external clock,The amount that is used for controlling increase and decrease accumulator (1) is to increase or reduce; Direction door (4) input comprises from zero passage to be examinedSurvey the signal of the expression size of device (3) output, and external timing signal; Increase and decrease accumulator (1) is controlled in outputThe signal that increases or reduce. In the time representing big or small signal for " being greater than " in input, by the clock of inputSignal leading represents the signal end of " increases " in output, controls increase and decrease accumulator (1) increase; Work as inputWhile representing big or small signal for " being less than " in end, the clock signal of input is incorporated in output and represents " to subtractSignal end less ", controls increase and decrease accumulator (1) and reduces; When representing in input that big or small signal is for " etc.In " time, clock signal is not incorporated into any output.

One embodiment of the present invention, direction door (4) input is for representing the A of " being greater than " > B inputEnd, A < B input of expression " being less than ", and external clock input CLK; Output comprises that expression " increasesAdd " UP end and represent that the DOWN of " minimizings " holds. As A > B is while being high, representing increases, UP endThe output input clock signal of following external clock CLK; When A < B is while being high, represent to reduce DOWNThe output input clock signal of following external clock CLK; As A>B and A<B be high or while being low,UP end and DOWN hold the input clock signal of not following external clock CLK.

Pulse logic (5), according to the internal state angle of increase and decrease accumulator (1) output, at external clockControl the orthogonal increment pulse that lower calculating will be exported.

Further, described zero-crossing detector (3). The input of zero-crossing detector (3) comprises comparator (2)The signal of the expression size of output, and input angle and internal state angle. When high 2 of angle of input is all1 and internal state angle be all 0 o'clock, output represents the signal results of " being less than "; When inputting, angle is high 2Be all 0 and internal state angle be all 1 o'clock, output represents the signal results of " being greater than "; Otherwise output with fromThe result coming to the same thing of comparator (2) input.

Further, described direction door (4). The input of direction door comprises from the table of zero-crossing detector (3) outputShow big or small signal, and external timing signal; The letter that increase and decrease accumulator (1) increases or reduces is controlled in outputNumber. In the time representing big or small signal for " being greater than " in input, the clock signal of input is incorporated into outputThe signal end of middle expression " increase ", controlling increase and decrease accumulator (1) increases; When representing big or small in inputWhen signal is " being less than ", the clock signal of input is incorporated into the signal end that represents " minimizing " in output,Controlling increase and decrease accumulator (1) reduces; When representing in input that big or small signal is when " equaling ", not by timeClock signal leading is to any output.

Further, described pulse logic (5). When the input of pulse logic comprises internal state angle and outsideClock; Output orthogonal delta pulse signal. When external clock produces for effectively rising edge of pulse logic (5)Or when trailing edge (rising edge or trailing edge are contrary with increase and decrease accumulator (1)), pulse logic (5) according inPortion's state angle is calculated orthogonal increment pulse now.

Pulse logic (5) input comprises binary number P and clock signal clk; The pulse of input orthogonal incrementA+, A-, B+, B-, Z+ and Z-. According to 74193 logical relation, increase and decrease accumulator (1) is at clockTrailing edge calculate increase or the minimizing of binary number, so pulse logic (5) will be at the rising edge meter of clockCalculate output orthogonal delta pulse. In the time of input clock signal CLK end input rising edge, pulse logic (5) is logicalCross binary load P, calculate A+ and A-, B+ and B-, Z+ and Z-by following formula;

$\left[\begin{array}{c}A+\\ A-\\ B+\\ B-\\ Z+\\ Z-\end{array}\right]\left[\begin{array}{c}\stackrel{\&OverBar;}{\left(P_1\right)}\\ P_1\\ P_1\stackrel{\&OverBar;}{\left(P_0\right)}\\ P_1{P}_0+\stackrel{\&OverBar;}{\left(P_1{P}_0\right)}\\ \frac{P_{15}{P}_{14}...P_2{P}_1{P}_0}{(P_{15}{P}_{14}...P_2{P}_1{P}_0)}\end{array},+{\stackrel{\&OverBar;}{\left(P_1\right)}P}_0\right]$

A kind of method that the invention provides binary system angular metric signal conversion, is characterized in that, comprises following stepRapid:

Internal state angle lock is existed in increase and decrease accumulator (1), then internal state angle signal is exportedGive comparator (2);

Comparator (2) is relatively inputted the size of angle and internal state angle, and Output rusults;

Zero-crossing detector (3), to further judgement of the big or small logic output of comparator (2), is revised the size of zero passageDecision logic mistake, exports to direction door (4) by judged result;

Direction door (4) is according to the judged result of zero-crossing detector (3) output, and the input of guiding external clock, controlsThe amount of system increase and decrease accumulator (1) is to increase or reduce;

Pulse logic (5) is according to the internal state angle of increase and decrease accumulator (1) output, in the control of external clockThe orthogonal increment pulse that the lower calculating of system will be exported.

Its concrete computational process is as follows:

1. an internal state angle is set, and by one increase and decrease accumulator latch it.

2. by relatively input angle tolerance and internal state angle of a comparator, export result to zero passage inspectionSurvey in module.

3. in zero passage detection module, according to the value of input angle and internal state angle, result is repaiiedJust. Mainly, in the time of two angles difference utmost point maximum and minimums, revise the magnitude relationship of these two angles.Result is exported in direction door module.

4. in direction door module, according to the magnitude relationship of input angle and internal state angle, tired to increase and decreaseAdd input clock in device, control the internal state angle increasing and decreasing in accumulator close to input angle.

5., in the process changing in internal state angle, pulse logic module is defeated according to internal state angle calculationThe orthogonal increment pulse going out.

The advantage that the present invention has and beneficial effect: the present invention is based on the binary system angular metric of digital circuit/orthogonalDelta pulse signal conversion module, in use speed is fast, and reliability is high, and it is little to realize cost. Pass throughSignal conversion has realized the expansion of drive compatibility.

Brief description of the drawings

Fig. 1 is the schematic diagram of the binary system angular metric/orthogonal increment pulses switch method based on digital circuit;

Fig. 2 is the number of a kind of implementation method of binary system angular metric/orthogonal increment pulses switch based on digital circuitWord circuit diagram;

Fig. 3 is a kind of implementation digital circuit figure of zero-crossing detector;

Fig. 4 is a kind of implementation digital circuit figure of direction door;

Fig. 5 is a kind of implementation digital circuit figure of pulse logic;

Fig. 6 is a kind of sequential chart of the binary system angular metric/orthogonal increment pulses switch method based on digital circuit.

Detailed description of the invention

With reference to accompanying drawing 2, below the present invention is described in further details. Designing 4 binary system angular transition increasesAmount pulse module, solves above-mentioned binary system angular metric/orthogonal increment pulses switch method based on digital circuitStep is as follows:

1, select the DM74LS193 of Fairchild company as increase and decrease accumulator (1).

2, select the M74HC85 of STMicroelectronics company as comparator (2).

3, with reference to accompanying drawing 3 be a kind of implementation digital circuit figure of zero-crossing detector (3). Work as A₀A₁WithShi Weigao and B₀B₁While being low, ignore A<B and B simultaneously>value of A, output P<Q be height,P > Q is low; Work as A₁A₀Be low and B simultaneously₁B₀While being high, ignore A<B and B simultaneously>value of A,Output P<Q be low, P>Q be height; Value, P that other situations P<Q is A<B>Q is B>AValue.

4, with reference to accompanying drawing 4 be a kind of implementation digital circuit figure of direction door (4). Work as A > B for high,When A<B is low, UP follows clock signal, and it is high that DOWN keeps; Working as A>B is low, A<BWhen high, it is high that UP keeps, and DOWN follows clock signal.

5, with reference to accompanying drawing 5 be a kind of implementation digital circuit figure of pulse logic (5). According to P_0-3ValueCalculate the delta pulse of output, latch output in the time that CLK produces rising edge.

Embodiment

1,, with reference to accompanying drawing 2, the following describes one of 4 binary system angular transition delta pulse modules of the present inventionPlant example in real time.

2, select the DM74LS193 of Fairchild company as increase and decrease accumulator (1). Will be defeated as moduleThe binary system angular metric entering is from the DATA end input of DM74LS193. CLEAR end sets low,BORROW end and CARRY end set high, and introduce load signal from LOAD end.

3, select the M74HC85 of STMicroelectronics company as comparator (2). WillThe output data of DM74LS193 are input to the B end of M74HC85, by the binary system angle of moduleMetric data is input to the A end of M74HC85. A < B end, A=B end and A=B end set low.

4,3 build zero-crossing detector (3) digital circuit with reference to the accompanying drawings. By the binary system angle of module inputAmount low two, and the internal state angle of latch in increase and decrease accumulator (1) is low two, pointNot as the A of zero-crossing detector (3)₁A₀And B₁B₀Input. By the P of comparator (2) > Q andP<Q is input to respectively the input A of zero-crossing detector (3)>B and A<B.

5,4 build direction door (4) digital circuit with reference to the accompanying drawings. By the P of zero-crossing detector (3) > Q andP<Q is input to respectively the input A of direction door (4)>B and A<B. Introduce external clock simultaneouslySignal CLK.

6,5 build pulse logic (5) digital circuit with reference to the accompanying drawings. To increase and decrease latch in accumulator (1)Internal state angle is input to the data terminal P of pulse logic (5). Introduce external timing signal simultaneouslyCLK。

Claims (5)

1. a system for binary system angular metric signal conversion, is characterized in that, comprise increase and decrease accumulator (1),Comparator (2), zero-crossing detector (3), direction door (4) and pulse logic (5):

Increase and decrease accumulator (1), increases and decreases control for latch internal state angle and to it, then by insideState angle signal is exported to comparator (2);

Comparator (2), for relatively inputting the size of angle and internal state angle, and exports result;

Zero-crossing detector (3), to further judgement of the big or small logic output of comparator (2), revises the large of zero passageLittle decision logic mistake, exports to direction door (4) by judged result;

Direction door (4), according to the judged result of zero-crossing detector (3) output, the input of guiding external clock,The amount that is used for controlling increase and decrease accumulator (1) is to increase or reduce;

Pulse logic (5), according to the internal state angle of increase and decrease accumulator (1) output, at external clockControl the orthogonal increment pulse that lower calculating will be exported.

2. the system that binary system angular metric signal is changed according to claim 1, is characterized in that instituteState zero-crossing detector (3), the input of zero-crossing detector (3) comprises the expression size of comparator (2) outputSignal, and input angle and internal state angle, when input angle, high 2 is all 1 and internal state angleBe all 0 o'clock, output represents the signal results of " being less than "; When input angle, high 2 is all 0 and internal stateAngle is all 1 o'clock, and output represents the signal results of " being greater than "; Otherwise export and input from comparator (2)The result coming to the same thing.

3. the system that binary system angular metric signal is changed according to claim 1, is characterized in that instituteState direction door (4), the input of direction door comprises the signal of the expression size of exporting from zero-crossing detector (3), withAnd external timing signal; The signal that increase and decrease accumulator (1) increases or reduces is controlled in output, when showing in inputShow that big or small signal is when " being greater than ", the clock signal of input is incorporated into and in output, represents " increase "Signal end, controlling increase and decrease accumulator (1) increases; In the time representing big or small signal for " being less than " in input,The clock signal of input is incorporated into the signal end that represents " minimizing " in output, controls increase and decrease accumulator (1)Reduce; In the time representing big or small signal for " equaling " in input, clock signal is not incorporated into any outputEnd.

4. the system that binary system angular metric signal is changed according to claim 1, is characterized in that instituteState pulse logic (5), the input of pulse logic comprises internal state angle and external clock; Output orthogonal incrementPulse signal, in the time that external clock produces for the effective rising edge of pulse logic (5) or trailing edge, on thisRise along or trailing edge contrary with increase and decrease accumulator (1), pulse logic (5) according to internal state angle calculation thisTime orthogonal increment pulse.

5. a method for binary system angular metric signal conversion, is characterized in that, comprises the following steps:

Internal state angle lock is existed in increase and decrease accumulator (1), then internal state angle signal is exportedGive comparator (2);

Comparator (2) is relatively inputted the size of angle and internal state angle, and Output rusults;

Zero-crossing detector (3), to further judgement of the big or small logic output of comparator (2), is revised the size of zero passageDecision logic mistake, exports to direction door (4) by judged result;

Direction door (4) is according to the judged result of zero-crossing detector (3) output, and the input of guiding external clock, controlsThe amount of system increase and decrease accumulator (1) is to increase or reduce;

Pulse logic (5) is according to the internal state angle of increase and decrease accumulator (1) output, in the control of external clockThe orthogonal increment pulse that the lower calculating of system will be exported.