CN105633918B - A kind of diamagnetic saturation device of inverter - Google Patents
A kind of diamagnetic saturation device of inverter Download PDFInfo
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- CN105633918B CN105633918B CN201410643109.7A CN201410643109A CN105633918B CN 105633918 B CN105633918 B CN 105633918B CN 201410643109 A CN201410643109 A CN 201410643109A CN 105633918 B CN105633918 B CN 105633918B
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Abstract
The present invention relates to Switching Power Supply control technology fields, especially with regard to a kind of diamagnetic saturation device of inverter, including primary side sampling unit, PWM control unit, driving circuit；The primary side sampling unit is for acquiring primary side current of transformer signal；The PWM control unit is used for according to the primary current signal, in real time in a PWM cycle internal cutting off pwm signal；The driving circuit is used to drive hard switching inverter according to the pwm signal.By embodiments of the invention described above, independent module can be used as, it is portable strong；Compared to the scheme of more previous pulse-width controlled, the strong real-time of the device directly controls the pulsewidth on current road, rather than next period；Compared to DC component scheme is relatively inhibited in the past, the device power consumption is small, and power-efficient is higher；The device is suitable for the hard switching inverter of all power grades.
Description
Technical field
The present invention relates to Switching Power Supply control technology fields, especially with regard to a kind of diamagnetic saturation device of inverter.
Background technique
In recent years, full-bridge inverter is widely applied in many electrical conversion systems, relative to slab bridge
Speech, the switching current of full-bridge inverter reduce 50%, thus more suitable relatively high power occasion.It is real in full-bridge inverter
Electric appliance between existing input and output is isolated, obtains suitable output voltage amplitude, is generally terminated with high frequency power transformation in output
Device.And in output power transformer, caused D.C. magnetic biasing problem causes iron core to be saturated due to various reasons, to increase
The loss of transformer reduces efficiency, or even inverter can be caused to overturn, and has seriously affected the normal operation of full-bridge inverter,
It must take measures to solve.
The measure of bias is inhibited mainly there are two major classes at present: one is increasing primary capacitance or linear inductance, in function
Rate primary series connection linear inductance makes primary current rapid increase when magnetic core of transformer enters inelastic region, increases line
Property inductance after, inhibit current-rising-rate, assume responsibility for portion voltage when transformer non-linearity area, and then balance a cycle
In, the voltagesecond product of transformer realizes anti-bias effect, and this method structure is simple, but energy consumption is high, influences main circuit response and work
Efficiency, and it is relatively difficult to achieve in large power supply.Second is that realizing pulse-width regulated by pwm chip, pass through detection primary side electricity
It flows and carries out with setting value than rear, feeding pwm chip is finely adjusted pulsewidth by pwm chip.Work as primary current
Distortion is more than after setting value, and PWM chip reduces output pulse width, and this method suppression circuit link is more, and real-time is relatively
Difference.
It is other in the prior art, such as " transformer bias mechanism and suppressing method in full-bridge soft-switching pwm converter
Research " in (in July, 2002 publication), circuit is converted into unidirectional square wave by the positive and negative amplitude of monitoring primary current
Pulse, then the PWM sawtooth wave original with UC3875 is superimposed synthesis, and the signal after synthesis generates PWM driving pulse as practical
Sawtooth wave it is compared with the output voltage feedback signal of converter, to generate required PWM driving pulse, the party
The realization of method needs NAND gate and switching tube, and needs to compensate transformer primary current in ZVS full-bridge circuit, realizes
It is complicated.
Summary of the invention
In order to solve the problems, such as D.C. magnetic biasing in prior art inverter, a kind of diamagnetic saturation dress of inverter is proposed
It sets, joined real-time judge and control device between existing transformer primary side and driving circuit, direct current ought be occurred by realizing
Bias situation stops driving circuit, to solve the influence that D.C. magnetic biasing works normally inverter at once.
The embodiment of the invention provides a kind of diamagnetic saturation devices of inverter, including,
Primary side sampling unit, PWM control unit, driving circuit；
The primary side sampling unit is for acquiring primary side current of transformer signal；
The PWM control unit is used for according to the primary current signal, in real time in a PWM cycle internal cutting off PWM
Signal；
The driving circuit is used to drive hard switching inverter according to the pwm signal；
Wherein, the PWM control unit judges whether the primary current signal is greater than threshold values, if it is greater than then real-time
In a PWM cycle internal cutting off pwm signal；
The PWM control unit further comprises comparator, rest-set flip-flop, NAND gate；
The comparator, the size for the primary current signal and the threshold values；
The rest-set flip-flop, the output of the comparator are connected to the setting end of the rest-set flip-flop, and the pwm signal connects
It is connected to the reset terminal of the rest-set flip-flop, when the primary current signal is greater than the threshold values, the rest-set flip-flop is at one
Keep output low level in PWM cycle, the low level that the NAND gate exports the pwm signal and the rest-set flip-flop with it is non-
After export.
Another further aspect of the diamagnetic saturation device of a kind of inverter according to embodiments of the present invention, institute
Stating rest-set flip-flop further comprises, the first NAND gate, the second NAND gate, the output end and low level of the comparator, described
The output end of two NAND gates is connected to first NAND gate, and the output of the pwm signal and first NAND gate is connected to
Second NAND gate.
Another further aspect of the diamagnetic saturation device of a kind of inverter according to embodiments of the present invention, institute
Stating PWM control unit includes multiple rest-set flip-flops and multiple corresponding NAND gates, respectively drives multiple driving circuits.
Another further aspect of the diamagnetic saturation device of a kind of inverter according to embodiments of the present invention, institute
Stating PWM control unit includes 2 rest-set flip-flops and 2 corresponding NAND gates, respectively drives 2 driving circuits.
Another further aspect of the diamagnetic saturation device of a kind of inverter according to embodiments of the present invention, institute
Stating PWM control unit also uses single-chip microcontroller or microcontroller to constitute.
By embodiments of the invention described above, independent module can be used as, it is portable strong；Compared to more previous pulsewidth control
The scheme of system, the strong real-time of the device directly controls the pulsewidth on current road, rather than next period；Inhibit straight compared to relatively previous
Flow component scheme, the device power consumption is small, and power-efficient is higher；The device is suitable for the hard switching inversion electricity of all power grades
Source.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.In the accompanying drawings:
Fig. 1 show a kind of structural schematic diagram of the diamagnetic saturation device of inverter of the embodiment of the present invention；
Fig. 2 show a kind of concrete structure diagram of the diamagnetic saturation device of inverter of the embodiment of the present invention；
Fig. 3 show the working timing figure of partial circuit component of the embodiment of the present invention.
Specific embodiment
Understand in order to make the object, technical scheme and advantages of the embodiment of the invention clearer, with reference to the accompanying drawing to this hair
Bright embodiment is described in further details.Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but simultaneously
It is not as a limitation of the invention.
It is as shown in Figure 1 a kind of structural schematic diagram of the diamagnetic saturation device of inverter of the embodiment of the present invention.
Including primary side sampling unit 101, PWM control unit 102, driving circuit 103.
The primary side sampling unit 101 is for acquiring primary side current of transformer signal；
The PWM control unit 102 is used for according to the primary current signal, in real time in a PWM cycle internal cutting off
Pwm signal；
The driving circuit 103 is used to drive hard switching inverter according to the pwm signal.
As a preferred embodiment of the invention, whether the PWM control unit 102 judges the primary current signal
Greater than threshold values, if it is greater than then in real time in a PWM cycle internal cutting off pwm signal.
As a preferred embodiment of the invention, the PWM control unit 102 further comprises comparator, RS triggering
Device, NAND gate；
The comparator, the size for the primary current signal and the threshold values；
The rest-set flip-flop, the output of the comparator are connected to the setting end of the rest-set flip-flop, and the pwm signal connects
It is connected to the reset terminal of the rest-set flip-flop, when the primary current signal is greater than the threshold values, the rest-set flip-flop is at one
Keep output low level in PWM cycle, the low level that the NAND gate exports the pwm signal and the rest-set flip-flop with it is non-
After export.
As a preferred embodiment of the invention, the rest-set flip-flop further comprises the first NAND gate, second with it is non-
Door, the output end and low level of the comparator are connected to first NAND gate, the pwm signal and first NAND gate
Output be connected to second NAND gate.
As a preferred embodiment of the invention, the PWM control unit includes multiple rest-set flip-flops and multiple corresponding
NAND gate, respectively drive multiple driving circuits 103.
As a preferred embodiment of the invention, the PWM control unit includes that 2 rest-set flip-flops and 2 are corresponding
NAND gate respectively drives 2 driving circuits 103.
As a preferred embodiment of the invention, the PWM control unit 102 can also use single-chip microcontroller or micro-control
Device processed is constituted.
By the device of the embodiments of the present invention, independent module can be used as, it is portable strong；Compared to more previous arteries and veins
The scheme of width control, the strong real-time of the device directly controls the pulsewidth on current road, rather than next period；Compared to relatively previous suppression
DC component scheme processed, the device power consumption is small, and power-efficient is higher；The device is suitable for the hard switching inversion of all power grades
Power supply.
It is illustrated in figure 2 a kind of concrete structure diagram of the diamagnetic saturation device of inverter of the embodiment of the present invention.
The division of circuit components is different from embodiment illustrated in fig. 1 in the present embodiment, but those skilled in the art
It is understood that dividing in any case, these circuit components will execute the function in technical solution of the present invention, thus complete
At the purpose of apparatus of the present invention, in other embodiments may to circuit components, there are also the divisions of other way, but all answer
Within protection scope of the present invention.
It in this example include bias decision circuit 201, pwm control circuit 202, driving circuit 203.
The bias decision circuit 201 further comprises transformer primary side 2011, rectifier bridge 2012, sampling resistor R1, defeated
Enter resistance R2, comparator U1A, pull-up resistor R3, filter capacitor C1.
Current signal is output to rectifier bridge 2012 by the transformer primary side 2011, passes through the rectifying and wave-filtering of rectifier bridge 2012
AC rectification is become direct current by function, which can may be full-wave rectification for full-bridge.
The input of the one end the comparator U1A is the sampled current signals of transformer primary side, and another input terminal is preset electricity
Restriction value IS (i.e. threshold value), when sample rate current is less than the current limit, the comparator U1A exports high level, determines
Without bias magnetic signal, when the sample rate current is greater than the current limit, the comparator U1A exports low level, is determined as having
Bias magnetic signal.
The pwm control circuit 202 further comprises the first rest-set flip-flop 2021, NAND gate U2D, the second rest-set flip-flop
2022, NAND gate U3D, the first NOT gate U4A, the second NOT gate U4B.
Pwm control circuit 202 in this example includes the rest-set flip-flop of two-way driving, can also be wrapped in other embodiments
Include the driving triggering of single channel or more multichannel.Due to being constituted per rest-set flip-flop working method all the way with circuit element,
Therefore other road rest-set flip-flops and corresponding driving circuit are not repeated in this example, only with the first rest-set flip-flop 2021, NAND gate
It is illustrated for U2D and the first NOT gate U4A.
First rest-set flip-flop 2021 further comprises the first NAND gate U2A, the second NAND gate U2B.
When the pwm signal PWMA-IN of input is low level:
No matter IP point is high level or low level (that is no matter comparator output high level or low level), with
NOT gate U2D output is high (it is all high level that 9,10 NAND gate U2D when to have an input be low level, which are exported), non-by first
Door U4A, PWMA-OUT is still low level.Illustrate when pwm signal is low level, i.e., when power device turns off, the partial circuit,
Only serve the effect of transmission pwm signal.
When the pwm signal PWMA-IN of input is high level:
If IP point is high level (that is comparator output high level), i.e., without bias magnetic signal, the first rest-set flip-flop
2021 output end 6 sets height, then does logic NAND operation in NAND gate U2D with PWMA-IN, and NAND gate U2D exports low level, then
Still it is high level by the first NOT gate U4A, PWMA-OUT output, i.e., when IP is high level, PWMA-IN is not controlled.
If IP point is low level (that is comparator output low level), that is, there is bias magnetic signal, the first RS is triggered at this time
The output end 6 of device 2021 is set low, even if subsequent time IP point becomes high level, the output of the first rest-set flip-flop 2021 is still low electricity
It is flat, be possible to change until becoming low level in next PWM cycle PWMA-IN, the output end 6 and PWMA-IN with it is non-
Door U2D does logic NAND operation, and the output of output end 8 becomes high level, is in IP point using the first NOT gate U4A, PWMA-OUT
Become low level after low level.
The first NOT gate U4A in this example can save, and reason is that subsequent driving circuit 203 may need high level
Effectively or need low level effective, first NOT gate U4A can according to the demand of driving circuit 203 and selectivity setting or
Person cancels.
The rest-set flip-flop of the first above-mentioned NAND gate U2A and the second NAND gate U2B composition can use other circuit elements devices
Part is constituted, and pwm signal inputs the reset terminal (end R) of rest-set flip-flop, and comparator inputs the setting end (end S) of rest-set flip-flop, as long as
It realizes and original pwm signal is kept according to the output result of comparator in a PWM cycle or sets low pwm signal i.e.
It can.
Monolithic can be used in above-mentioned comparator, the first rest-set flip-flop, the second rest-set flip-flop, the circuit components such as NAND gate
The chips such as machine, microcontroller, digital processing unit realize the function of the bias decision circuit of pwm control circuit and a part.
It is illustrated in figure 3 the working timing figure of partial circuit component of the embodiment of the present invention.
The reset terminal (end R) of PWMA_IN connection rest-set flip-flop in the figure is the pwm signal of a standard.
The setting end (end S) of the output end IP point connection rest-set flip-flop of comparator, primary side current of transformer signal and default
Threshold values comparison result as shown in the timing of IP point low and high level in figure.
The output of second NAND gate U2B output end 6 is as shown in the figure, and when PWMA-IN is low level, the input of IP point is height
Level, the second NAND gate U2B output end 6 export high level, and the output end 8 of NAND gate U2D exports high level, the first NOT gate U4A
Output end 2 (i.e. the end PWMA-OUT) export low level；When PWMA-IN is high level, the input of IP point is also high level, second
The output end 8 of the output of NAND gate U2B output end 6 or high level, NAND gate U2D exports low level, the output of the first NOT gate U4A
2 (i.e. the ends PWMA-OUT) are held to export high level；When PWMA-IN is high level, the input of IP point is also low level, the second NAND gate
The output of U2B output end 6 is low level, and the output end 8 of NAND gate U2D exports high level, and the output end 2 of the first NOT gate U4A is (i.e.
The end PWMA-OUT) output low level；After a PWM cycle, when PWMA-IN is low level, the input of IP point is low level,
Second NAND gate U2B output end 6 exports high level, and the output end 8 of NAND gate U2D exports high level, the output of the first NOT gate U4A
2 (i.e. the ends PWMA-OUT) are held to export low level.
When the end trigger R is high level, if the end S becomes high level from low level, the output end of trigger is still kept
Low level, until the end R becomes low level, the output of trigger can just become high level.
By the device of the embodiments of the present invention, independent module can be used as, it is portable strong；Compared to more previous arteries and veins
The scheme of width control, the strong real-time of the device directly controls the pulsewidth on current road, rather than next period；Compared to relatively previous suppression
DC component scheme processed, the device power consumption is small, and power-efficient is higher；The device is suitable for the hard switching inversion of all power grades
Power supply.
Particular embodiments described above has carried out further in detail the purpose of the present invention, technical scheme and beneficial effects
Describe in detail it is bright, it should be understood that the above is only a specific embodiment of the present invention, the guarantor being not intended to limit the present invention
Range is protected, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should be included in this
Within the protection scope of invention.
Claims (5)
1. a kind of diamagnetic saturation device of inverter, it is characterised in that including,
Primary side sampling unit, PWM control unit, driving circuit；
The primary side sampling unit is for acquiring primary side current of transformer signal；
The PWM control unit is used for according to the primary current signal, in real time in a PWM cycle internal cutting off pwm signal；
The driving circuit is used to drive hard switching inverter according to the pwm signal；
Wherein, the PWM control unit judges whether the primary current signal is greater than threshold values, if it is greater than then in real time one
A PWM cycle internal cutting off pwm signal；
The PWM control unit further comprises comparator, rest-set flip-flop, NAND gate；
The comparator, the size for the primary current signal and the threshold values；
The rest-set flip-flop, the output of the comparator are connected to the setting end of the rest-set flip-flop, and the pwm signal is connected to
The reset terminal of the rest-set flip-flop, when the primary current signal be greater than the threshold values when, the rest-set flip-flop one PWM weeks
Output low level is kept in phase, the low level and non-post that the NAND gate exports the pwm signal and the rest-set flip-flop are defeated
Out.
2. the diamagnetic saturation device of a kind of inverter according to claim 1, which is characterized in that the rest-set flip-flop is into one
Step includes the first NAND gate, the second NAND gate, the output of the output end and low level of the comparator, second NAND gate
End is connected to first NAND gate, and the output of the pwm signal and first NAND gate is connected to second NAND gate.
3. the diamagnetic saturation device of a kind of inverter according to claim 1, which is characterized in that the PWM control unit
Including multiple rest-set flip-flops and multiple corresponding NAND gates, multiple driving circuits are respectively driven.
4. the diamagnetic saturation device of a kind of inverter according to claim 3, which is characterized in that the PWM control unit
Including 2 rest-set flip-flops and 2 corresponding NAND gates, 2 driving circuits are respectively driven.
5. the diamagnetic saturation device of a kind of inverter according to claim 1, which is characterized in that the PWM control unit
Also constituted using single-chip microcontroller or microcontroller.
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| CN201410643109.7A CN105633918B (en) | 2014-11-07 | 2014-11-07 | A kind of diamagnetic saturation device of inverter |
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| CN201410643109.7A CN105633918B (en) | 2014-11-07 | 2014-11-07 | A kind of diamagnetic saturation device of inverter |
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| CN105633918B true CN105633918B (en) | 2019-02-12 |
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| CN112448573B (en) * | 2021-02-01 | 2021-05-28 | 深圳英飞源技术有限公司 | Control method for magnetic balance of magnetic component in inverter circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5838556A (en) * | 1995-09-18 | 1998-11-17 | Yamaha Corporation | Switching power supply circuit |
| US8427850B2 (en) * | 2010-02-08 | 2013-04-23 | Panasonic Corporation | Switching power supply device with a switching control circuit |
| CN103401218A (en) * | 2013-07-31 | 2013-11-20 | 华南理工大学 | CPLD (Complex Programmable Logic Device)-based phase-shifted full bridge over-current self-protection circuit and control method thereof |
| CN103737155A (en) * | 2014-01-06 | 2014-04-23 | 山东大学 | Single-phase full-bridge inversion topological magnetic biasing staged processing circuit and method |
| CN204131097U (en) * | 2014-11-07 | 2015-01-28 | 北京时代科技股份有限公司 | The diamagnetic saturation device of a kind of inverter |
-
2014
- 2014-11-07 CN CN201410643109.7A patent/CN105633918B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5838556A (en) * | 1995-09-18 | 1998-11-17 | Yamaha Corporation | Switching power supply circuit |
| US8427850B2 (en) * | 2010-02-08 | 2013-04-23 | Panasonic Corporation | Switching power supply device with a switching control circuit |
| CN103401218A (en) * | 2013-07-31 | 2013-11-20 | 华南理工大学 | CPLD (Complex Programmable Logic Device)-based phase-shifted full bridge over-current self-protection circuit and control method thereof |
| CN103737155A (en) * | 2014-01-06 | 2014-04-23 | 山东大学 | Single-phase full-bridge inversion topological magnetic biasing staged processing circuit and method |
| CN204131097U (en) * | 2014-11-07 | 2015-01-28 | 北京时代科技股份有限公司 | The diamagnetic saturation device of a kind of inverter |
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