CN105631129B - A kind of power circuit design method based on OpenPOWER platforms - Google Patents
A kind of power circuit design method based on OpenPOWER platforms Download PDFInfo
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- CN105631129B CN105631129B CN201511005378.1A CN201511005378A CN105631129B CN 105631129 B CN105631129 B CN 105631129B CN 201511005378 A CN201511005378 A CN 201511005378A CN 105631129 B CN105631129 B CN 105631129B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
Abstract
The present invention discloses a kind of power circuit design method based on OpenPOWER platforms, it is related to power circuit designing technique, based on OpenPOWER platforms, SPIVID interfaces, programmable chip PSOC and the power supply control chip of CPU is used in combination, realizes the real-time control to CPU core voltage with caching voltage and adjustment simultaneously；The programmable chip PSOC and CPU passes through SPIVID interactive interfacings, the VID controls information of CPU is converted into PVID and controls information, power supply control chip controls information according to PVID and adjusts output pulse signal PWM duty cycle, the output voltage of real-time control power drives chip.On piece programmable chip PSOC and power supply control/driving chip is used in combination in the present invention, realizes the core voltage of asynchronous controlling CPU and caching voltage within the same time.
Description
Technical field
The present invention relates to power circuit designing technique, specifically a kind of power circuit based on OpenPOWER platforms
Design method.
Background technology
In current server exploitation design, 4-8 VID identification pin need to be arranged in PVID voltage identifications technology, by default
Low and high level value on these VID pins forms one group of VID identification signal, and is transmitted to the power supply control chip in circuit,
Power supply control chip adjusts the duty ratio of output pulse signal according to this group of VID signal, the direct current for making power drives chip export
Voltage meets the value representated by preset VID.Therefore, to meet CPU operating voltage requirements, design specification is to VID digits, voltage
Degree of regulation and voltage regulation limits, which seem, to be even more important.In previous exploitation design, CPU can only send out one group of PVID signal,
It cannot be satisfied the requirement for two kinds of voltage that power supply chip generates needed for CPU work.
Here, the VID：Voltage Identification are voltage identification technologies；CPU, power supply chip are all supported
VID technologies.The PVID：Parallel VID are parallel voltage identification technologies；The PVID skills that CPU, power supply chip are all supported
Art；Several data controlling signals more than VID, equally by CPU exports codings signal to power supply chip, power supply chip (i.e. PWM cores
Piece) generate CPU needed for voltage.
Invention content
The shortcoming that the present invention develops for current needs and the prior art provides a kind of flat based on OpenPOWER
The power circuit design method of platform.
A kind of power circuit design method based on OpenPOWER platforms of the present invention solves above-mentioned technical problem and adopts
Technical solution is as follows：The power circuit design method based on OpenPOWER platforms is based on OpenPOWER platforms, knot
Conjunction uses SPIVID interfaces, programmable chip PSOC and the power supply control chip of CPU, realization to CPU core voltage and to delay simultaneously
Deposit real-time control and the adjustment of voltage；The programmable chip PSOC and CPU is controlled the VID of CPU by SPIVID interactive interfacings
Information processed is converted into PVID control information, and power supply control chip controls information according to PVID and adjusts output pulse signal PWM duties
Than the output voltage of real-time control power drives chip.
Here, the SPIVID：Serial Peripheral Interface VID, serial peripheral VID interfaces；CPU、
The SPIVID interfacings that programmable chip PSOC is supported；CPU is issued programmable by SPIVID buses transmission encoded signal
Power supply chip is sent to by PVID interfaces after chip PSOC, PSOC transform coding, generates voltage needed for CPU.
Preferably, the SPIVID interfaces by four signal line groups at respectively：SPIVID_CS、SPIVID_MOSI、
SPIVID_SCLK and SPIVID_MISO.
Here, the SPIVID_CS：SPIVID Chip Select are SPIVID chip selection signals；It is controlled by main equipment
(CPU is main equipment, PSOC is from equipment)；CS is indicated：After chip is chosen by master chip, CPU could be to programmable chip
PSOC is effectively operated.The SPIVID_MOSI：SPIVID master output Slave output indicate SPIVID
Main equipment output is inputted from equipment；MOSI：Data transmission is emitted to programmable chip PSOC by CPU.The SPIVID_MISO：
SPIVID master input Slave output indicate SPIVID from equipment output, main equipment input；MISO：Data pass
It is defeated to there is PSOC to be emitted to programmable chip CPU.The SPIVID_SCLK：SPIVID serial Clock, when indicating SPIVID
Clock signal is generated by main equipment；SCLK provides clock pulses, and MOSI, MISO are based on this pulse and complete data transmission.
Preferably, CPU sends VID controls information to programmable chip PSOC by SPIVID interfaces；Meanwhile CPU is logical
Cross the status information that SPIVID interfaces read voltage control chip data integrality and fault condition.
Preferably, the PSOC uses CY8C32XX series integrated chips.
Preferably, in the PSOC structures include MCU (Microcontroller Unit, micro-control unit), number system
System, simulation system and system resource, are connected by system bus each other.
Preferably, the PSOC is converted into the VID controls information of reception after the effect of application program and internal module
Two groups of PVID control information, and are sent to power supply control chip by GPIO.
Preferably, the power supply control chip uses IR3595.
Preferably, every group of PVID control information includes that 8 VID control information, corresponds to 256 kinds of fine-tuning control voltages.
Preferably, PVID is controlled the reference voltage information of information and internal register by the power supply control chip IR3595
Compare, generates the certain pulse signal PWM of duty ratio；Power drives chip is generated according to PWM needed for CPU core and cache module
Output voltage, and feedback voltage generate during induced current and temperature information do corresponding position to power supply control chip IR3595
Reason.
Preferably, the power drives chip uses IR3555.
What a kind of power circuit design method based on OpenPOWER platforms of the present invention had compared with prior art
Advantageous effect is：The present invention is suitable for the server design based on IBM OpenPOWER platforms, compared to other adjustings CPU electricity
The VID technologies of pressure are used in combination on piece programmable chip PSOC and power supply control/driving chip, realize within the same time
The core voltage and caching voltage of asynchronous controlling CPU.
Description of the drawings
Attached drawing 1 is the flow chart of the output method of the excel file datas；
PVID information exchange schematic diagram of the attached drawing 2 between PSOC and power supply control chip；
Attached drawing 3 is that the power supply control chip generates V diagram with power drives chip.
Specific implementation mode
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
Attached drawing, to a kind of power circuit design method further description based on OpenPOWER platforms of the present invention.
The present invention addresses the above problem proposes a kind of power circuit design method based on OpenPOWER platforms,
Based on OpenPOWER platforms, the SPIVID interfaces, programmable chip PSOC and power supply control chip of CPU is used in combination, realizes same
When to CPU core voltage with caching voltage real-time control and adjustment；Its core content is that programmable chip PSOC and CPU passes through
The VID controls information of CPU is converted into PVID and controls information by SPIVID interactive interfacings, and power supply control chip is controlled according to PVID
Information adjusts output pulse signal PWM duty cycle, the output voltage of real-time control power drives chip.
Embodiment：
Attached drawing 1 is the schematic diagram of the power circuit design method based on OpenPOWER platforms described in the present embodiment, such as attached drawing
Shown in 1, the core voltage of the OpenPOWER platforms CPU and the variation of caching voltage all rely on VID technologies, the VID of CPU
Information is controlled by OCC (on-chip controller).On the OpenPOWER platforms, SPIVID interfaces are for VID control letters
Breath transmission, by four signal line groups at seemingly with SPI interface, respectively：SPIVID_CS、SPIVID_MOSI、SPIVID_
SCLK and SPIVID_MISO.CPU sends VID controls information to programmable chip PSOC by SPIVID interfaces.The present embodiment
In, the control information to CPU core voltage and caching voltage is contained in the VID controls information, can be adjusted simultaneously to realize
Two kinds of voltages, the PSOC use CY8C32XX series integrated chips.In addition, CPU also can read voltage by SPIVID interfaces
Control the status information of chip data integrality and fault condition.
Power circuit design method based on OpenPOWER platforms described in the present embodiment includes in the PSOC structures
MCU, digital display circuit, simulation system and system resource, are connected by system bus each other.Compared to conventional microcontroller,
PSOC belongs to the on piece programmable chip system based on IP kernel, can realize design requirement by programming；Meanwhile I/O is very clever
Living, each I/O pin can be used for numeral input/go out, and be connected to internal digital module by bus, and there are many each I/O
Drive mode.
PVID information exchange schematic diagram of the attached drawing 2 between PSOC and power supply control chip (Voltage Regulator),
As shown in Fig. 2, PSOC is converted into two groups to the VID controls information of reception after the effect of application program and internal module
PVID, and power supply control chip (power supply control chip uses IR3595 in the present embodiment) is sent to by GPIO；Every group of PVID
It includes that 8 VID control information to control information, 256 kinds of fine-tuning control voltages is corresponded to, to meet requirements of the CPU to power consumption.
Attached drawing 3 is that the power supply control chip generates V diagram with power drives chip, as shown in Fig. 3, described
PVID information compared with the reference voltage information of internal register, is generated the certain arteries and veins of duty ratio by power supply control chip IR3595
Rush signal PWM；Power drives chip (in the present embodiment power drives chip use IR3555) according to PWM generate CPU core with
Output voltage needed for cache module, and feedback voltage generate during induced current and temperature information to power supply control chip
IR3595 does respective handling, and protection device is to prevent excess-current excess-temperature.
Using the power circuit design method based on OpenPOWER platforms described in the embodiment, during system electrification,
CPU internal controllers generate VID and control information, by SPIVID interfaces by VID according to the demand of itself kernel and caching voltage
Control information is sent on piece programmable chip PSOC；PSOC application programs handle VID and generate two groups of PVID control information,
It is sent to power supply control chip IR3595 by two groups of GPIO；Two groups of PVID are controlled information and internal register data by IR3595
It is compared, generates the PWM of one fixed width, control power drives chip I R3555 generates two kinds of voltages needed for CPU；Meanwhile
CPU is according to generation voltage modifications VID control information and adjusts PWM duty cycle to meet the power demands of CPU.
Above-mentioned specific implementation mode is only the specific case of the present invention, and scope of patent protection of the invention includes but not limited to
Above-mentioned specific implementation mode, any person of an ordinary skill in the technical field that meet claims of the present invention and any
The appropriate change or replacement done to it, all shall fall within the protection scope of the present invention.
Claims (8)
1. a kind of power circuit design method based on OpenPOWER platforms, which is characterized in that be based on OpenPOWER platforms, knot
Conjunction uses SPIVID interfaces, programmable chip PSOC and the power supply control chip of CPU, realization to CPU core voltage and to delay simultaneously
Deposit real-time control and the adjustment of voltage；The programmable chip PSOC and CPU is controlled the VID of CPU by SPIVID interactive interfacings
Information processed is converted into PVID control information, and power supply control chip controls information according to PVID and adjusts output pulse signal PWM duties
Than the output voltage of real-time control power drives chip；
During system electrification, CPU internal controllers generate VID and control information according to the demand of itself kernel and caching voltage,
VID controls information is sent on piece programmable chip PSOC by SPIVID interfaces；PSOC application programs are handled and are produced to VID
Raw two groups of PVID control information, and power supply control chip IR3595 is sent to by two groups of GPIO；IR3595 controls two groups of PVID
Information is compared with internal register data, generates the PWM of one fixed width, and control power drives chip I R3555 generates CPU
Two kinds of required voltages；Meanwhile CPU according to generation voltage modifications VID control information and adjusts PWM duty cycle to meet CPU's
Power demands.
2. a kind of power circuit design method based on OpenPOWER platforms according to claim 1, which is characterized in that institute
SPIVID interfaces are stated by four signal line groups at respectively：SPIVID_CS, SPIVID_MOSI, SPIVID_SCLK and
SPIVID_MISO。
3. a kind of power circuit design method based on OpenPOWER platforms according to claim 2, which is characterized in that CPU
VID controls information is sent to programmable chip PSOC by SPIVID interfaces；Meanwhile CPU reads electricity by SPIVID interfaces
The status information of voltage-controlled coremaking sheet data integrality and fault condition.
4. a kind of power circuit design method based on OpenPOWER platforms according to claim 3, which is characterized in that institute
It states PSOC and uses CY8C32XX series integrated chips.
5. a kind of power circuit design method based on OpenPOWER platforms according to claim 4, which is characterized in that institute
It includes MCU, digital display circuit, simulation system and system resource to state in PSOC structures, is connected each other by system bus.
6. a kind of power circuit design method based on OpenPOWER platforms according to claim 5, which is characterized in that institute
It states PSOC and two groups of PVID control information is converted into after the effect of application program and internal module to the VID controls information of reception,
And power supply control chip is sent to by GPIO.
7. a kind of power circuit design method based on OpenPOWER platforms according to claim 6, which is characterized in that every
Group PVID control information includes that 8 VID control information, corresponds to 256 kinds of fine-tuning control voltages.
8. a kind of power circuit design method based on OpenPOWER platforms according to claim 7, which is characterized in that institute
It states power supply control chip IR3595 and PVID is controlled into information compared with the reference voltage information of internal register, generate duty ratio one
Fixed pulse signal PWM；Power drives chip generates CPU core and the output voltage needed for cache module according to PWM, and feeds back
Induced current and temperature information do respective handling to power supply control chip IR3595 in voltage generation procedure.
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10298046B2 (en) | 2016-05-09 | 2019-05-21 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Charging method of controlling output voltages, apparatus and adapter |
| CN107066363B (en) * | 2017-04-19 | 2020-04-07 | 浪潮集团有限公司 | VR power supply debugging equipment and method |
| CN107203482A (en) * | 2017-06-06 | 2017-09-26 | 济南浪潮高新科技投资发展有限公司 | It is a kind of to realize the method that VR chips adapt to different CPU |
| CN110377134A (en) * | 2019-07-19 | 2019-10-25 | 苏州浪潮智能科技有限公司 | Core power method for parameter configuration, device and the core power chip of multiple nucleus system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102789299A (en) * | 2011-05-18 | 2012-11-21 | 鸿富锦精密工业（深圳）有限公司 | CPU voltage protecting circuit |
| CN203689430U (en) * | 2013-10-25 | 2014-07-02 | 南通同洲电子有限责任公司 | Control circuit capable of dynamically regulating power supply voltage of kernel of CPU (central processing unit) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8138736B2 (en) * | 2009-01-20 | 2012-03-20 | Securaplane Technologies, Inc. | Power system having a local sense control dominant over a remote sense control to avoid effects of interconnection failure modes |
-
2015
- 2015-12-29 CN CN201511005378.1A patent/CN105631129B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102789299A (en) * | 2011-05-18 | 2012-11-21 | 鸿富锦精密工业（深圳）有限公司 | CPU voltage protecting circuit |
| CN203689430U (en) * | 2013-10-25 | 2014-07-02 | 南通同洲电子有限责任公司 | Control circuit capable of dynamically regulating power supply voltage of kernel of CPU (central processing unit) |
Non-Patent Citations (2)
| Title |
|---|
| 基于TMS320DM6446的电源模块设计与实现;汪锋 等;《电子器件》;20100630;第33卷(第3期);266-270 * |
| 用于CPU内核的分布式电压调节模块;飞兆半导体公司;《电子设计应用》;20060330;99-101 * |
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