CN105609586A - 一种抗电势诱导衰减的晶体硅电池的制备工艺 - Google Patents
一种抗电势诱导衰减的晶体硅电池的制备工艺 Download PDFInfo
- Publication number
- CN105609586A CN105609586A CN201510996808.4A CN201510996808A CN105609586A CN 105609586 A CN105609586 A CN 105609586A CN 201510996808 A CN201510996808 A CN 201510996808A CN 105609586 A CN105609586 A CN 105609586A
- Authority
- CN
- China
- Prior art keywords
- silicon
- preparation technology
- electromotive force
- force induction
- oxygen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005516 engineering process Methods 0.000 title claims abstract description 26
- 238000002360 preparation method Methods 0.000 title claims abstract description 21
- 229910021419 crystalline silicon Inorganic materials 0.000 title abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 50
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 48
- 239000010703 silicon Substances 0.000 claims abstract description 48
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims abstract description 46
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 45
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 33
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims abstract description 27
- 239000007789 gas Substances 0.000 claims abstract description 24
- 229910000077 silane Inorganic materials 0.000 claims abstract description 24
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 24
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000001301 oxygen Substances 0.000 claims abstract description 22
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 22
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 17
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 14
- 230000006698 induction Effects 0.000 claims description 32
- 239000012528 membrane Substances 0.000 claims description 23
- 229910021529 ammonia Inorganic materials 0.000 claims description 22
- 239000013078 crystal Substances 0.000 claims description 19
- 230000001105 regulatory effect Effects 0.000 claims description 5
- 235000008216 herbs Nutrition 0.000 claims description 2
- 210000002268 wool Anatomy 0.000 claims description 2
- 238000000576 coating method Methods 0.000 abstract description 8
- 239000000758 substrate Substances 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 5
- 230000003647 oxidation Effects 0.000 abstract description 4
- 238000007254 oxidation reaction Methods 0.000 abstract description 4
- 238000002161 passivation Methods 0.000 abstract description 4
- 239000011248 coating agent Substances 0.000 abstract 2
- 229960005419 nitrogen Drugs 0.000 description 13
- 238000012360 testing method Methods 0.000 description 13
- 238000000034 method Methods 0.000 description 7
- 239000007888 film coating Substances 0.000 description 6
- 238000009501 film coating Methods 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000000284 extract Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000011112 process operation Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- FKNQFGJONOIPTF-UHFFFAOYSA-N Sodium cation Chemical compound [Na+] FKNQFGJONOIPTF-UHFFFAOYSA-N 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001706 oxygenating effect Effects 0.000 description 1
- 238000006385 ozonation reaction Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910001415 sodium ion Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electromagnetism (AREA)
- Photovoltaic Devices (AREA)
Abstract
本发明公开了一种抗电势诱导衰减的晶体硅电池的制备工艺,含以下步骤:(1)选取硅基底,置于镀膜设备中,先通入氮气除去杂质气体,再通入氧气,调节温度为200~600℃,使氧气与硅基底反应10~1800s,在硅基底表面形成一层二氧化硅层,接着通入氮气除去多余氧气;(2)待除去镀膜设备内的氧气后,通入氨气和硅烷,调整温度为300~500℃,并通过调整氨气和硅烷气体二者的比例关系,在二氧化硅层表面制作两层氮化硅薄膜。制成的二氧化硅薄膜均匀、致密,氧化效果好,可提高抗电势诱导衰减的性能,制成的氮化硅薄膜为两层结构,底层膜折射率较高,上层膜折射率相对较低,可有效提高抗电势诱导衰减,不会影响薄膜的钝化效果。
Description
技术领域
本发明属于晶体硅制备工艺技术领域,具体涉及一种抗电势诱导衰减的晶体硅电池的制备工艺。
背景技术
电势诱导衰减又称PID,在光伏并网系统中,系统电压可以达到1000V,一般组件的铝边框都要求接地,这样在电池片和铝边框之间形成了1000V的电压,任何材料都有一定程度的导电性,湿度大的环境下导电性会增加,会有漏电流通过电池片、在封装材料、玻璃、背板铝边框流过,如果在内部电路和铝边框之间形成高电压,漏电流将会达到微安和毫安级别,该效应使得电池片表面钝化和形成漏电回路,导致填充因子、开路电压、短路电流降低,使组件性能低于设计标准,电势诱导衰减可以使组件功率下降20%以上。
现有技术中,一般通过提高氮化硅折射率和在硅基体1和氮化硅3之间制作一层氧化硅2来降低电势诱导衰减,如图1中所示,目前一般会利用PEVCD工艺来提高氮化硅薄膜的折射率,但氮化硅薄膜的高折射率,会对太阳能电池效率造成影响;制作氧化硅层一般会选择臭氧氧化工艺,但这样设计制成的氧化硅层,其致密性有待提高,厚度约为1~2nm,且分布相对不均匀,氧化效果稳定性较差、会对产品的品质造成一定的影响。
因此,需要对现有技术中氧化硅和氮化硅的制备工艺进行改进,提供一种抗电势诱导衰减的晶体硅电池的制备工艺。
发明内容
本发明的目的在于提供一种抗电势诱导衰减的晶体硅电池的制备工艺,该工艺制成的二氧化硅薄膜均匀、致密,氧化效果好,可以提高抗电势诱导衰减的性能,制成的氮化硅薄膜为多层结构,底层膜折射率较高,上层膜折射率相对较低,可有效提高抗电势诱导衰减,且不会影响薄膜的钝化效果。
本发明的上述目的是通过以下技术方案来实现的:上述抗电势诱导衰减的晶体硅电池的制备工艺,包括以下步骤:
(1)选取硅基底,预处理后置于镀膜设备中,先通入氮气除去杂质气体,再通入氧气,调节温度为200~600℃,使氧气与硅基底反应10~1800s,在硅基底表面形成一层二氧化硅层,接着通入氮气除去多余氧气;
(2)待除去镀膜设备内的氧气后,通入氨气和硅烷气体,调整温度为300~500℃,并通过调整氨气和硅烷气体二者的比例关系,在二氧化硅层表面制作两层氮化硅薄膜。
在上述抗电势诱导衰减的晶体硅电池的制备工艺中:
进一步的,步骤(1)中选取硅基底,预处理后置于镀膜设备中,先通入氮气除去杂质气体,再通入氧气,调节温度为200~600℃,使氧气与硅基底反应10~600s,在硅基底表面形成一层二氧化硅层,接着通入氮气除去多余氧气。
步骤(1)中二氧化硅层的厚度为2~30nm,较佳为10nm。
进一步的,步骤(1)中调节温度为300~500℃,使氧气与硅基底反应30~500s。较佳为50~200s。
步骤(1)中所述的预处理包括清洗和制绒。
步骤(2)中两层氮化硅薄膜包括底层膜和设于底层膜上的上层膜,其中底层膜设于二氧化硅层表面。
步骤(2)中调整氨气和硅烷气体二者的流量比优选为700~900:3000~4000,运行时间优选为2~8min时,制得底层膜。
更佳的,步骤(2)中调整氨气和硅烷气体二者的流量比为770~820:3300~3900,运行时间为3~5min时,制得底层膜。
步骤(2)中调整氨气和硅烷气体二者的流量比优选为750~850:5000~6000,运行时间优选为5~12min时,制得上层膜。
更佳的,步骤(2)中调整氨气和硅烷气体二者的流量比为810~820:5500~6000,运行时间为6~9min时,制得上层膜。
所述底层膜的折射率优选为2.10~2.40,厚度优选为20~50nm,所述上层膜的折射率优选为2.00~2.10,厚度优选为30~80nmnm,所述底层膜和上层膜的厚度叠加优选为60~100nm。
更佳的,所述底层膜的折射率为2.20~2.30,厚度为20~50nm,所述上层膜的折射率为2.00~2.10,厚度为30~60nm,所述底层膜和上层膜的厚度叠加为60~100nm。
本发明具有如下优点:
(1)采用本发明中的工艺制成的二氧化硅层,均匀、致密,氧化效果好,致密的二氧化硅膜可有效阻隔钠离子的流动,可以提高抗电势诱导衰减的性能,且对产品的品质没有影响;
(2)采用本发明中的工艺制成的氮化硅层为两层薄膜,底层膜折射率较高,上层折射率相对较低,可有效提高抗电势诱导衰减,不会影响薄膜的钝化效果;
(3)采用本发明中的工艺制成的晶硅电池通过封装材料组装成组件可有效抗电势诱导衰减。
附图说明
图1是现有技术中在硅基体1和氮化硅3之间制作一层氧化硅2来降低电势诱导衰减的示意图;
图2是本发明中抗电势诱导衰减的晶体硅电池的制备工艺的流程图;
图3实施例1中15个镀膜机台镀膜后的晶硅电池片制作成的组件按照电势诱导衰减双85实验条件测试的功率损失情况;
图4是实施例1中采用本发明中的镀膜工艺和常规镀膜工艺制得的组件少子寿命情况。
具体实施方式
为了更好地理解本发明,下面结合实施例进一步阐明本发明的内容,但本发明的内容不仅仅局限于下面的实施例。
除非有特意说明,本发明中所有的原料均为市售产品。
实施例1
本实施例提供的抗电势诱导衰减的晶体硅电池的制备工艺,包括以下步骤:
(1)如图2中所示,在镀膜机台(常规镀膜设备,不同之处在于增设一个氧气进入通道和一个氮气进入通道)中,通入足够的保护气体氮气N2,去除其他多余气体之后(如未反应完的硅烷、氨气等),通入氧气O2与硅基底400℃,反应600s,在硅基底表面形成一层二氧化硅层,厚度根据实际需要对参数进行调整设定,本实施例二氧化硅层厚度为20nm,之后再充入氮气进行保护,去除多余氧气;
(2)再充入NH3和SiH4,调整镀膜设备腔体内部温度为400℃,通过调整氨气和硅烷气体的比例,制得底层膜氨气与硅烷的流量比为770:3300,工艺运行时间约为3分20秒,制得上层膜氨气与硅烷流量比为750:6000,工艺运行时间约为7分55秒,制得底层膜折射率约为2.30,厚度约为26nm,上层膜折射率约为2.04,膜厚约为55nm。
通过进行电势诱导衰减实验对比,使用该改进技术之后的晶硅电池片制作成的组件按照电势诱导衰减双85实验条件测试,其功率损失小于3%,远小于常规电池功率损失,EL及外观无明显变化。
15个镀膜机台镀膜后的晶硅电池片制作成的组件按照电势诱导衰减双85实验条件测试的功率损失情况如表1和图3中所示,从表1和图3中可以看出,其功率损失小于3%,远小于常规电池功率损失。
双85试验条件:即在温度控制在85℃、湿度控制在85%的环境试验箱中,在边框及电池板间加有1000伏的高压,经过96小时的衰减试验。具体可参考TUV的常规测试条件。
表115个镀膜机台镀膜后的晶硅电池片制作成的组件按照电势诱导衰减双85实验条件测试的功率损失情况
机台编号 | 测试结果 |
机台1 | 1.76% |
机台2 | 1.51% |
机台3 | 0.98% |
机台4 | 0.61% |
机台5 | 0.72% |
机台6 | 1.51% |
机台7 | 0.95% |
机台8 | 1.51% |
机台9 | 2.89% |
机台10 | 2.14% |
机台11 | 1.56% |
机台12 | 1.73% |
机台13 | 0.48% |
机台14 | 0.33% |
机台15 | 0.89% |
根据表1中的测试结果可知,测试后组件功率损失均在3%以内,而常规单层膜电池组件PID测试很难低于5%。
采用本发明中的工艺镀膜后制得的晶体硅电池片制作成组件后其少子寿命提高,具体如下表2和图4中所示。
样片选择具有相同晶向的硅片约200片进行电池制作,确保硅片间少子寿命无较大差异,抽取扩散后硅片样片4片,进行少子寿命测试,剩余样片一半用常规单层膜镀膜工艺制作,抽取4片进行少子寿命测试,另外一半用本实施例镀膜方式制作,抽取4片进行少子寿命测试,测试结果见下表2。从测试结果可以看出,本方案制得硅片少子寿命较常规镀膜工艺制得硅片高。
表2采用本发明中的镀膜工艺和常规镀膜工艺制得的组件少子寿命情况
样片编号 | 样片1 | 样片2 | 样片3 | 样片4 | 平均值 |
扩散后 | 4.63 | 3.74 | 3.76 | 5.08 | 4.30 |
常规镀膜 | 8.72 | 7.56 | 6.14 | 9.77 | 8.05 |
本方案 | 11.32 | 13.03 | 7.81 | 10.89 | 10.76 |
实施例2
本实施例提供的抗电势诱导衰减的晶体硅电池的制备工艺,包括以下步骤:
(1)如图2中所示,在镀膜机台(常规镀膜设备,不同之处在于增设一个氧气进入通道和一个氮气进入通道)中,通入足够的保护气体氮气N2,去除其他多余气体之后(如未反应完的硅烷、氨气等),通入氧气O2与硅基底300℃,反应1500s,在硅基底表面形成一层二氧化硅层,厚度根据实际需要对参数进行调整设定,本实施例二氧化硅层厚度为10nm,之后再充入氮气进行保护,去除多余氧气;
(2)再充入NH3和SiH4,调整镀膜设备腔体内部温度为400℃,通过调整氨气和硅烷气体的比例,制得底层膜氨气与硅烷的流量比为820:3900,工艺运行时间约为4分10秒,制得上层膜氨气与硅烷流量比为850:5000,工艺运行时间约为7分30秒,制得底层膜折射率约为2.20,厚度约为32nm,上层膜折射率约为2.06,膜厚约为49nm。
实施例3
本实施例提供的抗电势诱导衰减的晶体硅电池的制备工艺,包括以下步骤:
(1)如图2中所示,在镀膜机台(常规镀膜设备,不同之处在于增设一个氧气进入通道和一个氮气进入通道)中,通入足够的保护气体氮气N2,去除其他多余气体之后(如未反应完的硅烷、氨气等),通入氧气O2与硅基底500℃,反应80s,在硅基底表面形成一层二氧化硅层,厚度根据实际需要对参数进行调整设定,本实施例二氧化硅层厚度为5nm,之后再充入氮气进行保护,去除多余氧气;
(2)再充入NH3和SiH4,调整镀膜设备腔体内部温度为420℃,通过调整氨气和硅烷气体的比例,制得底层膜氨气与硅烷的流量比为900:3000,工艺运行时间约为3分40秒,制得上层膜氨气与硅烷流量比为800:5500,工艺运行时间约为7分50秒,制得底层膜折射率约为2.25,厚度约为29nm,上层膜折射率约为2.05,膜厚约为51nm。
本发明不局限于上述具体实施方式,根据上述内容,按照本领域的普通技术知识和惯用手段,在不脱离本发明上述基本技术思想前提下,本发明还可以做出其它多种形式的等效修改、替换或变更,均落在本发明的保护范围之中。
Claims (8)
1.一种抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:包括以下步骤:
(1)选取硅基底,预处理后置于镀膜设备中,先通入氮气除去杂质气体,再通入氧气,调节温度为200~600℃,使氧气与硅基底反应10~1800s,在硅基底表面形成一层二氧化硅层,接着通入氮气除去多余氧气;
(2)待除去镀膜设备内的氧气后,通入氨气和硅烷气体,调整温度为300~500℃,并通过调整氨气和硅烷气体二者的比例关系,在二氧化硅层表面制作两层氮化硅薄膜。
2.根据权利要求1所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(1)中二氧化硅层的厚度为2~30nm。
3.根据权利要求1所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(1)中调节温度为300~500℃,使氧气与硅基底反应30~500s。
4.根据权利要求1所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(1)中所述的预处理包括清洗和制绒。
5.根据权利要求1所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(2)中两层氮化硅薄膜包括底层膜和设于底层膜上的上层膜,其中底层膜设于二氧化硅层表面。
6.根据权利要求5所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(2)中调整氨气和硅烷气体二者的流量比为700~900:3000~4000,运行时间为2~8min时,制得底层膜。
7.根据权利要求5所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:步骤(2)中调整氨气和硅烷气体二者的流量比为750~850:5000~6000,运行时间为5~12min时,制得上层膜。
8.根据权利要求5、6或7所述的抗电势诱导衰减的晶体硅电池的制备工艺,其特征是:所述底层膜的折射率为2.10~2.40,厚度为20~50nm,所述上层膜的折射率为2.00~2.10,厚度为30~80nmnm,所述底层膜和上层膜的厚度叠加为60~100nm。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510996808.4A CN105609586A (zh) | 2015-12-24 | 2015-12-24 | 一种抗电势诱导衰减的晶体硅电池的制备工艺 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510996808.4A CN105609586A (zh) | 2015-12-24 | 2015-12-24 | 一种抗电势诱导衰减的晶体硅电池的制备工艺 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN105609586A true CN105609586A (zh) | 2016-05-25 |
Family
ID=55989352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510996808.4A Pending CN105609586A (zh) | 2015-12-24 | 2015-12-24 | 一种抗电势诱导衰减的晶体硅电池的制备工艺 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105609586A (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106024973A (zh) * | 2016-05-31 | 2016-10-12 | 宁夏银星能源光伏发电设备制造有限公司 | 一种抗pid单晶太阳电池镀双层减反射膜工艺 |
CN109390435A (zh) * | 2018-12-03 | 2019-02-26 | 乐山新天源太阳能科技有限公司 | 用于太阳能电池抗pid设备的氮气和氧气单向混合装置 |
CN109524502A (zh) * | 2018-10-17 | 2019-03-26 | 江西展宇新能源股份有限公司 | 一种硅片的钝化方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201424014A (zh) * | 2012-12-03 | 2014-06-16 | Tsec Corp | 抗高電場衰減太陽能電池結構及其製作方法 |
CN104409565A (zh) * | 2014-10-31 | 2015-03-11 | 太极能源科技(昆山)有限公司 | 一种太阳能电池及其制作方法 |
-
2015
- 2015-12-24 CN CN201510996808.4A patent/CN105609586A/zh active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201424014A (zh) * | 2012-12-03 | 2014-06-16 | Tsec Corp | 抗高電場衰減太陽能電池結構及其製作方法 |
CN104409565A (zh) * | 2014-10-31 | 2015-03-11 | 太极能源科技(昆山)有限公司 | 一种太阳能电池及其制作方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106024973A (zh) * | 2016-05-31 | 2016-10-12 | 宁夏银星能源光伏发电设备制造有限公司 | 一种抗pid单晶太阳电池镀双层减反射膜工艺 |
CN109524502A (zh) * | 2018-10-17 | 2019-03-26 | 江西展宇新能源股份有限公司 | 一种硅片的钝化方法 |
CN109390435A (zh) * | 2018-12-03 | 2019-02-26 | 乐山新天源太阳能科技有限公司 | 用于太阳能电池抗pid设备的氮气和氧气单向混合装置 |
CN109390435B (zh) * | 2018-12-03 | 2024-01-26 | 乐山新天源太阳能科技有限公司 | 用于太阳能电池抗pid设备的氮气和氧气单向混合装置 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106169510B (zh) | 太阳能电池背钝化膜层结构和制备方法 | |
WO2007149945A3 (en) | Methods and apparatus for depositing a microcrystalline silicon film for photovoltaic device | |
CN105609586A (zh) | 一种抗电势诱导衰减的晶体硅电池的制备工艺 | |
MY145709A (en) | Method of manufacturing crystalline silicon solar cells with improved surface passivation | |
WO2005034149A3 (de) | Kugel- oder kornförmiges halbleiterbauelement zur verwendung in solarzellen und verfahren zur herstellung; verfahren zur herstellung einer solarzelle mit halbleiterbauelement und solarzelle | |
US20130104972A1 (en) | Se OR S BASED THIN FILM SOLAR CELL AND METHOD OF MANUFACTURING THE SAME | |
Chirilă et al. | Cu (In, Ga) Se2 solar cell grown on flexible polymer substrate with efficiency exceeding 17% | |
WO2006053032A8 (en) | Thermal process for creation of an in-situ junction layer in cigs | |
CN101573782A (zh) | 半导体层的制造方法和半导体层制造装置以及使用它们制造的半导体器件 | |
WO2006096247A3 (en) | Preventing harmful polarization of solar cells | |
CN104091838A (zh) | 高转化效率抗pid晶体硅太阳能电池及其制造方法 | |
CN103972331A (zh) | 用于高性能和低光劣化的太阳能电池的缓冲层及其形成方法 | |
CN103794658B (zh) | 复合膜高效晶体硅太阳能电池及其制造方法 | |
Dekkers et al. | Requirements of PECVD SiNx: H layers for bulk passivation of mc-Si | |
Abeles et al. | Infrared spectroscopy of interfaces in amorphous hydrogenated silicon/silicon nitride superlattices | |
WO2004049441A3 (en) | Low thermal budget fabrication of ferroelectric memory using rtp | |
CN107154437A (zh) | 太阳能电池减反射膜的制备方法 | |
CN104498908B (zh) | 一种用于制备组件晶硅太阳能电池pecvd镀膜工艺 | |
CN109148613A (zh) | 一种抗pid双面perc太阳电池的制备方法 | |
CN108962999A (zh) | 太阳能电池减低反射率的复合膜及其制备方法 | |
Salabaş et al. | Record amorphous silicon single‐junction photovoltaic module with 9.1% stabilized conversion efficiency on 1.43 m2 | |
CN106653872B (zh) | 一种抗pid效应的太阳能电池 | |
CN104576833A (zh) | 采用pecvd制备太阳能背钝化电池背钝化膜层的方法 | |
CN105118883B (zh) | 一种低镉cigs基薄膜太阳能电池及其制备方法 | |
CN102201489B (zh) | 包括硬性或柔性基板的光电装置及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160525 |