CN105609554A - Trenched power device structure and manufacturing method thereof - Google Patents

Trenched power device structure and manufacturing method thereof Download PDF

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Publication number
CN105609554A
CN105609554A CN201410657724.3A CN201410657724A CN105609554A CN 105609554 A CN105609554 A CN 105609554A CN 201410657724 A CN201410657724 A CN 201410657724A CN 105609554 A CN105609554 A CN 105609554A
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Prior art keywords
terminal
gate
oxide layer
source electrode
power device
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CN201410657724.3A
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孙效中
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CHANGZHOU WANGTONG SEMICONDUCTOR TECHNOLOGY Co Ltd
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CHANGZHOU WANGTONG SEMICONDUCTOR TECHNOLOGY Co Ltd
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Priority to CN201410657724.3A priority Critical patent/CN105609554A/en
Publication of CN105609554A publication Critical patent/CN105609554A/en
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Abstract

The invention discloses a trenched power device structure and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a semiconductor substrate; forming a terminal trench on the semiconductor substrate; growing an oxide layer on the surface (wherein, the oxide layer in the terminal trench is a terminal oxide layer), and depositing polycrystalline silicon in the terminal oxide layer on the terminal trench; removing the oxide layer inside the inner side of the terminal trench to form an active region inside the inner side of the terminal trench on the semiconductor substrate and to form a terminal protection region outside the inner side of the terminal trench; forming a gate trench in the active region, making the gate trench shallower than the terminal trench, growing a gate oxide layer in the gate trench, and depositing polycrystalline silicon in the gate oxide layer in the gate trench; forming a body region in the active region, and forming a source region on the body region; forming an isolation layer on the whole surface; and forming a source contact metal layer and a gate contact metal layer. The process is simple and low in cost of implementation. A terminal of the trenched power device structure prepared by the method has the advantages of small size, low leakage and stronger voltage endurance capability.

Description

Trench power device structure and manufacture method thereof
Technical field
The present invention relates to a kind of trench power device structure and manufacture method thereof, belong to technical field of manufacturing semiconductors.
Background technology
At present, high voltage power device DMOS, IGBT are as third generation power electronic product, because its frequency is high, speedHurry up, the advantage such as the high and good reliability of efficiency and be widely used in field of power electronics, especially industrial electronic, household electrical appliancesThere is their ample scope for abilities in all fields of industry and consumer electronics, at switching power circuit, rectification circuit and drive circuitIn all be unable to do without their figure. Two major parameters weighing power device are voltage and electric current. State-of-artThe exploitation of raising and new technique makes power device obtain the raising on property indices, along with power device is furtherTo high-voltage great-current future development, its market will be more and more wide.
Since power device comes out, improve its reverse voltage endurance capability is an important topic always. Power device resistance toPressure energy power is made up of two parts: the one, and active area is withstand voltage, and the 2nd, terminal is withstand voltage, and wherein either party is withstand voltage not, does not just haveWay meets the demands. Problem of withstand voltage often goes out in terminal. The problem of withstand voltage of active area is relatively simple, by almost planeP/N ties decision, as long as select suitable material and technology, generally there will not be problem. And terminal is withstand voltage quite different, itNot only relevant with material and technique, also relevant with terminal structure and the surperficial environment of device, so need to do specially treated.Be illustrated in figure 1 and do not do any improved terminal structure, due to equipotential surface bending, electric field collects, and raises internal field,Cause withstand voltage reduction. Just occurred that in order to address this problem a lot of new constructions are to improve terminal voltage endurance capability, such as:Plate (fieldplate, FP), field limiting ring (fieldlimitedring, FLR), knot termination extension (junctionterminationExtention, JTE), trench isolations (trenchisolation, TI) and horizontal varying doping (rariationoflateralDoping, VLD) etc. Improvement structure mentioned above, its basic ideas increase equipotential surface radius of curvature nothing more than,To reach the effect that reduces surface field or knot electric field.
Nowadays, people take above-described terminal structure or several combining structure wherein, design many meeting the requirementsPower device. But generally speaking, each terminal structure has its advantage, has again its deficiency. Such as field limiting ring structureAdvantage is that technique is relatively simple, and that shortcoming is area occupied is large and affected by environment larger, needs protective mulch; As figureThe radius of curvature of utilizing transverse electric field to expand to increase equipotential surface for field limiting ring structure shown in 2 improves withstand voltage order to reach, the method comparison area occupied and need to come adjustment structure and technique according to withstand voltage difference, thus relatively complicated,Do not there is versatility. In addition its in addition individual shortcoming is exactly that effects on surface environment is more responsive, and the negative ions in surface all canAffect its performance, generally need to increase one or more layers medium it is protected in order to address this problem. Ditch for another exampleIt is feasible that groove is isolated in low-voltage device, because voltage is lower, depletion layer can not be walked around channel bottom and past extension,But along with the increasing of voltage, depletion layer is and then down expansion also, just has the risk of walking around groove, in order to solve this windDanger, only adds deep trench, can bring the easy premature breakdown problem of channel bottom so simultaneously, has so just formed trench bottomPortion punctures problem that cannot be simultaneously satisfied with P-N junction breakdown, so trench isolations only goes for low voltage product. Based onThe pluses and minuses of various terminal structures, invention this patent, can their advantage of fine absorption and can overcome their shortcoming,Accomplish that technique is simple, with low cost, area occupied is considerably less and have advantages such as very wide voltage adaptation scope.
Summary of the invention
Technical problem to be solved by this invention is the defect overcoming in prior art, and a kind of trench power device structure is providedManufacture method, its technique is simple, implementation cost is little, and the end of the trench power device structure of preparing by the methodEnd size is little, leaks electricity little, and voltage endurance capability is stronger.
The present invention solves the problems of the technologies described above the technical scheme of taking: a kind of manufacture method of trench power device structure,The step of the method is as follows:
(a) provide semi-conductive substrate;
(b) in described Semiconductor substrate, form terminal trenches;
(c) in its superficial growth oxide layer, the oxide layer that is positioned at terminal trenches is terminal oxide layer, then in terminal trenchesTerminal oxide layer in deposit spathic silicon;
(d) remove terminal trenches inner side with inner oxide layer, make the inner side of terminal trenches in Semiconductor substrate active with inner formationDistrict, forms terminal protection district beyond the inner side of terminal trenches;
(e) in described active area, form gate groove, and make this gate groove more shallow than terminal trenches, then grow in gate grooveGrid oxic horizon, and deposit spathic silicon in grid oxic horizon in gate groove;
(f) in active area, form tagma, then on tagma, form source region;
(g) oxide layer of growing on whole surface again, and and the oxide layer of original surface be combined to form separation layer;
(h) form again that source electrode contact metal layer makes source electrode contact metal layer and source region is in electrical contact and form gate contact metal levelMake gate contact metal level and polysilicon in electrical contact.
Further, described step (h) comprising:
(h1) employing photoetching method makes by lithography to extend to the hole formation source electrode contact hole in source region and make by lithography and extends to polysiliconGate contact hole;
(h2) prepare again source electrode contact metal layer on surface and make it have source electrode projection, and this source electrode projection is engaged in sourceIn utmost point contact hole, and prepare gate contact metal level and make it have gate bumps, and this gate bumps is engaged in gridIn contact hole.
Further, described step (b) comprising:
(b1) on the surface of Semiconductor substrate, grow oxide layer as hard mask, and adopt terminal trenches reticle etchingSurface, forms terminal trenches;
(b2) remove hard mask completely.
Further, in described step (d), adopt active area reticle terminal trenches inner side with inner oxide layerRemove completely.
Further, in described step (e), first in superficial growth oxide layer as hard mask, and adopt gate grooveReticle etching surface, forms gate groove; Remove again this hard mask completely.
The trench power device structure that the present invention also provides a kind of manufacture method of this trench power device structure to manufacture, itComprise Semiconductor substrate, described Semiconductor substrate has:
Terminal protection district, terminal protection is formed with terminal trenches in district, is formed with terminal oxide layer on the inwall of terminal trenches,In terminal oxide layer, there is polysilicon;
Active area, its inner side that is positioned at terminal trenches is with inner, and comprises source region and tagma, and source region is positioned at the top in tagma,In active area, be formed with gate groove, and this gate groove is more shallow than terminal trenches, on the inwall of gate groove, is formed with gate oxidationLayer, has polysilicon in grid oxic horizon;
Source electrode contact metal layer, itself and source region are in electrical contact;
Gate contact metal level, itself and polysilicon are in electrical contact;
Separation layer, it is arranged between source electrode contact metal layer and polysilicon, and is arranged on gate contact metal level and sourceBetween district.
Further, described source electrode contact metal layer has source electrode projection, is provided with source electrode contact hole on described source region,The source electrode projection of described source electrode contact metal layer is engaged in source electrode contact hole through after separation layer.
Further, described gate contact metal level has gate bumps, is provided with gate contact hole on described polysilicon,The gate bumps of described gate contact metal level is engaged in gate contact hole through after separation layer.
Adopted technique scheme, the present invention has beneficial effect:
1, technique is simple, and cost is low, only uses five reticle and just can complete element manufacturing, saving compared with traditionTwo reticle.
2, terminal size is little. Be illustrated in figure 3 30VNMOSTFP terminal graph, the terminal of 10um just can realize 30VWithstand voltage, and conventional art will be realized equal performance, size is at least 40um, so that this terminal protection district only accounts for is traditional1/4, even can accomplish less.
3, leak electricity little. As shown in Figure 4, fine dotted line is the breakdown voltage of the 30VMOSFET of conventional terminal Structure CalculationCurve, thick dashed line is the curve that punctures in this terminal protection district. From figure, obviously find out, under the same terms, the present invention is than passingLow at least one the order of magnitude of electric leakage of system structure.
4, voltage endurance capability is stronger, and as shown in Figure 4, under the same terms, conventional art punctures at 34V, and the present invention arrives40V punctures.
Brief description of the drawings
Fig. 1 is the structural representation of the terminal structure of prior art;
Fig. 2 is the structural representation of the field limiting ring structure of prior art;
Fig. 3 is the structural representation in the terminal protection district of 10 μ m of trench power device structure of the present invention;
Fig. 4 is that terminal punctures calculated curve figure;
Fig. 5 is top view of the present invention;
Fig. 6 is the A-A cutaway view of Fig. 5;
Fig. 7 is the B-B cutaway view of Fig. 5;
Fig. 8 is process structure flow chart of the present invention;
Wherein, 20 in Fig. 1 and Fig. 2 is depletion layer.
Detailed description of the invention
For content of the present invention is more easily expressly understood, below according to specific embodiment also by reference to the accompanying drawings, to thisInvention is described in further detail.
As shown in Fig. 5~8, a kind of manufacture method of trench power device structure, the step of the method is as follows:
(a) provide semi-conductive substrate 1;
(b) in described Semiconductor substrate 1, form terminal trenches 4;
(c) in the oxide layer 5 of its superficial growth 200A-20000A, the oxide layer that is positioned at terminal trenches 4 is terminal oxygenChange layer 41, the polysilicon 7 of the interior deposition of terminal oxide layer 41 in terminal trenches 4 1000A-20000A, polysiliconReturn and be carved into surface;
(d) remove terminal trenches 4 inner sides with inner oxide layer 5, the inner side that makes terminal trenches 4 in Semiconductor substrate 1 withIn be formed with source region, form terminal protection district beyond the inner side of terminal trenches;
(e) in described active area, form gate groove 3, and make this gate groove 3 more shallow than terminal trenches 4, then at grid ditchThe grid oxic horizon 31 of the interior growth of groove 3 50A-3000A, and the interior deposition of grid oxic horizon 31 in gate groove 3The polysilicon 7 of 1000A-20000A, this polysilicon returns and is carved into surface;
(f) in active area, form tagma 8, then on tagma 8, form source region 9;
(g) grow on the whole surface again oxide layer of 2000A-20000A, and and the oxide layer combination shape of original surfaceBecome separation layer 10;
(h) the source electrode contact metal layer 13 that forms again 1um-5um electrically connects source electrode contact metal layer 13 and source region 9The gate contact metal level 14 that touches and form 1um-5um makes gate contact metal level 14 and polysilicon 7 in electrical contact.
Described step (h) comprising:
(h1) adopt photoetching method to make by lithography to extend to the hole in source region 9 to form source electrode contact hole 12 and make by lithography extend to manyThe gate contact hole 71 of crystal silicon 7;
(h2) prepare again source electrode contact metal layer 13 on surface and make it have source electrode projection 131, and this source electrode projection 131Be engaged in source electrode contact hole 12, and prepare gate contact metal level 14 and make it have gate bumps 141, and shouldGate bumps 141 is engaged in gate contact hole 71.
Step (b) comprising:
(b1) on the surface of Semiconductor substrate 1, grow the oxide layer of 2000A-20000A as hard mask 2, and adopt eventuallyEnd trench lithography version etching surface, forms terminal trenches 4;
(b2) remove hard mask 2 completely.
In described step (d), adopt active area reticle that terminal trenches 4 inner sides are removed completely with inner oxide layer.
In described step (e), the first oxide layer at superficial growth 2000A-20000A is as hard mask, and employingGate groove reticle etching surface, forms gate groove 3; Remove again this hard mask completely.
As shown in Figure 6,7, the trench power device structure that the manufacture method of this trench power device structure is manufactured, it comprisesSemiconductor substrate 1, described Semiconductor substrate 1 has:
Terminal protection district, is formed with terminal trenches 4 in terminal protection district, be formed with terminal oxidation on the inwall of terminal trenches 4Layer 41, has polysilicon 7 in terminal oxidation 41;
Active area, its inner side that is positioned at terminal trenches 4 is with inner, and comprises source region 9 and tagma 8, and source region 9 is positioned at tagma8 top, is formed with gate groove 3 in active area, and this gate groove 3 is more shallow than terminal trenches 4, in gate groove 3On wall, be formed with grid oxic horizon 31, in grid oxic horizon 31, there is polysilicon 7;
Source electrode contact metal layer 13, itself and source region 9 are in electrical contact;
Gate contact metal level 14, itself and polysilicon 7 are in electrical contact;
Separation layer 10, it is arranged between source electrode contact metal layer 13 and polysilicon 7, and is arranged on gate contact metalBetween layer 14 and source region 9.
As shown in Figure 6, source electrode contact metal layer 13 has source electrode projection 131, is provided with source electrode and connects on described source region 9Touch hole 12, the source electrode projection 131 of described source electrode contact metal layer 13 is engaged in source electrode contact hole through after separation layer 10In 12.
Gate contact metal level 14 has gate bumps 141, is provided with gate contact hole 71, institute on described polysilicon 7The gate bumps 141 of the gate contact metal level 14 of stating is engaged in gate contact hole 71 through after separation layer 10.
Count outward from groove 1, the very thick oxide layer of one deck of having grown because groove 1 is interior, follow-up body injects, source is injected and can not be passed,The region that causes body, source to be injected ends at the inner side by groove, and electric field is only present in the inner side by groove thus, and can be not pastExtension, adds P-N and is perpendicular to trenched side-wall, has not also just had the phenomenons such as electric field collects, and reaches effective raising voltage endurance capabilityObject. Groove 1 bottom is all grown and is had thick oxide layer, effectively resistance to compression, and the thickness of oxide layer can be adjusted thick according to measuring body sizeDegree. In principle, this peripheral structure can be accomplished infinity voltage, and it is very little to take the area of device.
Above-described specific embodiment, technical problem, technical scheme and beneficial effect that the present invention is solved enterOne step describes in detail, and institute it should be understood that and the foregoing is only specific embodiments of the invention, is not limited toThe present invention, within the spirit and principles in the present invention all, any amendment of making, be equal to replacement, improvement etc., all should wrapWithin being contained in protection scope of the present invention.

Claims (8)

1. a manufacture method for trench power device structure, is characterized in that the step of the method is as follows:
(a) provide semi-conductive substrate;
(b) in described Semiconductor substrate, form terminal trenches;
(c) in its superficial growth oxide layer, the oxide layer that is positioned at terminal trenches is terminal oxide layer, then in terminal trenchesTerminal oxide layer in deposit spathic silicon;
(d) remove terminal trenches inner side with inner oxide layer, make the inner side of terminal trenches in Semiconductor substrate active with inner formationDistrict, forms terminal protection district beyond the inner side of terminal trenches;
(e) in described active area, form gate groove, and make this gate groove more shallow than terminal trenches, then grow in gate grooveGrid oxic horizon, and deposit spathic silicon in grid oxic horizon in gate groove;
(f) in active area, form tagma, then on tagma, form source region;
(g) oxide layer of growing on whole surface again, and and the oxide layer of original surface be combined to form separation layer;
(h) form again that source electrode contact metal layer makes source electrode contact metal layer and source region is in electrical contact and form gate contact metal levelMake gate contact metal level and polysilicon in electrical contact.
2. the manufacture method of trench power device structure according to claim 1, is characterized in that: described stepSuddenly (h) comprising:
(h1) adopting photoetching method to make by lithography extends to the hole formation source electrode contact hole in source region and makes the grid that extend to polysilicon by lithographyUtmost point contact hole;
(h2) prepare again source electrode contact metal layer on surface and make it have source electrode projection, and this source electrode projection is engaged in source electrode and connectsTouch in hole, and prepare gate contact metal level and make it have gate bumps, and this gate bumps is engaged in gate contactIn hole.
3. the manufacture method of trench power device structure according to claim 1 and 2, is characterized in that: described inStep (b) comprising:
(b1) on the surface of Semiconductor substrate, grow oxide layer as hard mask, and adopt terminal trenches reticle etchingSurface, forms terminal trenches;
(b2) remove hard mask completely.
4. the manufacture method of trench power device structure according to claim 1 and 2, is characterized in that: in instituteIn the step (d) of stating, adopt active area reticle that terminal trenches inner side is removed completely with inner oxide layer.
5. the manufacture method of trench power device structure according to claim 1 and 2, is characterized in that: in instituteIn the step (e) of stating, first in superficial growth oxide layer as hard mask, and adopt gate groove reticle etching surface,Form gate groove; Remove again this hard mask completely.
6. the manufacture method manufacture of the use trench power device structure as described in any one in claim 1 to 5Trench power device structure, it comprises Semiconductor substrate, it is characterized in that, described Semiconductor substrate has:
Terminal protection district, terminal protection is formed with terminal trenches in district, is formed with terminal oxide layer on the inwall of terminal trenches,In terminal oxide layer, there is polysilicon;
Active area, its inner side that is positioned at terminal trenches is with inner, and comprises source region and tagma, and source region is positioned at the top in tagma,In active area, be formed with gate groove, and this gate groove is more shallow than terminal trenches, on the inwall of gate groove, is formed with gate oxidationLayer, has polysilicon in grid oxic horizon;
Source electrode contact metal layer, itself and source region are in electrical contact;
Gate contact metal level, itself and polysilicon are in electrical contact;
Separation layer, it is arranged between source electrode contact metal layer and polysilicon, and is arranged on gate contact metal level and sourceBetween district.
7. trench power device structure according to claim 6, is characterized in that: described source electrode contacting metalLayer has source electrode projection, is provided with source electrode contact hole, the source electrode projection of described source electrode contact metal layer on described source regionBe engaged in source electrode contact hole through after separation layer.
8. trench power device structure according to claim 6, is characterized in that: described gate contact metalLayer has gate bumps, is provided with gate contact hole on described polysilicon, and the grid of described gate contact metal level is protrudingRise through being engaged in after separation layer in gate contact hole.
CN201410657724.3A 2014-11-19 2014-11-19 Trenched power device structure and manufacturing method thereof Pending CN105609554A (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108962989A (en) * 2017-05-23 2018-12-07 中航(重庆)微电子有限公司 A kind of groove type MOS device and its manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101421832A (en) * 2004-03-01 2009-04-29 国际整流器公司 The self-aligned contact structure of trench device
CN103077960A (en) * 2013-01-28 2013-05-01 上海宝芯源功率半导体有限公司 Groove-power device structure and manufacturing method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101421832A (en) * 2004-03-01 2009-04-29 国际整流器公司 The self-aligned contact structure of trench device
CN103077960A (en) * 2013-01-28 2013-05-01 上海宝芯源功率半导体有限公司 Groove-power device structure and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108962989A (en) * 2017-05-23 2018-12-07 中航(重庆)微电子有限公司 A kind of groove type MOS device and its manufacturing method

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Application publication date: 20160525