CN105580120B - Thin film transistor (TFT) array and image display device - Google Patents
Thin film transistor (TFT) array and image display device Download PDFInfo
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- CN105580120B CN105580120B CN201480053246.3A CN201480053246A CN105580120B CN 105580120 B CN105580120 B CN 105580120B CN 201480053246 A CN201480053246 A CN 201480053246A CN 105580120 B CN105580120 B CN 105580120B
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- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/80—Constructional details
- H10K10/88—Passivation; Containers; Encapsulations
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing
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- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
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- H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
- H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
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- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
- H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
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- H10K85/623—Polycyclic condensed aromatic hydrocarbons, e.g. anthracene containing five rings, e.g. pentacene
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- Y02E10/549—Organic PV cells
Abstract
The present invention is provided in the formation of interlayer dielectric without using the thin film transistor (TFT) array that defect in photoetching process, interlayer dielectric is few.Thin film transistor (TFT) array at least has protective layer (16), pixel electrode (18) and the interlayer dielectric (17) being formed between drain electrode (14) and pixel electrode (18) of insulating substrate (10), gate electrode (11), gate insulating film (12), source electrode (13B), drain electrode (14), semiconductor layer (15), covering semiconductor layer (15).Interlayer dielectric (17) is organic film or organic and inorganic hybrid films, interlayer dielectric (17) has through-hole (40) so that pixel electrode (18) is connected to drain electrode (14) in the part for being formed with the position of drain electrode (14), drain electrode (14) is with the opening portion for being located in through-hole (40) and being formed on electrode material opening, and there are mercapto or disulfide groups on the drain electrode (14) in through-hole (40).
Description
Technical field
The present invention relates to thin film transistor (TFT) array and image display devices.
Background technology
In recent years, from the viewpoints such as flexibilityization, lightweight, cost effective, print process manufacture can be utilized by having used
The research of organic semi-conductor thin film transistor (TFT) is prevailing, expects its driving circuit or electronics mark in organic EL or Electronic Paper etc.
Application in label etc..
Thin film transistor (TFT) is made of laminated conductive body, insulator and semiconductor etc..Thin film transistor (TFT) array is according to structure
Or purposes and be equipped with interlayer dielectric, via being set to the through-hole of interlayer dielectric by the electric conductor of the electric conductor on top and lower part
Between be electrically connected.
In order to which interlayer dielectric is made, following methods are widely used:Using plasma CVD to the silicon nitride of inoranic membrane or
Silica forms a film, and after forming desirable opening portion using photoresist, through-hole is formed using dry etching.In addition
The method also formed using photoresist.It is right due to using photoetching process in being formed in through-hole in these methods
In the trial by manufacturing thin film transistor (TFT) array using low cost as the print process of target, output or cost become problem.
In contrast, the method for forming interlayer dielectric using print process has been recorded in patent document 1.In this method,
After the film forming of gate insulating film using ink-jet method on the part of through-hole to be formed coating solvent insulating film to be dissolved, to
Form through-hole.Lyophobic inks are coated on the electric conductor surface exposed in through-hole section using ink-jet method to carry out lyophoby.
In turn, precursor resin is printed in substrate whole face using ink-jet method and is cured, to form interlayer dielectric.
In addition, in method recorded in patent document 2, after forming a film to gate insulating film, ink-jet method is utilized
Coating solvent is to dissolve insulating film on the part of through-hole to be formed, to form through-hole.The conduction exposed in through-hole section
Body is coated with lyophobic inks to carry out lyophoby since area is smaller than opening portion, using ink-jet method on electric conductor surface.Into
And print precursor resin in substrate whole face using ink-jet method and cured, to form interlayer dielectric.
Existing technical literature
Patent document
Patent document 1:Japanese Unexamined Patent Publication 2012-64844 bulletins
Patent document 2:Japanese Unexamined Patent Publication 2012-204657 bulletins
Invention content
Technical problems to be solved by the inivention
But due to coating solvent, progress after the film forming of the first interlayer dielectric in the method recorded in patent document 1
The trepanning of through-hole, therefore it is easy in through-hole section to remain the residue of the first interlayer dielectric, with pixel electrode and drain electrode
Insufficient problem is connected.
Although in addition, in advance that the drain electrode of through-hole section is exhausted to be less than the first interlayer in method recorded in patent document 2
The mode of the clear size of opening of velum is formed, but due to being the processing carried out using vacuum film formation and photoetching process, with print process
It compares, problem is very big in terms of output and cost.
Therefore, the present invention makes in view of the above problems, and its purpose is to provide do not make in the formation of interlayer dielectric
With the defect of photoetching process and interlayer dielectric few thin film transistor (TFT) array and image display device.
The present invention provides the structure of through-hole in view of the above problems following structure and manufacturing method:In layer insulation
The drain electrode portion of film opens an opening in advance, is coated with lyophoby treatment of printing ink thereto using ink-jet method, to only make drain electrode
Through-hole section is lyophobicity, it is possible thereby to form interlayer dielectric using print process.
Method for solving technical problem
The thin film transistor (TFT) array of a mode of the invention is that at least have insulating substrate, gate electrode, gate insulating film, source
Electrode, semiconductor layer, covers the protective layer of semiconductor layer, pixel electrode and is formed in drain electrode and pixel electrode drain electrode
Between interlayer dielectric thin film transistor (TFT) array, wherein interlayer dielectric is organic film or organic with inorganic hybrid films,
A part of the interlayer dielectric in the position for being formed with drain electrode has through-hole so that pixel electrode is connected to drain electrode, drain electrode
With the opening portion for being formed with opening in through-hole and on electrode material, on the drain electrode in through-hole there are mercapto or
Disulfide group.
In addition, in above-mentioned thin film transistor (TFT) array, the open end of through-hole is also present in end or the electric leakage of drain electrode
On extremely.
In addition, in above-mentioned thin film transistor (TFT) array, the thickness of interlayer dielectric can be 0.5 μm or more and 5 μm or less.
In addition, in above-mentioned thin film transistor (TFT) array, interlayer dielectric is also using ink jet printing method, silk screen print method or recessed
Version adherography is formed.
In addition, in above-mentioned thin film transistor (TFT) array, semiconductor layer can also be organic semiconductor layer.
In addition, in above-mentioned thin film transistor (TFT) array, insulating substrate can also be plastic base.
In addition, the image display device of a mode of the invention is by above-mentioned thin film transistor (TFT) array and image display medium
The image display device of composition.
In addition, in above-mentioned image display device, above-mentioned image display medium can be the medium using electrophoretic.
Invention effect
According to the present invention it is possible to provide in the formation of interlayer dielectric without using defect in photoetching process, interlayer dielectric
Few thin film transistor (TFT) array and image display device.
Description of the drawings
Fig. 1 is the vertical view and sectional view of the structure for the thin film transistor (TFT) array for indicating embodiment of the present invention.
Fig. 2 is the vertical view and sectional view of the structure for the thin film transistor (TFT) array for indicating embodiment 1.
Fig. 3 is the vertical view and sectional view for the drain electrode for indicating embodiment 1.
Fig. 4 be the thin film transistor (TFT) array for indicating embodiment 1 manufacturing method in from lyophoby processing to interlayer dielectric
The sectional view of process until formation.
Fig. 5 is the vertical view and sectional view of the structure for the thin film transistor (TFT) array for indicating comparative example 1.
Specific implementation mode
It is described with reference to embodiments of the present invention.Referring to attached drawing for ease of judging explanation, inaccurate
Ground describes engineer's scale.In addition, carrying the same symbol to identical inscape in embodiment.
The thin film transistor (TFT) array 50,51 of present embodiment at least has insulating substrate 10, gate electrode 11, gate insulating film
12, source electrode 13B, drain electrode 14, semiconductor layer 15, the protective layer 16 for covering semiconductor layer 15, pixel electrode 18 and formation
Interlayer dielectric 17 between drain electrode 14 and pixel electrode 18.Gate electrode 11 is covered by gate insulating film 12.Layer insulation
Film 17 is organic film or organic and inorganic hybrid films.Interlayer dielectric 17 is in the part tool for being formed with the position of drain electrode 14
There is through-hole 40 so that pixel electrode 18 is connected to drain electrode 14.It is embedded with conductive material in through-hole 40.Drain electrode 14 has position
Be formed with the opening portion of opening in the through-hole 40 and on electrode material, on the drain electrode 14 in through-hole 40 there are mercapto or
Disulfide group.For example, the open end of through-hole 40 is present on the end or drain electrode 14 of drain electrode 14.For example, layer insulation
The thickness of film 17 is 0.5 μm or more and 5 μm or less.For example, interlayer dielectric 17 utilizes ink jet printing method, silk screen print method or recessed
Version adherography is formed.For example, semiconductor layer 15 is organic semiconductor layer.For example, insulating substrate 10 is plastic base.
In addition, the image display device of present embodiment has the thin film transistor (TFT) array 50,51 and figure of present embodiment
As display medium (such as image display panel).For example, image display medium is the medium using electrophoretic.
In addition, when manufacture thin film transistor (TFT) array 50,51, the through-hole in drain electrode 14 is formed in reservations to be provided in advance
Opening, lyophoby treatment of printing ink is coated with using ink-jet method on it.Lyophoby treatment of printing ink is only formed a film and forms reservations in through-hole
On drain electrode 14.The desirable region only on drain electrode 14 becomes lyophobicity as a result, the layer insulation to be formed a film using print process
Film 17 is selectively not coated on the drain electrode 14 that through-hole forms reservations.Thus, it is possible to using print process in layer insulation
Through-hole 40 is formed on film 17.
Specifically, Fig. 1 shows an examples of the composition of the thin film transistor (TFT) array 50 of embodiment of the present invention.On in Fig. 1
Sidelights carry vertical view, sectional view is recorded in downside.This point is same in Fig. 2 and Fig. 5.
Thin film transistor (TFT) array 50 has gate electrode 11, electrode for capacitors 19, grid on plastic base 10 (insulating substrate)
Pole insulating film 12, source electrode 13B, drain electrode 14, semiconductor layer 15, protective layer 16, interlayer dielectric 17 and pixel electrode 18 (on
Portion's pixel electrode).Source electrode 13B and drain electrode 14 are formed on gate insulating film 12 and are connected to semiconductor layer 15.Film is brilliant
In body pipe array 50, protective layer 16 is made of organic insulating material, is formed as item in the way of covering each semiconductor layer 15
Line shape.In turn, the through-hole 40 in interlayer dielectric 17 is opened in drain electrode in order to which pixel electrode 18 and drain electrode 14 is connected
Open edge (lower end of through-hole 40 in figure on the downside of Fig. 1) is configured on 14 end or drain electrode 14.
The material of the plastic base 10 of embodiment of the present invention can use polymethyl methacrylate, polyacrylate,
Makrolon, polystyrene, poly- thiirane, polyether sulfone, polyolefin, polyethylene terephthalate, poly- naphthalenedicarboxylic acid second
It is diol ester, cyclic olefin polymer, polyether sulfone, Triafol T, pvf film, ethylene-tetrafluorocopolymer copolymer resin, weather-proof
Property polyethylene terephthalate, weatherability polypropylene, glass fiber-reinforced acrylic resin film, glass fiber-reinforced poly- carbon
Acid esters, transparent polyimides, fluorine resin, cyclic polyolefin resin etc., but the present invention is not limited to these.These materials
It can be used alone, may also be fabricated which that composite substrate of more than two kinds, which has been laminated, to be used.Furthermore it is also possible to using in glass or
Substrate with resin layer as optical filter on plastic base.
The gate electrode 11 of embodiment of the present invention, source wiring 13A, source electrode 13B, drain electrode 14, pixel electrode 18 and
The material of electrode for capacitors 19 preferably uses Au, Ag, Cu, Cr, Al, Mg, Li et al. low-resistance metal material or oxide material
Material.Indium oxide (In can specifically be used2O3), tin oxide (SnO2), zinc oxide (ZnO), cadmium oxide (CdO), indium oxide cadmium
(CdIn2O4), cadmium tin (Cd2SnO4), zinc-tin oxide (Zn2SnO4), indium zinc oxide (InZnO) etc..In addition, also preferably making
Doped with the substance of impurity in the oxide material.It can be used for example in indium oxide doped with molybdenum or titanium person, in oxygen
Change in tin doped with antimony or fluorine person, doped with indium, aluminium, the person of sowing etc. in zinc oxide.Wherein, doped with the oxygen of tin in indium oxide
Change indium tin (ITO) and shows especially low resistivity.In addition, will also be preferred, PEDOT (Polyglycolic acid fibre) etc. is organic to be led
Electric material can be used at this time with organic conductive material monomer, also can be by organic conductive material and electric conductivity oxygen
Compound material is laminated into multilayer and is used.Gate electrode 11, source wiring 13A, source electrode 13B and drain electrode 14, pixel electrode
18, electrode for capacitors 19 can be all formed from the same material, and can also be formed from different materials.But in order to reduce
Process, preferably source wiring 13A, source electrode 13B and drain electrode 14 use identical material.These electrodes can utilize vacuum evaporation
The formation such as method, ion plating method, sputtering method, laser ablation method, plasma CVD method, optical cvd method, hot wire type's CVD method.In addition, this
A little electrodes can also make above-mentioned conductive material become ink-like, paste by using coatings such as silk-screen printing, flexible printing, ink-jet methods
The material of shape is simultaneously burnt into be formed.But the forming method of these electrodes is not limited to these methods in the present invention.
The material of the gate insulating film 12 of embodiment of the present invention can use silica, silicon nitride, oxidized silicon nitride, oxygen
Change inorganic material or the PMMA (poly-methyl methacrylates such as aluminium, tantalum oxide, yttrium oxide, hafnium oxide, hafnium, zirconium oxide, titanium oxide
Ester) etc. polyacrylate, PVA (polyvinyl alcohol), PVP (polyvinylphenol) etc..In order to be more easily formed gate insulating film
12 and recess portion, preferably using having photosensitive application type insulating materials, but the present invention is not limited to these.In addition,
For suppressor grid leakage current, the preferred resistivity of insulating materials is 1011Ω cm or more, more preferably 1014Ω cm or more.
Polythiophene, polyene can be used as organic semiconducting materials for the semiconductor layer 15 of embodiment of the present invention
Propyl amine, fluorenes union II thiophene copolymers and their derivative grade height molecular organic semiconductor material and pentacene and four
Benzene, copper phthalocyanine, bis- (triisopropylsilyl acetenyl) pentacenes (TIPS- pentacenes) of 6,13- and their derivative
Equal low molecules organic semiconducting materials, or organic semi-conductor precursor can be converted by heat treatment etc., semiconductor is made
Material ink uses.In addition, the carbon compounds such as carbon nanotube or fullerene or semi-conductor nano particles dispersion liquid etc. also may be used
Materials'use as semiconductor layer.When using semiconductor material ink, toluene or dimethylbenzene, dihydro can be used as solvent
Change indenes, tetrahydronaphthalene, propylene glycol methyl ether acetate etc., but is not limited to these.
The material of the protective layer 16 of embodiment of the present invention preferably uses polyvinylphenol, poly-methyl methacrylate
The Polymer Solutions such as ester, polyimides, polyvinyl alcohol, epoxy resin, fluororesin are dispersed with the grains such as aluminium oxide or silica gel
The solution of son.In addition, as the forming method of protective layer 16, it is preferable to use utilize silk-screen printing, flexible printing or ink-jet
The method that the damp process such as method directly form pattern.
Compound can enumerate mercaptan compound or two contained in the lyophoby treatment of printing ink used in embodiment of the present invention
Sulfide or silane coupling agent or phosphinic acid compounds etc., but it is not limited to these.As these compounds, can use
The alkanethiols such as ethyl mercaptan, propanethiol, butyl mercaptan, amyl hydrosulfide, hexyl mercaptan, heptanthiol, spicy thioalcohol, decyl mercaptan, octadecanethiol
Class, the aromatic mercaptans classes such as benzenethiol, fluorobenzenethiol, phenyl-pentafluoride mercaptan, the disulphide such as diphenyl disulfide, methyl trimethoxy
Oxysilane, ethyl trimethoxy silane, propyl trimethoxy silicane, octyl trimethoxy silane, octyltri-ethoxysilane,
The silane such as octyltrichlorosilane, octadecyl trimethoxysilane, octadecyltriethoxy silane, octadecyl trichlorosilane alkane
Coupling agent, phosphate cpds such as octadecylphosphonic acid etc., but it is not limited to these.In addition, alcohol series solvent can be used in solvent, it can
To use 1- propyl alcohol, n-butyl alcohol, 2- butanol, 3- amylalcohols, 2-methyl-1-butene alcohol, 2- methyl -2- butanol, isoamyl alcohol, 3- methyl -
2- butanol, 4- methyl -2- amylalcohols, allyl alcohol, propylene glycol monomethyl ether, propylene glycol monoethyl etc., but it is not limited to this
A bit.
The material of the interlayer dielectric 17 of embodiment of the present invention can use polyimides, polyamide, polyester, polyethylene
Base phenol, polyvinyl alcohol, polyvinyl acetate, polyurethane, polysulfones, Kynoar, cyanoethyl pullulan, asphalt mixtures modified by epoxy resin
Fat, benzocyclobutane olefine resin, acrylic resin, polystyrene, makrolon, cyclic polyolefin, fluororesin, has phenolic resin
The polymer alloy or copolymer of machine silicones or these resins, in addition it can use answering for filler containing organic-inorganic etc.
Condensation material, but it is not limited to these.
As the structure for using thin film transistor (TFT) that the pattern forming method of the present invention formed, it is not particularly limited, it can be with
It is any structure of top gate type, bottom gate type.
As the architectural difference other than the configuration of gate electrode 11, can be semiconductor layer 15 the different bottom in position touch type,
Type is contacted, type is touched at preferred bottom when as semiconductor layer 15 using organic semiconducting materials.This is because bottom touches type and contacts type phase
Than the leakage current that can shorten passage length, bigger can be obtained.
1 > of < embodiments
Fig. 2 shows to touch the thin film transistor (TFT) that flexible thin film's transistor array of type is constituted by the bottom gate bottom of embodiment 1
The pattern layout vertical view and cross section structure of the schematic configuration of array 51.Illustrate manufacturing method referring to Fig. 2.This film is brilliant
1 component size of body pipe array 51 is 300 μm of 300 μ m, the element has 240 × 320.
Polyethylene naphthalate (PEN) film is used as plastic base 10.Sputtering film-forming aluminium is utilized on pen film
After 100nm, carry out photoetching process and etching using positive-workingresist, later remove resist, to formed gate electrode 11 and
Electrode for capacitors 19.
It then, will be as the application type photosensitive insulating material of gate dielectric materials (AH series, Hitachi using spin-coating method
At system) coating after, although not shown, but using photoetching process gate wirings portion of terminal formed opening.Later, at 180 DEG C
It is dry, obtain gate insulating film 12.
Then, using vapour deposition method film forming gold 50nm, photoetching process and etching are carried out using positive-workingresist, later by resist
Stripping, to form source electrode 13B and drain electrode 14.
As semiconductor layer formation material, using being mixed with tetrahydronaphthalene and 6, bis- (the triisopropylsilyl second of 13-
Alkynyl) pentacene (TIPS- pentacenes) solution.The formation of semiconductor layer uses flexible printing method.Use feeling in flexible printing
The anilox roll of photosensitiveness resin flexibility version and 150 lines, the semiconductor layer for the shape of stripes that formation width is 100 μm.After printing,
It is 60 minutes dry at 100 DEG C, form semiconductor layer 15.
Then, protective layer 16 is formed.Specifically, using fluorine resin as protective layer forming material.Protective layer is formed
It is middle to use flexible printing.Photoresist flexibility version is used as flexible version, uses 150 line anilox rolls.Use shape of stripes
Flexible version prints the protective layer 16 for the shape of stripes that line width is 150 μm, 100 in the way of covering semiconductor layer 15
It is 90 minutes dry at DEG C, form protective layer 16.
Lyophoby processing is carried out to the drain electrode portion of through-hole 40 to be formed.Through-hole 40 is formed after Fig. 3 is shown in process
The partly shape of the drain electrode 14 of (through-hole formation reservations) and section.Drain electrode 14 has on the position that through-hole forms reservations
Have and is equipped with the opening portion of opening at center.Fig. 4 shows that the lyophoby for the drain electrode 14 for forming reservations from through-hole is handled to layer insulation
Cross sectional shape until the formation of film 17.
As shown in (a) of Fig. 4, the lyophoby treatment of printing ink 22 shootd out from ink gun 21 is coated on through-hole using ink jet printing
It is formed on the drain electrode 14 of reservations.Lyophoby treatment of printing ink 22 contains mercaptan compound or disulphide.Solvent can preferably make
With high boiling alcoholic solvent.The sulphur atom of mercaptan compound or disulphide promptly with the metallic atom chemical combination of drain electrode 14,
Therefore it is lyophobicity that so that through-hole is formed the drain electrode 14 of reservations.Mercaptan compound or disulphide contain fluoro
When alkyl chain, lyophobicity increases.
(b) of Fig. 4 indicates that 22 inking of lyophoby treatment of printing ink shootd out by ink gun 21 forms the electric leakage of reservations in through-hole
The state of 14 inside of pole.There is lyophobicity, the lyophoby of inking to handle on the surface of the gate insulating film 12 formed by photoresist
Ink 22 is first temporarily trapped in the opening of drain electrode 14, but the profit exhibition as shown in (c) of Fig. 4 is more exhausted than grid to wetability quickly
The relatively more good drain electrode 14 of velum 12.By adjusting the coating of the opening diameter and lyophoby treatment of printing ink 22 of drain electrode 14
Lyophoby treatment of printing ink 22 can be only printed on through-hole and be formed on the drain electrode 14 of reservations by amount.
Then, interlayer dielectric 17 is formed.Epoxy resin is used as layer insulation film formation material.Use silk-screen printing
It is formed, it is 1 hour dry at 90 DEG C, interlayer dielectric 17 is made.Interlayer dielectric 17 is according to by thin film transistor (TFT) array
51 modes integrally covered are printed, but as shown in (d) of Fig. 4, are compared to the drain electrode 14 into one that through-hole forms reservations
Printed to step enlarged openings.
When on substrate print interlayer dielectric forming material ink when, ink can flow, but due to through-hole formed it is pre-
Determining 14 surface of drain electrode in portion becomes lyophobicity, therefore as shown in (e) of Fig. 4, in the at the edge part of drain electrode 14, interlayer is exhausted
The flowing of velum material stops, and through-hole 40 can be arranged in the peripheral shape that through-hole forms the drain electrode 14 of reservations.
Later, pixel electrode 18 is formed.As pixel electrode materials'use silver paste agent.The formation of pixel electrode 18 uses silk
Silver paste agent is completely filled in through-hole 40 by wire mark brush.It is 1 hour dry at 90 DEG C after pattern is formed, to be formed as
Plain electrode 18.
Later, electrophoretic medium 20 is clamped between counter electrode, the display of the present embodiment is driven.It is printed despite utilizing
Brush method forms interlayer dielectric 17, but the conducting between pixel electrode 18 and drain electrode 14 can also be made to become good, can carry out
Good image is shown.
1 > of < comparative examples
As comparative example 1, show that the manufacturer of type flexible thin film transistor array 52 is touched at the bottom gate bottom of form shown in Fig. 5
Method.1 component size of this transistor array is 300 μm of 300 μ m, the element has 240 × 320.
Polyethylene naphthalate (PEN) film is used as plastic base 10, forms gate electrode similarly to Example 1
11, electrode for capacitors 19, gate insulating film 12, source electrode 13, drain electrode 14, semiconductor layer 15 and protective layer 16.
It is 2 layers of structure of the first interlayer dielectric 31 and the second interlayer dielectric 32, any one layer to make interlayer dielectric 17
Between insulating film 31,32 use material same as Example 1 and printing process.But the first interlayer dielectric 31 is in base
It is formed with 0.5 μ m-thick of film thickness in plate whole face.The gamma-butyrolacton of 3 25pL or so is added dropwise using ink jet printing in through-hole section
Drop.Then, it in order to make the drain electrode 14 of through-hole section be lyophobicity, uses ink jet printing to be coated with similarly to Example 1 and dredges
Liquid treatment of printing ink 22.Then, the second interlayer dielectric 32 is formed with 2.5 μ m-thick of film thickness.
Pixel electrode 18 is formed similarly to Example 1, electrophoretic medium 20 is clamped between counter electrode, to comparative example 1
Display driven, as a result in the through-hole section of interlayer dielectric 17 on the insufficient position of trepanning, pixel electrode 18 with
The conducting of drain electrode 14 is hindered, and vanishing point is more, fails to carry out good display.
As described above, according to the present invention it is possible to provide in the formation of interlayer dielectric without using photoetching process, layer
Between insulating film the few thin film transistor (TFT) array and image display device of defect.
Industrial availability
Flexible thin film's transistor of the present invention can be as the switch member of flexible electrical paper or flexible organic el display etc.
Part etc. is utilized.In turn, it can be made contributions to the raising of productivity by using the present invention for its manufacturing method.Tool
It says to body, since print process can be used to form interlayer dielectric, large area can be formed but production interval time is short
Thin film transistor (TFT) array.In addition, due to the uncoated resin for forming interlayer dielectric on the drain electrode of through-hole section, can fill
The conducting for dividing ground to ensure drain electrode and pixel electrode.Thus, it is possible to low cost and high-quality make can be applied to it is flexible aobvious
Show flexible thin film's transistor of the wide scopes such as device or IC card, IC tag.
Symbol description
10 plastic bases
11 gate electrodes
12 gate insulating films
13A source electrodes
13B source electrodes
14 drain electrodes
15 semiconductor layers
16 protective layers
17 interlayer dielectrics
18 pixel electrodes
19 electrode for capacitors
20 electrophoretic mediums
21 ink guns
22 lyophoby treatment of printing ink
31 first interlayer dielectrics
32 second interlayer dielectrics
40 through-holes
50 thin film transistor (TFT) arrays
51 thin film transistor (TFT) arrays
52 thin film transistor (TFT) arrays
Claims (8)
1. a kind of thin film transistor (TFT) array is that at least have insulating substrate, gate electrode, gate insulating film, source electrode, electric leakage
Pole, semiconductor layer, the protective layer of the covering semiconductor layer, pixel electrode and it is formed in the drain electrode and the pixel
The thin film transistor (TFT) array of interlayer dielectric between electrode, wherein
The interlayer dielectric is organic film or organic and inorganic hybrid films,
The interlayer dielectric has through-hole so that the pixel electrode connects in the part for being formed with the position of the drain electrode
It is connected to the drain electrode,
The drain electrode has the opening portion for being located in the through-hole and being formed with opening on electrode material,
There are mercapto or disulfide groups on the drain electrode in the through-hole.
2. thin film transistor (TFT) array according to claim 1, wherein the open end of the through-hole is present in the drain electrode
End or the drain electrode on.
3. thin film transistor (TFT) array according to claim 1 or 2, wherein the thickness of the interlayer dielectric be 0.5 μm with
It is upper and 5 μm or less.
4. thin film transistor (TFT) array according to claim 1 or 2, wherein the interlayer dielectric using ink jet printing method,
Silk screen print method or gravure offset are formed.
5. thin film transistor (TFT) array according to claim 1 or 2, wherein the semiconductor layer is organic semiconductor layer.
6. thin film transistor (TFT) array according to claim 1 or 2, wherein the insulating substrate is plastic base.
7. it is aobvious to have thin film transistor (TFT) array and image according to any one of claims 1 to 6 for a kind of image display device
Show medium.
8. image display device according to claim 7, wherein described image display medium is Jie using electrophoretic
Matter.
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PCT/JP2014/004704 WO2015045317A1 (en) | 2013-09-25 | 2014-09-11 | Thin film transistor array and image display device |
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JP4385812B2 (en) * | 2004-03-26 | 2009-12-16 | 株式会社日立製作所 | Thin film transistor and manufacturing method thereof |
JP5194468B2 (en) * | 2006-03-07 | 2013-05-08 | コニカミノルタホールディングス株式会社 | Organic thin film transistor manufacturing method and organic thin film transistor |
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