CN105576499A - InP groove corrosion method - Google Patents
InP groove corrosion method Download PDFInfo
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- CN105576499A CN105576499A CN201510984297.4A CN201510984297A CN105576499A CN 105576499 A CN105576499 A CN 105576499A CN 201510984297 A CN201510984297 A CN 201510984297A CN 105576499 A CN105576499 A CN 105576499A
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- Prior art keywords
- layer
- inp
- ingaas
- groove
- sio
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
- H01S5/0203—Etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
- H01S5/0205—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth during growth of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/24—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
The invention relates to an InP groove corrosion method. The InP groove corrosion method comprises the following steps of S1, providing an InGaAs-InP-InGaAs device structure, wherein the InGaAs-InP-InGaAs device structure comprises a first InGaAs layer arranged at a surface layer, an InP layer arranged at an intermediate layer and a second InGaAs layer arranged at a bottom layer; S2, growing SiO2 on the surface of the InGaAs layer to form a SiO2 layer, carrying out photoresist coating, and carrying out pattern photoetching on the middle part coated with photoresist; S3, etching the grown SiO2 layer at a pattern photoetching position of the photoresist, and removing the photoresist on a part which is not etched on the SiO2 layer; S4, corroding the middle parts of the first InGaAs layer and the InP layer to form a bowl-shaped groove; S5, continuously corroding the InP layer, wherein the second InGaAs layer is not corroded any longer, and the section of the groove formed in the InP layer is of an isosceles trapezoid; and S6, removing the SiO2 after corrosion is completed. The InP groove corrosion method is implemented by wet etching, and groove morphology control is achieved by changing different proportions of chemical reagents in a process condition.
Description
Technical field
The present invention relates to InP trench process field, particularly a kind of InP trench etching method.
Background technology
The preparation of optical communication semiconductor laser, represents the developing direction of advanced micro-nano technology and device integration process, obtains the great attention of every country in the world.The semiconductor laser of optical communication is the core of optical fiber communication.Current optical communication semiconductor laser is mainly applied InP substrate sheet and is carried out epitaxial growth and rear end processing, and in the processing of rear end, InP trench etching technique is the critical process ensureing laser parameter.
Current InP trench process mainly realizes by dry etching, and dry etching equipment is expensive import plasma etching equipment entirely, and therefore how manufacturer utilizes existing resource own to become the most important thing to realize InP trench etching.
Summary of the invention
In view of this, the object of this invention is to provide a kind of InP trench etching method, realized by wet etching, realized the control of groove pattern by the different ratio changing chemical reagent in process conditions.
The present invention adopts following scheme to realize: a kind of InP trench etching method, comprises the following steps:
Step S1: an InGaAs-InP-InGaAs device architecture is provided, described InGaAs-InP-InGaAs device architecture comprises the 2nd InGaAs layer that an InP layer and that an InGaAs layer, being arranged at top layer is arranged at intermediate layer is arranged at bottom;
Step S2: at the superficial growth SiO of described InGaAs layer
2, form a SiO
2carry out optical cement coating after layer, in the middle part of the optical cement that painting is covered with, carried out to figure photoetching;
Step S3: optical cement figure photoetching place to generate described SiO
2layer etches, and by described SiO
2optical cement in the non-etched portions of layer is removed;
Step S4: corrode the middle part of a described InGaAs layer and described InP layer, the groove of formation is bowl-mouth shape;
Step S5: proceed corrosion to described InP layer, described 2nd InGaAs layer is not corroded, the trench profile that described InP layer is formed is isosceles trapezoid;
Step S6: by described SiO after corrosion terminates
2layer is removed.
Further, in described step S4, use the method for wet etching to corrode, the corrosive liquid of employing comprises Br, HBr and water, and the usage ratio of described Br is 1-5, and the usage ratio of described HBr is 10-50, and the usage ratio of described water is 50-500; The corrosion rate of described corrosive liquid to a described InGaAs layer is 0.03-0.1um/s, is 0.03-0.1um/s to the corrosion rate of described InP layer.
Further, in described step S4, by changing the width of the burden control bowl-mouth shape groove of each content in corrosive liquid, the span of described width is 2um-10um.
Further, in described step S5, use the method for wet etching to corrode, the corrosive liquid of employing comprises H
3pO
4with HCL; Described H
3pO
4usage ratio be 1-10, the usage ratio of described HCL is 1-10, and the corrosion rate of described corrosive liquid to described InP layer is 0.3-1um/min.
Further, in described step S5, by changing degree of tilt α and the gash depth of the burden control isosceles trapezoid of each content of control corrosion rate liquid, the span of described degree of tilt α is 60 °-90 °, and the span of described gash depth is 1um-3um.
Compared with prior art, the present invention utilizes the method for wet etching to make the InP groove meeting requirement on devices, is realized the control of groove pattern by the different ratio changing chemical reagent in process conditions.
Accompanying drawing explanation
Fig. 1 is method flow schematic diagram of the present invention.
Fig. 2 is InGaAs-InP-InGaAs device architecture schematic diagram of the present invention.
Fig. 3 is the device architecture schematic diagram of the present invention after corrosive liquid A corrodes.
Fig. 4 is the device architecture schematic diagram after the present invention completes corrosion.
Embodiment
Below in conjunction with drawings and Examples, the present invention will be further described.
This enforcement provides a kind of InP trench etching method, as shown in Figure 1, comprises the following steps:
Step S1: an InGaAs-InP-InGaAs device architecture is provided, described InGaAs-InP-InGaAs device architecture comprises the 2nd InGaAs layer that an InP layer and that an InGaAs layer, being arranged at top layer is arranged at intermediate layer is arranged at bottom;
Step S2: at the superficial growth SiO of described InGaAs layer
2, form a SiO
2carry out optical cement coating after layer, in the middle part of the optical cement that painting is covered with, carried out to figure photoetching;
Step S3: optical cement figure photoetching place to generate described SiO
2layer etches, and by described SiO
2optical cement in the non-etched portions of layer is removed;
Step S4: corrode the middle part of a described InGaAs layer and described InP layer, the groove of formation is bowl-mouth shape;
Step S5: proceed corrosion to described InP layer, described 2nd InGaAs layer is not corroded, the trench profile that described InP layer is formed is isosceles trapezoid;
Step S6: by described SiO after corrosion terminates
2layer is removed.
In the present embodiment, in described step S4, use the method for wet etching to corrode, the corrosive liquid A of employing comprises Br, HBr and water, and the usage ratio of described Br is 1-5, and the usage ratio of described HBr is 10-50, and the usage ratio of described water is 50-500; The corrosion rate of described corrosive liquid A to a described InGaAs layer is 0.03-0.1um/s, is 0.03-0.1um/s to the corrosion rate of described InP layer.
In the present embodiment, in described step S4, by changing the width of the burden control bowl-mouth shape groove of each content in corrosive liquid A, the span of described width is 2um-10um.
In the present embodiment, described InGaAs-InP-InGaAs device architecture as shown in Figure 2, one InGaAs layer of its mesexine is as barrier layer, different from InP Rotating fields, the present embodiment is by adjustment Br(bromine), HBr(hydrogen bromide) and the ratio of water, reach the effect of corrosion InGaAs layer and InP layer simultaneously.Because corrosive liquid A has corrosiveness to InGaAs and INP, groove facing layer bowl-mouth shape after this step corrosion, as shown in Figure 3, because this corrosion is isotropism, therefore groove width also can be finely tuned by etching time.
In the present embodiment, in described step S5, use the method for wet etching to corrode, the corrosion B liquid of employing comprises H
3pO
4with HCL; Described H
3pO
4usage ratio be 1-10, the usage ratio of described HCL is 1-10, and the corrosion rate of described corrosive liquid B to described InP layer is 0.3 ~ 1um/min.
In the present embodiment, in described step S5, by changing degree of tilt α and the gash depth of the burden control isosceles trapezoid of each content of control corrosion rate liquid B, the span of described degree of tilt α is 60 °-90 °, and the span of described gash depth is 1um-3um.
In the present embodiment, an InGaAs layer on top layer is after excessive erosion, and homopolymer HDPE InP-InGaAs structure as shown in Figure 3, then only corrode InP layer and do not corrode the 2nd InGaAs layer of bottom by continuation corrosion.In direction, InP material 111 crystal orientation, corrosion is anisotropic to corrosive liquid B, by adjustment H
3pO
4(phosphoric acid) and HCL(hydrochloric acid) proportioning realize the control of trench profile degree of tilt α.As shown in Figure 4, the groove width 2um-10um obtained after corrosion, groove depth 1um-3um, trench profile degree of tilt α is at 60 °-90 ° for device architecture after etching.
The foregoing is only preferred embodiment of the present invention, all equalizations done according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (5)
1. an InP trench etching method, is characterized in that: comprise the following steps:
Step S1: an InGaAs-InP-InGaAs device architecture is provided, described InGaAs-InP-InGaAs device architecture comprises the 2nd InGaAs layer that an InP layer and that an InGaAs layer, being arranged at top layer is arranged at intermediate layer is arranged at bottom;
Step S2: at the superficial growth SiO of described InGaAs layer
2, form a SiO
2carry out optical cement coating after layer, in the middle part of the optical cement that painting is covered with, carried out to figure photoetching;
Step S3: optical cement figure photoetching place to generate described SiO
2layer etches, and by described SiO
2optical cement in the non-etched portions of layer is removed;
Step S4: corrode the middle part of a described InGaAs layer and described InP layer, the groove of formation is bowl-mouth shape;
Step S5: proceed corrosion to described InP layer, described 2nd InGaAs layer is not corroded, the trench profile that described InP layer is formed is isosceles trapezoid;
Step S6: by described SiO after corrosion terminates
2layer is removed.
2. a kind of InP trench etching method according to claim 1, it is characterized in that: in described step S4, the method of wet etching is used to corrode, the corrosive liquid adopted comprises Br, HBr and water, the usage ratio of described Br is 1-5, the usage ratio of described HBr is 10-50, and the usage ratio of described water is 50-500; The corrosion rate of described corrosive liquid to a described InGaAs layer is 0.03-0.1um/s, is 0.03-0.1um/s to the corrosion rate of described InP layer.
3. a kind of InP trench etching method according to claim 1, is characterized in that: in described step S4, and by changing the width of the burden control bowl-mouth shape groove of each content in corrosive liquid, the span of described width is 2um-10um.
4. a kind of InP trench etching method according to claim 1, is characterized in that: in described step S5, and use the method for wet etching to corrode, the corrosive liquid of employing comprises H
3pO
4with HCL; Described H
3pO
4usage ratio be 1-10, the usage ratio of described HCL is 1-10, and the corrosion rate of described corrosive liquid to described InP layer is 0.3-1um/min.
5. a kind of InP trench etching method according to claim 1, it is characterized in that: in described step S5, by changing degree of tilt α and the gash depth of the burden control isosceles trapezoid of each content of control corrosion rate liquid, the span of described degree of tilt α is 60 °-90 °, and the span of described gash depth is 1um-3um.
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CN201510984297.4A CN105576499A (en) | 2015-12-25 | 2015-12-25 | InP groove corrosion method |
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CN201510984297.4A CN105576499A (en) | 2015-12-25 | 2015-12-25 | InP groove corrosion method |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111541149A (en) * | 2020-05-15 | 2020-08-14 | 陕西源杰半导体技术有限公司 | 10G anti-reflection laser and preparation process thereof |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11191654A (en) * | 1997-12-26 | 1999-07-13 | Hitachi Ltd | Semiconductor laser device and its manufacture |
CN1536722A (en) * | 2003-04-03 | 2004-10-13 | 中国科学院半导体研究所 | Method for making high speed electroabsorption modulator |
CN101022208A (en) * | 2006-02-15 | 2007-08-22 | 中国科学院半导体研究所 | Structure of longwave long vertical cavity face emission laser and producing method |
CN101471541A (en) * | 2007-12-26 | 2009-07-01 | 中国科学院半导体研究所 | Method for making laminated travelling wave electroabsorption modulation laser with epitaxial selection region |
CN101969179A (en) * | 2010-11-24 | 2011-02-09 | 武汉华工正源光子技术有限公司 | Method for manufacturing reversed-mesa-type ridged waveguide semiconductor laser |
CN102368591A (en) * | 2011-10-28 | 2012-03-07 | 武汉华工正源光子技术有限公司 | Manufacturing method for distributed-feedback semiconductor laser with bar-shaped burying |
-
2015
- 2015-12-25 CN CN201510984297.4A patent/CN105576499A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11191654A (en) * | 1997-12-26 | 1999-07-13 | Hitachi Ltd | Semiconductor laser device and its manufacture |
CN1536722A (en) * | 2003-04-03 | 2004-10-13 | 中国科学院半导体研究所 | Method for making high speed electroabsorption modulator |
CN101022208A (en) * | 2006-02-15 | 2007-08-22 | 中国科学院半导体研究所 | Structure of longwave long vertical cavity face emission laser and producing method |
CN101471541A (en) * | 2007-12-26 | 2009-07-01 | 中国科学院半导体研究所 | Method for making laminated travelling wave electroabsorption modulation laser with epitaxial selection region |
CN101969179A (en) * | 2010-11-24 | 2011-02-09 | 武汉华工正源光子技术有限公司 | Method for manufacturing reversed-mesa-type ridged waveguide semiconductor laser |
CN102368591A (en) * | 2011-10-28 | 2012-03-07 | 武汉华工正源光子技术有限公司 | Manufacturing method for distributed-feedback semiconductor laser with bar-shaped burying |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111541149A (en) * | 2020-05-15 | 2020-08-14 | 陕西源杰半导体技术有限公司 | 10G anti-reflection laser and preparation process thereof |
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Application publication date: 20160511 |