CN105575797A - Photoresist backflow preparation method capable of reducing inclination angle of medium on etched wafer - Google Patents

Photoresist backflow preparation method capable of reducing inclination angle of medium on etched wafer Download PDF

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Publication number
CN105575797A
CN105575797A CN201510974649.8A CN201510974649A CN105575797A CN 105575797 A CN105575797 A CN 105575797A CN 201510974649 A CN201510974649 A CN 201510974649A CN 105575797 A CN105575797 A CN 105575797A
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CN
China
Prior art keywords
wafer
photoresistance
medium
inclination angle
baking
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Pending
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CN201510974649.8A
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Chinese (zh)
Inventor
居碧玉
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Suzhou Industrial Park Co Ltd Of Industries Based On Nanotechnology Institute For Research And Technology
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Suzhou Industrial Park Co Ltd Of Industries Based On Nanotechnology Institute For Research And Technology
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Priority to CN201510974649.8A priority Critical patent/CN105575797A/en
Publication of CN105575797A publication Critical patent/CN105575797A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31058After-treatment of organic layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

The invention discloses a photoresist backflow preparation method capable of reducing the inclination angle of a medium on an etched wafer. According to the method, the baking operation is additionally conducted after the completion of the normal yellow light process, and the cross section of a photoresist is baked from the shape of a regular trapezoid into the shape of a semicircle. Meanwhile, the etching is conducted through selecting an appropriate etch comparison medium, and the inclination angle of the medium is set to be about 40 degrees. After the normal yellow light process, the cross section of the photoresist is baked from the shape of a regular trapezoid into the shape of a semicircle through the baking operation. Since the yellow light process is as usual, the yellow light process is conducted at an optimal condition. Therefore, an optimal graph can be obtained and the line width can be controlled accurately. After the appropriate baking condition is figured out, the inclination angle of the medium can be controlled within a standard range after the baking of the photoresist only on the condition that the selection ratio of the photoresist fluctuates within a normal range.

Description

A kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method
Technical field
The present invention relates to wafer production field, particularly relate to a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method.
Background technology
In the manufacturing process of traditional gold-tinted, generally the section of photoresistance is trapezoid, and inclination angle is greater than 83 degree, and the inclination angle of the section after medium etching is also be greater than 83 degree.Along with the development of MEMS, had increasing requirement to the figure after medium etching, such as after etching, the inclination angle of medium is 40 degree.
In order to the medium section inclination angle after etching reaches 40 degree, existing solution has the following two kinds:
1., by the focus (focusing) during adjustment exposure, the section inclination angle of photoresistance is adjusted to about 40 degree.Etch the photoresistance pattern after according to development and carry out normal etches, make medium inclination angle reach 40 degree.The inclination angle of photoresistance will adjust to 40 degree, needs focus to adjust toward positive direction, and when focus is too many toward positive direction, the definition of figure can be deteriorated, and bottomCD (bottom live width) is difficult to ensure.
2. by reducing the thickness of photoresistance, coordinate the suitable Selection radio of etching that the inclination angle of medium after etching is adjusted to 40 degree, but bottomCD (bottom live width) goes to control by the stability of etching machine, have very high requirement to the uniformity of photoresistance thickness and the stability of etching machine like this, and the uniformity between sheet is also difficult to ensure.
Because above-mentioned defect, the design people, actively in addition research and innovation, to found a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, make it have more value in industry.
Summary of the invention
For solving the problems of the technologies described above, the object of this invention is to provide a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, the inclination angle of photoresistance can be accomplished between 30-60 degree by the method, and can ensure the uniformity of photoresistance, and bottom live width is controlled accurately.
The present invention propose a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: comprise the following steps:
(1) one deck photoresistance is applied at the dielectric surface of wafer (wafer);
(2) wafer (wafer) having applied photoresistance is exposed according to the size of light shield;
(3) wafer (wafer) development treatment will exposed, photoresistance through overexposure can be removed with developer solution generation chemical reaction, do not have the photoresistance exposed can stay the dielectric surface of wafer (wafer), the photoresistance section pattern staying wafer (wafer) dielectric surface is trapezoidal;
(4) wafer (wafer) leaving photoresistance being toasted, when keeping the bottomCD (bottom live width) of wafer (wafer) constant, allowing photoresistance reflux, the section of photoresistance is become semicircle;
(5) etch the wafer (wafer) after baking, etching selectivity fluctuates and just can control in specification by the inclination angle of medium in normal range (NR), the final wafer medium that must arrive inclination angle and diminish.
As the further improvement of the inventive method, the medium described in step (1) is SiO 2, Si 3n 4, one in this three of Metal.
As the further improvement of the inventive method, in step (4), baking equipment used is the one in hot plate, dry method Asher (ashing) resist remover, this three of baking oven.
As the further improvement of the inventive method, described in step (4), the temperature of baking is 150 ~ 220 degree.
As the further improvement of the inventive method, described in step (4), the time of baking is 1 ~ 10 minute.
As the further improvement of the inventive method, described in step (5), the normal range (NR) of etching selectivity is 1:1 ~ 1:2.
By such scheme; the present invention at least has the following advantages: first three kind step of the inventive method is normal gold-tinted technique; by increasing by a step baking after normal gold-tinted technique terminates; the section of photoresistance is baked into semicircle from trapezoid; select suitable etching selectivity (1:1 to 1:2) to etch medium, just the inclination angle of medium can be accomplished about 40 degree.
After normal gold-tinted technique, by baking, the section of photoresistance is become semicircle from trapezoid.Because gold-tinted process is normal, gold-tinted can select optimal conditions operation, optimum figure can be obtained, live width can be controlled accurately, after debugging out suitable baking condition, just the inclination angle of medium can be controlled in specification as long as photoresistance fluctuates in normal range (NR) through overbaking after etching Selection radio.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to better understand technological means of the present invention, and can be implemented according to the content of specification, coordinates accompanying drawing to be described in detail as follows below with preferred embodiment of the present invention.
Accompanying drawing explanation
Fig. 1 is the Electronic Speculum figure by crystal column surface photoresistance before the inventive method baking;
Fig. 2 is the Electronic Speculum figure by crystal column surface photoresistance after the inventive method baking.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Embodiment: a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: comprise the following steps:
(1) one deck photoresistance is applied at the dielectric surface of wafer (wafer);
(2) wafer (wafer) having applied photoresistance is exposed according to the size of light shield;
(3) wafer (wafer) development treatment will exposed, photoresistance through overexposure can be removed with developer solution generation chemical reaction, do not have the photoresistance exposed can stay the dielectric surface of wafer (wafer), the photoresistance section pattern staying wafer (wafer) dielectric surface is trapezoidal;
(4) wafer (wafer) leaving photoresistance being toasted, when keeping the bottomCD (bottom live width) of wafer (wafer) constant, allowing photoresistance reflux, the section of photoresistance is become semicircle;
(5) etch the wafer (wafer) after baking, etching selectivity fluctuates and just can control in specification by the inclination angle of medium in normal range (NR), the final wafer medium that must arrive inclination angle and diminish.
Medium described in step (1) is SiO 2, Si 3n 4, one in this three of Metal.
In step (4), baking equipment used is the one in hot plate, dry method Asher (ashing) resist remover, this three of baking oven.
Described in step (4), the temperature of baking is 150 ~ 220 degree.
Described in step (4), the time of baking is 1 ~ 10 minute.
Described in step (5), the normal range (NR) of etching selectivity is 1:1 ~ 1:2.
Step (1) ~ step (3) is normal gold-tinted technique; by increasing by a step baking after normal gold-tinted technique terminates; the section of photoresistance is baked into semicircle from trapezoid; select suitable etching selectivity (1:1 to 1:2) to etch medium, just the inclination angle of medium can be accomplished about 40 degree.
After normal gold-tinted technique, by baking, the section of photoresistance is become semicircle from trapezoid.Because gold-tinted process is normal, gold-tinted can select optimal conditions operation, optimum figure can be obtained, live width can be controlled accurately, after debugging out suitable baking condition, just the inclination angle of medium can be controlled in specification as long as photoresistance fluctuates in normal range (NR) through overbaking after etching Selection radio.
The above is only the preferred embodiment of the present invention; be not limited to the present invention; should be understood that; for those skilled in the art; under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and modification, these improve and modification also should be considered as protection scope of the present invention.

Claims (6)

1. the photoresistance backflow preparation method that after making etching, on wafer, medium inclination angle diminishes, is characterized in that: comprise the following steps:
(1) one deck photoresistance is applied at the dielectric surface of wafer (wafer);
(2) wafer (wafer) having applied photoresistance is exposed according to the size of light shield;
(3) wafer (wafer) development treatment will exposed, photoresistance through overexposure can be removed with developer solution generation chemical reaction, do not have the photoresistance exposed can stay the dielectric surface of wafer (wafer), the photoresistance section pattern staying wafer (wafer) dielectric surface is trapezoidal;
(4) wafer (wafer) leaving photoresistance being toasted, when keeping the bottomCD (bottom live width) of wafer (wafer) constant, allowing photoresistance reflux, the section of photoresistance is become semicircle;
(5) etch the wafer (wafer) after baking, etching selectivity fluctuates and just can control in specification by the inclination angle of medium in normal range (NR), the final wafer medium that must arrive inclination angle and diminish.
2. according to claim 1 a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: the medium described in step (1) is SiO 2, Si 3n 4, one in this three of Metal.
3. according to claim 2 a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: in step (4), baking equipment used is the one in hot plate, dry method Asher (ashing) resist remover, this three of baking oven.
4. according to claim 3 a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: described in step (4), the temperature of baking is 150 ~ 220 degree.
5. according to claim 4 a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: described in step (4), the time of baking is 1 ~ 10 minute.
6. according to claim 5 a kind of make etching after medium inclination angle diminishes on wafer photoresistance backflow preparation method, it is characterized in that: described in step (5), the normal range (NR) of etching selectivity is 1:1 ~ 1:2.
CN201510974649.8A 2015-12-23 2015-12-23 Photoresist backflow preparation method capable of reducing inclination angle of medium on etched wafer Pending CN105575797A (en)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN112447501A (en) * 2019-08-30 2021-03-05 台湾积体电路制造股份有限公司 Method for forming patterned photoresist layer

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Publication number Priority date Publication date Assignee Title
CN112447501A (en) * 2019-08-30 2021-03-05 台湾积体电路制造股份有限公司 Method for forming patterned photoresist layer
TWI742820B (en) * 2019-08-30 2021-10-11 台灣積體電路製造股份有限公司 Method for forming patterned photoresist
US11886121B2 (en) 2019-08-30 2024-01-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming patterned photoresist

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