CN105575777A - Deposition method, interlayer dielectric layer and semiconductor device - Google Patents
Deposition method, interlayer dielectric layer and semiconductor device Download PDFInfo
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- CN105575777A CN105575777A CN201410534859.0A CN201410534859A CN105575777A CN 105575777 A CN105575777 A CN 105575777A CN 201410534859 A CN201410534859 A CN 201410534859A CN 105575777 A CN105575777 A CN 105575777A
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Abstract
The invention discloses a deposition method, an interlayer dielectric layer and a semiconductor device, wherein the deposition method comprises the steps of placing a semiconductor substrate on an electrostatic chuck in a deposition chamber; activating an RF source for heating the deposition chamber; making the electrostatic chuck be grounded, thereby forming a discharging loop with the semiconductor substrate; and inputting to-be-reacted gas into the deposition chamber, thereby realizing deposition on the semiconductor substrate for forming a film. According to the deposition method, the deposition chamber is heated through activating the RF source; and then the electrostatic chuck is grounded for forming a discharge loop with the semiconductor substrate, thereby discharging charges which are accumulated on the semiconductor substrate in a heating process, reducing the number of charges which are accumulated on the semiconductor substrate in a film deposition process, reducing plasma damage generated in the film deposition process, improving breakdown resistance of the semiconductor device and improving reliability of the semiconductor device.
Description
Technical field
The application relates to the technical field of semiconductor integrated circuit, in particular to a kind of deposition process, interlayer dielectric layer and semiconductor device.
Background technology
In the manufacturing process of semiconductor device, usual needs on semiconductor substrate deposit film to form required device, such as on semiconductor substrate depositing metal films as interconnecting metal layer, more such as on semiconductor substrate deposition medium film (such as SiN film) as interlayer dielectric layer etc.The compact structure of deposit film in order to improve, usually plasma process and chemical vapor deposition method are combined in the deposition process of film, such as, adopt plasma reinforced chemical vapour deposition technique (PECVD) or high density plasma CVD technique (HDPCVD) deposit film.
The deposition process of existing film comprises the following steps: be placed in by semiconductor substrate on the electrostatic chuck of settling chamber; Pass into question response gas to settling chamber, open radio frequency source, and adopt low radio frequency power to heat question response gas; Adopt high RF power ionization question response gas to form plasma, and deposition form film on semiconductor substrate.As a kind of typical case, above-mentioned radio frequency source comprises the first radio frequency source be positioned at above settling chamber and the second radio frequency source being positioned at side, settling chamber.In the step of heating question response gas, the power of the first radio frequency source is 3000W, and the power of the second radio frequency source is 4000W.
But the electric charge of plasma generation can be accumulated on semiconductor substrate in above-mentioned deposition process, and electric charge can conduct on the grid in semiconductor substrate, thus form leakage current in gate oxide square under the gate.When the electric charge accumulated exceedes some, this leakage current can damage gate oxide, thus reduces the resistance to sparking energy of semiconductor device, such as relevant with time dielectric breakdown (TDDB).Usually this situation is called plasma damage (PID), is also called antenna effect (PAE).For the problems referred to above, also there is no effective solution at present.
Summary of the invention
The application aims to provide a kind of deposition process, interlayer dielectric layer and semiconductor device, to reduce the plasma damage produced in film deposition process, and then improves the resistance to sparking energy of semiconductor device.
To achieve these goals, this application provides a kind of deposition process, this deposition process comprises: be placed in by semiconductor substrate on the electrostatic chuck of settling chamber; Open radio frequency source to carry out heat temperature raising to settling chamber; By electrostatic chuck ground connection, form discharge loop to make semiconductor substrate; Question response gas is passed into, to form film in semiconductor substrate deposition in settling chamber.
Further, in above-mentioned deposition process, radio frequency source comprises the first radio frequency source be positioned at above settling chamber and the second radio frequency source being positioned at side, settling chamber; In the step of heat temperature raising, the power of the first radio frequency source is 1800 ~ 2200W, and the power of the second radio frequency source is 2700 ~ 3300W.
Further, in above-mentioned deposition process, by the step of electrostatic chuck ground connection, the power of the first radio frequency source is 0 ~ 800W, and the power of the second radio frequency source is 0 ~ 1000W.
Further, in above-mentioned deposition process, the time of the step of electrostatic chuck ground connection is 1 ~ 10s.
Further, in above-mentioned deposition process, deposition process is high density plasma CVD.
Further, in above-mentioned deposition process, semiconductor substrate deposits film forming step and comprises: deposition forms gasket film on semiconductor substrate; On substrate film, deposition forms main film.
Further, in above-mentioned deposition process, film is dielectric film.
Present invention also provides a kind of interlayer dielectric layer, wherein, interlayer dielectric layer is made by the deposition process that the application is above-mentioned.
Present invention also provides a kind of semiconductor device, comprise semiconductor substrate and be positioned at the interlayer dielectric layer on semiconductor substrate, wherein, interlayer dielectric layer is made by the deposition process that the application is above-mentioned.
The technical scheme of application the application, by opening radio frequency source to carry out heat temperature raising to settling chamber, then electrostatic chuck ground connection is formed discharge loop to make semiconductor substrate, the electric charge be accumulated in heating up process on semiconductor substrate is derived, thus decrease in film deposition process the electric charge be accumulated on semiconductor substrate, and decrease the plasma damage produced in film deposition process, and then improve the resistance to sparking energy of semiconductor device, and improve the reliability of device.Further, due to the radio-frequency power adopting hinge structure lower in heat temperature raising step, thus avoid adopt high RF power to carry out in heat temperature raising step directly producing puncture damage or produce a large amount of stored charge, and then further reduce in film deposition process the electric charge be accumulated on semiconductor substrate.
Accompanying drawing explanation
The Figure of description forming a application's part is used to provide further understanding of the present application, and the schematic description and description of the application, for explaining the application, does not form the improper restriction to the application.In the accompanying drawings:
Fig. 1 shows the schematic flow sheet of the deposition process that the application's execution mode provides;
Fig. 2 shows the charge pattern on device surface that the application's comparative example 1 obtains;
Fig. 3 shows the charge pattern on device surface that the embodiment of the present application 1 obtains; And
Fig. 4 shows the Weibull distribution curve that the embodiment of the present application 1 to 4 and comparative example 1 obtain the time correlation dielectric breakdown time of device.
Embodiment
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the application in detail in conjunction with the embodiments.
It should be noted that used term is only to describe embodiment here, and be not intended to the illustrative embodiments of restricted root according to the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative is also intended to comprise plural form, in addition, it is to be further understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates existing characteristics, step, operation, device, assembly and/or their combination.
For convenience of description, here can usage space relative terms, as " ... on ", " in ... top ", " at ... upper surface ", " above " etc., be used for the spatial relation of description device or feature and other devices or feature.Should be understood that, exemplary term " in ... top " can comprise " in ... top " and " in ... below " two kinds of orientation.This device also can other different modes location (90-degree rotation or be in other orientation), and relatively describe space used here and make respective explanations.
As what introduce in background technology, in film deposition process, plasma can produce plasma damage, thus reduces the resistance to sparking energy of semiconductor device.Present inventor studies for the problems referred to above, proposes a kind of deposition process.This deposition process for forming film on semiconductor substrate, and as shown in Figure 1, this deposition process comprises: be placed in by semiconductor substrate on the electrostatic chuck of settling chamber; Open radio frequency source to carry out heat temperature raising to settling chamber; By electrostatic chuck ground connection, form discharge loop to make semiconductor substrate; Question response gas is passed into, to form film in semiconductor substrate deposition in settling chamber.
Above-mentioned deposition process is by opening radio frequency source to carry out heat temperature raising to settling chamber, then electrostatic chuck ground connection is formed discharge loop to make semiconductor substrate, the electric charge be accumulated in heating up process on semiconductor substrate is derived, thus decrease in film deposition process the electric charge be accumulated on semiconductor substrate, and decrease the plasma damage produced in film deposition process, and then improve the resistance to sparking energy of semiconductor device, and improve the reliability of device.Further, due to the radio-frequency power adopting hinge structure lower in heat temperature raising step, thus avoid adopt high RF power to carry out in heat temperature raising step directly producing puncture damage or produce a large amount of stored charge, and then further reduce in film deposition process the electric charge be accumulated on semiconductor substrate.
The technique that above-mentioned deposition process using plasma and chemical vapour deposition (CVD) combine, such as plasma reinforced chemical vapour deposition or high density plasma CVD etc.In order to improve structural homogeneity and the covering power of deposit film further, in a preferred embodiment, above-mentioned deposition process is high density plasma CVD.The film adopting this deposition process to be formed can be dielectric film, such as SiO2 film.Certainly, also can form other films with this deposition process, such as, be used as the metallic film etc. of interconnecting metal layer.
The depositing device that above-mentioned deposition process can adopt this area common carries out.Different equipment can have different structures, but does not affect the enforcement of this deposition process.In a preferred embodiment, in the depositing device adopted, radio frequency source comprises the first radio frequency source be positioned at above settling chamber and the second radio frequency source being positioned at side, settling chamber.Now, the plasma by radio-frequency drive formation in settling chamber is more even.Exemplarily, in following operating procedure, radio frequency source all adopts this preferred implementation.
In the step of heating question response gas, adopt low radio frequency power heating question response gas.In a preferred embodiment, the power of the first radio frequency source is 1800 ~ 2200W, and the power of the second radio frequency source is 2700 ~ 3300W.Compared to existing technology, this preferred implementation reduces the power of radio frequency source in the step of heating question response gas, to reduce the electric charge be accumulated on semiconductor substrate further, and reduces the plasma damage produced in film deposition process further.The time of heat temperature raising and temperature can set according to the material of institute's deposit film, and those skilled in the art has the ability according to the instruction of the application and prior art setting above-mentioned parameter.
Semiconductor substrate above-mentioned by the step of electrostatic chuck ground connection, the mode of electrostatic chuck ground connection had a variety of (such as can by wire by electrostatic chuck ground connection), as long as can be made to form discharge loop.Radio frequency source can be stayed open state in this step, and the power of radio frequency source can set according to actual process demand.In a preferred embodiment, the power of the first radio frequency source is 0 ~ 800W in this step, and the power of the second radio frequency source is 0 ~ 1000W.Now, the electric charge be accumulated on semiconductor substrate can export to beyond semiconductor substrate more completely, thus further reduce the plasma damage produced in film deposition process, and further increases the resistance to sparking energy of semiconductor device.
The time of electrostatic chuck ground connection can set according to the quantity of the electric charge be accumulated on semiconductor substrate.Inventor draws after experiment and theoretical research, when the time of electrostatic chuck ground connection is 1 ~ 10s, the electric charge be accumulated on semiconductor substrate can export to beyond semiconductor substrate more completely, thus further reduce the plasma damage produced in film deposition process, and further increase the resistance to sparking energy of semiconductor device.
Above-mentionedly on semiconductor substrate, deposit film forming step comprise: deposition forms gasket film on semiconductor substrate; On substrate film, deposition forms main film.When deposit liner film and main film, form the power of radio frequency source during different film or gaseous species and flow slightly different, and those skilled in the art have the ability according to the power of film forming kind setting radio frequency source.
Meanwhile, present invention also provides a kind of interlayer dielectric layer, this interlayer dielectric layer is made by the deposition process that the application is above-mentioned.Plasma damage in this interlayer dielectric layer is reduced, thus further increases the resistance to sparking energy of interlayer dielectric layer.
Present invention also provides a kind of semiconductor device, comprise semiconductor substrate and be positioned at the interlayer dielectric layer on semiconductor substrate, this interlayer dielectric layer is made by the deposition process that the application is above-mentioned.Plasma damage in this semiconductor device is reduced, thus further increases the resistance to sparking energy of semiconductor device.
Illustrative embodiments according to the application will be described in more detail below.But these illustrative embodiments can be implemented by multiple different form, and should not be interpreted as being only limited to execution mode set forth herein.Should be understood that, provide these execution modes be in order to make the application open thorough and complete, and the design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art.
Below for interlayer dielectric layer on semiconductor substrate, and further illustrate the deposition process that the application provides in conjunction with the embodiments.
Embodiment 1
Present embodiments provide a kind of deposition process of interlayer dielectric layer, this deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source to carry out heat temperature raising to settling chamber, wherein the power of the first radio frequency source is 1800W, and the power of the second radio frequency source is 2700W;
By electrostatic chuck ground connection, to make semiconductor substrate form discharge loop, wherein the power of the first radio frequency source and the first radio frequency source is 0, and the time of electrostatic chuck ground connection is 1s;
In described settling chamber, pass into question response gas, and deposition forms film on semiconductor substrate, wherein the step of deposit film comprises gasket film deposition step and main thin film deposition steps.
Embodiment 2
Present embodiments provide a kind of deposition process of interlayer dielectric layer, this deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source to carry out heat temperature raising to settling chamber, wherein the power of the first radio frequency source is 2200W, and the power of the second radio frequency source is 3300W;
By electrostatic chuck ground connection, to make semiconductor substrate form discharge loop, wherein the power of the first radio frequency source is 800W, and the power of the second radio frequency source is 1000W, and the time of electrostatic chuck ground connection is 10s;
In described settling chamber, pass into question response gas, and deposition forms film on semiconductor substrate, wherein the step of deposit film comprises gasket film deposition step and main thin film deposition steps.
Embodiment 3
Present embodiments provide a kind of deposition process of interlayer dielectric layer, this deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source to carry out heat temperature raising to settling chamber, wherein the power of the first radio frequency source is 2000W, and the power of the second radio frequency source is 3000W;
By electrostatic chuck ground connection, to make semiconductor substrate form discharge loop, wherein the power 400W of the first radio frequency source, the power of the second radio frequency source is 500W, and the time of electrostatic chuck ground connection is 5s;
In described settling chamber, pass into question response gas, and deposition forms film on semiconductor substrate, wherein the step of deposit film comprises gasket film deposition step and main thin film deposition steps.
Embodiment 4
Present embodiments provide a kind of deposition process of interlayer dielectric layer, this deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source to carry out heat temperature raising to settling chamber, wherein the power of the first radio frequency source is 2300W, and the power of the second radio frequency source is 3400W;
By electrostatic chuck ground connection, to make semiconductor substrate form discharge loop, wherein the power of the first radio frequency source is 850W, and the power of the second radio frequency source is 1100W, and the time of electrostatic chuck ground connection is 12s;
In described settling chamber, pass into question response gas, and deposition forms film on semiconductor substrate, wherein the step of deposit film comprises gasket film deposition step and main thin film deposition steps.
Comparative example 1
This comparative example provides a kind of deposition process of interlayer dielectric layer, and this deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source to carry out heat temperature raising to settling chamber, wherein the power of the first radio frequency source is 3000W, and the power of the second radio frequency source is 4000W;
In described settling chamber, pass into question response gas, and deposition forms film on semiconductor substrate, wherein the step of deposit film comprises gasket film deposition step and main thin film deposition steps.
Test: the CHARGE DISTRIBUTION on the crystal column surface adopting electrostatic force testing tool test comparison example 1 and embodiment 1 to obtain, its result as shown in Figures 2 and 3.Meanwhile, reliability testing is carried out to the entire flow product wafer that embodiment 1 to 4 and comparative example 1 obtain, and the time that the device medium utilizing Weibull distribution acquisition embodiment 1 to 4 and comparative example 1 to obtain punctures, its result is as shown in Figure 4.
Fig. 2 shows the charge pattern on crystal column surface that comparative example 1 obtains.As can be seen from Figure 2, on the surface of the wafer that comparative example 1 obtains, CHARGE DISTRIBUTION is uneven, and edge surface have accumulated a large amount of electric charge.Fig. 3 shows the charge pattern on crystal column surface that embodiment 1 obtains.As can be seen from Figure 3, on the crystal column surface that embodiment 1 obtains, electric charge is evenly distributed, and on the whole surface of wafer, electric charge is all little.
Fig. 4 shows the Weibull distribution curve that embodiment 1 to 4 and comparative example 1 obtain the time correlation dielectric breakdown time of device in product wafer.As can be seen from Figure 4, the Weibull distribution slope of a curve of comparative example 1 correspondence is very little (being 0.54), the Weibull distribution slope of a curve very large (for 1.41-1.68) of embodiment 1 to 4 correspondence.Above-mentioned Weibull distribution slope of a curve is larger, and the time correlation dielectric breakdown time of device is larger, and namely the reliability of product is higher.Therefore, the time correlation dielectric breakdown time that embodiment 1 to 4 obtains device is obviously greater than the time correlation dielectric breakdown time that comparative example 1 obtains device.
As can be seen from the above description, the application's the above embodiments achieve following technique effect:
(1) by opening radio frequency source to carry out heat temperature raising to settling chamber, then electrostatic chuck ground connection is formed discharge loop to make semiconductor substrate, the electric charge be accumulated in heating up process on semiconductor substrate is derived, thus decrease in film deposition process the electric charge be accumulated on semiconductor substrate, and decrease the plasma damage produced in film deposition process, and then improve the resistance to sparking energy of semiconductor device, and improve the reliability of device.
(2) radio-frequency power owing to adopting hinge structure lower in heat temperature raising step, thus avoid adopt high RF power to carry out in heat temperature raising step directly producing puncture damage or produce a large amount of stored charge, and then further reduce in film deposition process the electric charge be accumulated on semiconductor substrate.
The foregoing is only the preferred embodiment of the application, be not limited to the application, for a person skilled in the art, the application can have various modifications and variations.Within all spirit in the application and principle, any amendment done, equivalent replacement, improvement etc., within the protection range that all should be included in the application.
Claims (9)
1. a deposition process, is characterized in that, described deposition process comprises the following steps:
Semiconductor substrate is placed on the electrostatic chuck of settling chamber;
Open radio frequency source and heat temperature raising is carried out to described settling chamber;
By described electrostatic chuck ground connection, form discharge loop to make described semiconductor substrate;
In described settling chamber, pass into question response gas, form described film with deposition on described semiconductor substrate.
2. deposition process according to claim 1, is characterized in that,
Described radio frequency source comprises the first radio frequency source be positioned at above described settling chamber and the second radio frequency source being positioned at side, described settling chamber;
In the step of described heat temperature raising, the power of described first radio frequency source is 1800 ~ 2200W, and the power of described second radio frequency source is 2700 ~ 3300W.
3. deposition process according to claim 2, is characterized in that, by the step of described electrostatic chuck ground connection, the power of described first radio frequency source is 0 ~ 800W, and the power of described second radio frequency source is 0 ~ 1000W.
4. deposition process according to claim 1, is characterized in that, the time of the step of described electrostatic chuck ground connection is 1 ~ 10s.
5. deposition process according to any one of claim 1 to 4, is characterized in that, described deposition process is high density plasma CVD.
6. deposition process according to any one of claim 1 to 4, is characterized in that, on described semiconductor substrate, the step of the described film of deposition formation comprises:
On described semiconductor substrate, deposition forms gasket film;
On described substrate film, deposition forms main film.
7. deposition process according to any one of claim 1 to 4, is characterized in that, described film is dielectric film.
8. an interlayer dielectric layer, is characterized in that, the deposition process of described interlayer dielectric layer according to any one of claim 1 to 7 is made.
9. a semiconductor device, comprise semiconductor substrate and be positioned at the interlayer dielectric layer on described semiconductor substrate, it is characterized in that, the deposition process of described interlayer dielectric layer according to any one of claim 1 to 7 is made.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110502049A (en) * | 2019-08-30 | 2019-11-26 | 北京北方华创微电子装备有限公司 | Chuck temperature control method, chuck temperature control system and semiconductor equipment |
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| US5997962A (en) * | 1995-06-30 | 1999-12-07 | Tokyo Electron Limited | Plasma process utilizing an electrostatic chuck |
| CN101202207A (en) * | 2006-12-12 | 2008-06-18 | 联华电子股份有限公司 | Method for removing successive sedimentation multiplelayer films of electric charge cumulated on the substrate |
| CN102737939A (en) * | 2011-04-15 | 2012-10-17 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Plasma processing equipment and working method thereof |
| CN203049032U (en) * | 2013-01-18 | 2013-07-10 | 中芯国际集成电路制造(北京)有限公司 | Chemical vapor deposition device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5997962A (en) * | 1995-06-30 | 1999-12-07 | Tokyo Electron Limited | Plasma process utilizing an electrostatic chuck |
| CN101202207A (en) * | 2006-12-12 | 2008-06-18 | 联华电子股份有限公司 | Method for removing successive sedimentation multiplelayer films of electric charge cumulated on the substrate |
| CN102737939A (en) * | 2011-04-15 | 2012-10-17 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Plasma processing equipment and working method thereof |
| CN203049032U (en) * | 2013-01-18 | 2013-07-10 | 中芯国际集成电路制造(北京)有限公司 | Chemical vapor deposition device |
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| CN110502049A (en) * | 2019-08-30 | 2019-11-26 | 北京北方华创微电子装备有限公司 | Chuck temperature control method, chuck temperature control system and semiconductor equipment |
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