CN101736314B - Formation method of silicon oxide film and metal-insulator-metal capacitor - Google Patents

Formation method of silicon oxide film and metal-insulator-metal capacitor Download PDF

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CN101736314B
CN101736314B CN2008102259231A CN200810225923A CN101736314B CN 101736314 B CN101736314 B CN 101736314B CN 2008102259231 A CN2008102259231 A CN 2008102259231A CN 200810225923 A CN200810225923 A CN 200810225923A CN 101736314 B CN101736314 B CN 101736314B
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formation method
substrate
metal
silicon oxide
metal level
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CN101736314A (en
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蔡明�
邹晓东
徐强
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Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Beijing Corp
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Abstract

The invention discloses a formation method of a silicon oxide film, comprising the following steps of: providing a substrate, placing the substrate into a film deposition chamber, vacuumizing the deposition chamber, heating the deposition chamber, introducing silicane and oxygenous gas to the deposition chamber, wherein the flow ratio of silicane to oxygenous gas is between 1:800 and 1:125, introducing energy to the deposition chamber to deposit the film, and taking out the substrate with the deposited film. The invention also discloses a corresponding formation method of a metal-insulator-metal capacitor. The metal-insulator-metal capacitor formed by using the silicon oxide film method reduces and stabilizes a voltage coefficient of capacitance and a temperature coefficient of capacitance of the capacitor, improves the dynamic characteristics of the capacitor and enhances the electrical property stability of the capacitor.

Description

The formation method of silicon oxide film and metal-insulator-metal type type electric capacity
Technical field
The present invention relates to technical field of manufacturing semiconductors, the formation method of particularly a kind of silicon oxide film and metal-insulator-metal type type (MIM) electric capacity.
Background technology
Integrated circuit fabrication process is a kind of plane manufacture craft, and it combines photoetching, etching, deposition, kinds of processes such as ion implantation, on same substrate, forms a large amount of various types of complex devices, and it is interconnection to have complete electric function.Wherein, electric capacity is electronic devices and components commonly used in the integrated circuit technology, and it can be widely used in the middle of the circuit such as coupling mechanism, wave filter and vibrator.
In the existing integrated circuits electric capacity, (MIM, Metal-insulator-metal) electric capacity becomes the main flow in the RF IC to the metal-insulator-metal type type gradually.Reason is; It is produced in the metal interconnecting layer usually; Both compatible mutually with integrated circuit technology; Distance is far away again and between substrate, can overcome that (PIP, Poly-insulator-ploy) stray capacitance that has of electric capacity is big, device performance increases with frequency and the drawback that obviously descends by polysilicon-medium layer-polysilicon type.
MIM electric capacity can be formed between the double layer of metal line of top layer in the unicircuit usually, or between top layer and the intermediate metal line.Fig. 1 is the diagrammatic cross-section of existing a kind of MIM electric capacity, and is as shown in Figure 1, has lower metal line 101 and upper strata metal connecting line 103 on the substrate, utilizes interlayer dielectric layer 102 to isolate between this double layer of metal line, and realizes being electrically connected through through-hole structure 104.Also formed MIM electric capacity in the interlayer dielectric layer 102 between this lower metal structure 101 and upper strata metal construction 103, this electric capacity comprises lower electrode 111, top electrode 112 and is positioned at two interelectrode capacitive insulation layers 113.In addition, the lower electrode 111 of this electric capacity also is connected to the upper strata metal connecting line 103 that is positioned at interlayer dielectric layer 102 surfaces through the connecting hole 105 that in interlayer dielectric layer 102, forms respectively with top electrode 112.
Capacitive insulation layer 113 regular meeting in the above-mentioned existing MIM electric capacity adopt silicon oxide film to form; Particularly; The silicon oxide that utilizes plasma enhanced chemical vapor deposition (PECVD, Plasma EnhancedChemical Vapor Deposition) method to form is widely used because of its depositing temperature is low.
But; Utilize residual a large amount of Si-H in the silicon oxide film that traditional P ECVD method forms; There is more electric charge in it; This MIM electric capacity that causes utilizing this silicon oxide film to form is stablized aspect voltage coefficient of capacitance (voltage coefficient of capacitance) and capacitance temperature factor (temperaturecoefficient of capacitance) inadequately, and then causes the kinetic characteristic of this electric capacity relatively poor, influences the speed of response of device.In addition, have more electric charge in the silicon oxide film that forms because of traditional method, its consistence (uniformity) aspect electrical thickness is also relatively poor, and utilizes the MIM electric capacity of its formation also can be corresponding relatively poor aspect each electrical characteristic such as voltage breakdown, leakage current.
Development along with VLSI; Speed of response to device requires more and more faster; And the integrated level of device is increasingly high; The continuous scaled down of its characteristic dimension, also corresponding the dwindling of capacitor size of making in the circuit also can propose more strict requirement to homogeneity, the consistence of electric capacity manufacturing.Especially after technology got into below the 90nm, the above-mentioned method of utilizing conventional P ECVD method cvd silicon oxide film to form electric capacity two interpolar capacitive insulation layers can not satisfy the requirement that electric capacity is made.
The USP that the disclosed patent No. was US 7374993 on May 20th, 2008 has proposed a kind of new MIM method for producing capacitor; Behind the capacitive insulation layer of this method in forming MIM electric capacity; Increased by one the step utilize borine or silane that it is carried out processed steps, to improve the electrical characteristic such as leakage current of MIM electric capacity.This method need increase extra process step, and is unfavorable to production cycle and production cost.
Summary of the invention
The present invention provides the formation method of a kind of silicon oxide film and metal-insulator-metal type type electric capacity, to improve the existing relatively poor phenomenon of MIM electric capacity kinetic characteristic.
For achieving the above object, the formation method of a kind of silicon oxide film provided by the invention comprises step:
Substrate is provided;
It is indoor that said substrate is put into thin film deposition;
Said sediment chamber is carried out vacuum pumping;
Said sediment chamber is carried out heating operation;
Feed silane and oxygen-containing gas to said sediment chamber, and the throughput ratio of said silane and oxygen-containing gas is between 1:800 to 1:125;
Introduce energy to said sediment chamber, carry out depositing of thin film;
Take out the said substrate of deposit film.
Wherein, said energy utilizes the radio-frequency power supply of high frequency to introduce, and the power of the radio-frequency power supply of said high frequency can be arranged between 800 to 1100W.
The present invention has the formation method of a kind of metal-insulator-metal type type electric capacity of identical or relevant art characteristic, comprises step:
Substrate is provided;
On said substrate, form the lower electrode metal level;
Utilize silane and oxygen-containing gas on said lower electrode metal level the deposited capacitances insulation layer of throughput ratio between 1:800 to 1:125;
On said capacitive insulation layer, form the top electrode metal level;
The said top electrode metal level of etching forms electrode of metal;
Said capacitive insulation layer of etching and said lower electrode metal level form capacity isolator and metal lower electrode.
Compared with prior art, the present invention has the following advantages:
Silicon oxide film formation method of the present invention through widening the difference in flow between silane and the oxygen-containing gas, changes unsettled Si-H in the silicon oxide film that forms for stable Si-O key more, makes its electrical property more stable.
Among one of them embodiment of silicon oxide film formation method of the present invention, also strengthen the deposition power of silicon oxide film, further improved the turnover ratio of unsettled Si-H to Si-O, also further stablized the electrical property of the silicon oxide film that forms.
Metal-insulator-metal type type electric capacity formation method of the present invention; Utilize the method for above-mentioned formation silicon oxide film to form the capacitive insulation layer of metal-insulator-metal type type electric capacity; Reduce and stablized the voltage coefficient of capacitance and the capacitance temperature factor of electric capacity; Improve the kinetic characteristic of electric capacity, improved the electric performance stablity property of electric capacity.
The formation method of silicon oxide film of the present invention and metal-insulator-metal type type electric capacity only need be optimized processing condition, and realizing simply need not increase extra process step, and fabrication cycle and cost are not all had big influence.
Description of drawings
Fig. 1 is a kind of diagrammatic cross-section of MIM electric capacity;
Fig. 2 is the schema of the silicon oxide film formation method of first embodiment of the invention;
Fig. 3 is the schema of the MIM electric capacity formation method of second embodiment of the invention;
Fig. 4 to Figure 10 is the device profile synoptic diagram of the MIM electric capacity formation method of explanation second embodiment of the invention;
Figure 11 is the voltage-capacitance curve that utilizes the MIM electric capacity of traditional method and the formation of second embodiment of the invention method.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
Treatment process of the present invention can be widely used in the every field; And many suitable material capable of using; Be to explain below through concrete embodiment; Certainly the present invention is not limited to this specific embodiment, and the general replacement that the one of ordinary skilled in the art knew is encompassed in protection scope of the present invention far and away.
Secondly, the present invention utilizes synoptic diagram to describe in detail, when the embodiment of the invention is detailed; For the ease of explanation; The sectional view of expression device architecture can be disobeyed general ratio and done local the amplification, should be with this as to qualification of the present invention, in addition; In the making of reality, should comprise the three-dimensional space size of length, width and the degree of depth.
In the existing MIM electric capacity forming process, often utilize PECVD cvd silicon oxide film to be used as the capacitive insulation layer between MIM electric capacity.But the PECVD silicon oxide film that traditional method forms includes more unsettled Si-H key, and the MIM electric capacity that order forms is not really desirable aspect kinetic characteristic and electrical property.For this reason, the present invention improves traditional silicon oxide film depositing operation, has proposed a kind of formation method of new silicon oxide film, comprises step:
Substrate is provided;
It is indoor that said substrate is put into thin film deposition;
Said sediment chamber is carried out vacuum pumping;
Said sediment chamber is carried out heating operation;
Feed silane and oxygen-containing gas to said sediment chamber, and the throughput ratio of said silane and oxygen-containing gas is between 1:800 to 1:125;
Introduce energy to said sediment chamber, carry out depositing of thin film;
Take out the said substrate of deposit film.
Wherein, said oxygen-containing gas can be N 2O gas, and said N 2The flow of O gas can be arranged between the 10000sccm to 200000sccm.
Wherein, the flow of said silane is between 25sccm to 80sccm.
Wherein, said energy utilizes the radio-frequency power supply of high frequency to introduce, and the power of the radio-frequency power supply of said high frequency is between 800 to 1100W.
Wherein, the pressure of said sediment chamber is between 2Torr to 6Torr, and temperature is between 300 ℃ to 500 ℃.
The present invention can also be applied to the formation method of above-mentioned silicon oxide film comprise step in the forming process of MIM electric capacity:
Substrate is provided;
On said substrate, form the lower electrode metal level;
Utilize silane and oxygen-containing gas on said lower electrode metal level the deposited capacitances insulation layer of throughput ratio between 1:800 to 1:125;
On said capacitive insulation layer, form the top electrode metal level;
The said top electrode metal level of etching forms electrode of metal;
Said capacitive insulation layer of etching and said lower electrode metal level form capacity isolator and metal lower electrode.
Wherein, said capacitive insulation layer is a silicon oxide layer.
Wherein, said oxygen-containing gas is N 2O gas, and said N 2The flow of O gas is between 10000sccm to 200000sccm.
Wherein, the flow of said silane is between 25sccm to 80sccm.
Wherein, said energy utilizes the radio-frequency power supply of high frequency to introduce, and the power of the radio-frequency power supply of said high frequency is between 800 to 1100W.
Wherein, the pressure of said sediment chamber is between 2Torr to 6Torr, and temperature is between 300 ℃ to 500 ℃.
Wherein, said top electrode metal level comprises the tantalum thing, and said lower electrode metal level comprises metallic aluminium.
The unsettled Si-H key that the silicon oxide film that adopts aforesaid method of the present invention to form contains obviously reduces, and the thin-film electro performance is more stable, and the MIM electric capacity that utilizes this film to form all can increase aspect kinetic characteristic and the electrical property.Through specific embodiment the present invention is described in detail below.
First embodiment:
The first embodiment of the present invention has been introduced a kind of formation method of new silicon oxide film, and Fig. 2 is the schema of the silicon oxide film formation method of first embodiment of the invention, below in conjunction with Fig. 2 the first embodiment of the present invention is described in detail.
Step 201: substrate is provided.
The substrate that is provided in the present embodiment can be simple silicon substrate, also can be for forming the silicon substrate of MOS transistor, and can also be for forming the substrate of parent metal connecting line construction.
In other embodiments of the invention, can also be the semiconducter substrate of other material, like germanium substrate, gallium arsenide substrate etc.
Step 202: it is indoor that said substrate is put into thin film deposition.
Film deposition equipment used in the present embodiment is PECVD, will treat in this step that the substrate of cvd silicon oxide film is put into corresponding PECVD sediment chamber.
Step 203: said sediment chamber is vacuumized and heat treated.
The depositing temperature that is provided with when in this step the sediment chamber being heated as is 300 ℃, 400 ℃ or 500 ℃ etc. between 300 ℃ to 500 ℃.
Step 204: feed silane and oxygen-containing gas to said sediment chamber, and the throughput ratio of said silane and oxygen-containing gas is between 1:800 to 1:125.
In the traditional method, used silane and the throughput ratio between oxygen-containing gas are about about 1:50 when forming silicon oxide film.Present embodiment has carried out bigger change to this throughput ratio, particularly, and can be through the flow realization that reduces silane flow rate and/or strengthen oxygen-containing gas.
Particularly, can silane flow rate be arranged between 25 to 80sccm, as be 25,30,40,50,60,70 or 80sccm etc. (its flow is usually about 150sccm in the traditional method); Between 10000 to 20000sccm, as is 10000,12000,15000,18000 or 20000sccm etc. (its flow is usually about 8000sccm in the traditional method) with the flow set of oxygen-containing gas.
Through the throughput ratio of silane and oxygen-containing gas is carried out above-mentioned change; Unsettled Si-H key in the silicon oxide film that forms is changed for stable Si-O key more; Reduce the quantity of electric charge in the silicon oxide film that forms, improved stability, the consistence of its electricity.
Wherein, used oxygen-containing gas can be N 2O, CO 2, O 2, O 3, CO, NO etc., in the present embodiment, what select for use is that legibility leaves, and does not have toxic N 2O gas.
In the present embodiment, except that above-mentioned reactant gases---silane and the oxygen-containing gas, can also add gas carrier simultaneously, can be nitrogen, argon gas, helium etc.Its effect one is the concentration that can regulate sediment chamber's reaction gases, and then changes sedimentation rate; The 2nd, can be used for adjusting the pressure of sediment chamber, make it remain on set(ting)value.
In the present embodiment, the pressure of sediment chamber is arranged between the 2Torr to 6Torr, as is 2Torr, 3Torr, 4Torr, 5Torr or 6Torr etc.
Step 205: introduce energy to said sediment chamber, carry out depositing of thin film.
In the present embodiment, introducing energy to the sediment chamber is to utilize the radio-frequency power supply of high frequency to realize.In the traditional method, the power of this high frequency electric source approximately is arranged on about 500W, but in the present embodiment, the power of this high frequency electric source is enlarged between 800 to 1100W, as is 800W, 900W, 1000W or 1100W etc.
That adopts in the present embodiment adds high-power measure and can make reactant gases---silane and oxygen-containing gas, and reaction more abundant, the unsettled Si-H key in the silicon oxide film that order forms converts stable Si-O key more into.Realize further improving the electrical stability and the conforming purpose of silicon oxide film.
Step 206: take out the said substrate of deposit film.
When treating that deposit thickness reaches target value, stop to feed reactant gases, stop heating, feed a large amount of rare gas elementes,, open the sediment chamber, take out the substrate behind the cvd silicon oxide film like nitrogen or argon gas etc.
In other embodiments of the invention; Also can make other processing condition identical with the traditional technology condition (comprising performance number); Only change the flow rate of reactive gas ratio; Or make other processing condition identical with the traditional technology condition (comprising the flow rate of reactive gas ratio), and only strengthen performance number, equally also can be implemented in the electrical stability and the conforming purpose that improve silicon oxide film to a certain extent.
Second embodiment:
The second embodiment of the present invention has been introduced a kind of formation method of new MIM electric capacity; Fig. 3 is the schema of the MIM electric capacity formation method of second embodiment of the invention; Fig. 4 to Figure 10 describes in detail to the second embodiment of the present invention below in conjunction with Fig. 3 to Figure 10 for the device profile synoptic diagram of the MIM electric capacity formation method of explanation second embodiment of the invention.
Step 301: substrate is provided.
The substrate that is provided in the present embodiment can be for forming the silicon substrate of MOS transistor, also can be for forming the substrate of parent metal connecting line construction.
Fig. 4 is for the diagrammatic cross-section of the substrate that provides in the second embodiment of the invention, and is as shown in Figure 4, formed lower floor's conductive structure 401 in the substrate 400 that is provided.
Step 302: on said substrate, form the lower electrode metal level.
Fig. 5 is the device profile synoptic diagram behind the formation lower electrode metal level in the second embodiment of the invention, and is as shown in Figure 5, on substrate 400, formed lower electrode metal level 411.The lower electrode metal level 411 of the MIM electric capacity that forms in the present embodiment can be formed by metallic aluminium; The thickness of this lower electrode metal level 411 can be arranged on usually 1800 to 2300 between, as be 1800
Figure 2008102259231100002G2008102259227D0009170151QIETU
, 2000
Figure 2008102259231100002G2008102259227D0009170151QIETU
or 2300
Figure 2008102259231100002G2008102259227D0009170151QIETU
etc.
Notice this lower electrode metal level 411 upper and lower and also can have one deck blocking layer (not shown) usually; This blocking layer is formed by the tantalum thing usually; Like tantalum nitride (TaN), it can prevent metallic aluminium to the medium layer internal diffusion, and the adhesion dynamics between reinforcement metal aluminium and medium layer.In the present embodiment, metallic aluminium and be positioned at its upper and lower blocking layer and be and utilize physical gas-phase deposite method to form at same depositing device.
In order to ensure the structure of in follow-up etching technics, not damaging lower floor; And obtain the comparatively etching result of uniformity; In the present embodiment; Can also be before forming lower electrode metal level 411; Form one deck etch rate and this layer earlier and differ lower floor's etching stop layer 421 far away; This lower floor's etching stop layer 421 can be formed by silicon nitride or nitrogenous materials such as silit; Its thickness can 300 to 700
Figure 2008102259231100002G2008102259227D0009170151QIETU
between, as be 500
Figure 2008102259231100002G2008102259227D0009170151QIETU
.
In addition; In the present embodiment, protect lower electrode metal level 411, can also on this layer, deposit layer protective layer 422 in order in follow-up etching technics, (to be generally the etching technics that forms through hole); This layer is formed by medium layer usually, as being silicon nitride layer or silicon carbide layer etc.
Step 303: utilize silane and oxygen-containing gas on said lower electrode metal level the deposited capacitances insulation layer of throughput ratio between 1:800 to 1:125.
Fig. 6 is the device profile synoptic diagram behind the formation MIM capacitive insulation layer in the second embodiment of the invention, and is as shown in Figure 6, on lower electrode metal level 411, formed capacitive insulation layer 412.In the present embodiment, this capacitive insulation layer 412 is using plasma enhanced chemical vapor deposition method, utilizes the silane (SiH of throughput ratio between 1:800 to 1:125 4) and the silicon oxide film that forms of oxygen-containing gas.
The concrete thickness of this film can be by concrete device architecture decision; Usually can 400
Figure 2008102259231100002G2008102259227D0009170151QIETU
to 700
Figure 2008102259231100002G2008102259227D0009170151QIETU
between, as be 400
Figure 2008102259231100002G2008102259227D0009170151QIETU
, 500
Figure 2008102259231100002G2008102259227D0009170151QIETU
or 700
Figure 2008102259231100002G2008102259227D0009170151QIETU
etc.
Present embodiment is optimized the used processing condition of this step thin film deposition, and concrete processing condition comprise: the depositing temperature of sediment chamber is arranged between 300 ℃ to 500 ℃, as is 300 ℃, 400 ℃ or 500 ℃ etc.; The pressure of sediment chamber is arranged between the 2Torr to 6Torr, as is 2Torr, 3Torr, 4Torr, 5Torr or 6Torr etc.
With respect to conventional deposition method; Present embodiment also to when deposition flow rate of reactive gas than having carried out bigger change; The silane that feeds and the throughput ratio of oxygen-containing gas are arranged between the 1:800 to 1:125, as are 1:800,1:600,1:400,1:300 or 1:125 etc.Particularly, can be through the flow realization that reduces silane flow rate and/or strengthen oxygen-containing gas.As, can silane flow rate be arranged between 25 to 80sccm, as be 25,30,40,50,60,70 or 80sccm etc. (its flow is usually about 150sccm in the traditional method); Between 10000 to 20000sccm, as is 10000,12000,15000,18000 or 20000sccm etc. (its flow is usually about 8000sccm in the traditional method) with the flow set of oxygen-containing gas.
Wherein, used oxygen-containing gas can be N 2O, CO 2, O 2, O 3, CO, NO etc., in the present embodiment, what select for use is that legibility leaves, and does not have toxic N 2O gas.
Through with silane and oxygen-containing gas (like N 2O gas) throughput ratio is carried out above-mentioned change, and the unsettled Si-H key in the silicon oxide film that forms is changed for stable Si-O key more, has reduced the quantity of electric charge in the silicon oxide film that forms, and has improved stability, the consistence of its electricity.
In addition, with respect to traditional method, can also be when the radio-frequency power supply that utilizes high frequency carry out thin film deposition in the present embodiment, the power of high frequency electric source is enlarged between 800 to 1100W, as is 800W, 900W, 1000W or 1100W etc.
In the present embodiment, this adds high-power measure can make reactant gases---silane and oxygen-containing gas, and reaction more abundant, the unsettled Si-H key in the silicon oxide film that order forms converts stable Si-O key more into.Realize further improving the electrical stability and the conforming purpose of silicon oxide film.
In the present embodiment, except that above-mentioned reactant gases---silane and the oxygen-containing gas, also added gas carrier simultaneously, concrete can be nitrogen, argon gas, helium etc.Its effect one is the concentration that can regulate sediment chamber's reaction gases, and then changes sedimentation rate; The 2nd, can be used for adjusting the pressure of sediment chamber, make it remain on set(ting)value.
In other embodiments of the invention; When forming this capacitive insulation layer; Also can make other processing condition identical with the traditional technology condition (comprising performance number), only change the flow rate of reactive gas ratio, or make other processing condition identical with the traditional technology condition (comprising the flow rate of reactive gas ratio); Only strengthen performance number, equally also can realize improving the electrical stability and the conforming purpose of MIM capacitive insulation layer to a certain extent.
When treating that deposit thickness reaches target value, stop to feed reactant gases, stop heating, feed a large amount of rare gas elementes,, open the sediment chamber, the substrate behind the taking-up cvd silicon oxide film (capacitive insulation layer 412) like nitrogen or argon gas etc.
Step 304: on said capacitive insulation layer, form the top electrode metal level.
Fig. 7 is the device profile synoptic diagram behind the formation top electrode metal level in the second embodiment of the invention, and is as shown in Figure 7, on capacitive insulation layer 412 (being the silicon oxide film in the present embodiment), formed top electrode metal level 413.The top electrode metal level 413 of the MIM electric capacity that forms in the present embodiment is formed by the metal tantalum thing, like tantalum nitride (TaN) etc.Its thickness can be arranged on 500 to 1000
Figure 2008102259231100002G2008102259227D0009170151QIETU
between, as be 800
Figure 2008102259231100002G2008102259227D0009170151QIETU
.
In order to ensure not damaging understructure when this top electrode metal level 413 of etching; And obtain the comparatively etching result of uniformity; In other embodiments of the invention; Can also on capacitive insulation layer 413, form one deck etch rate and top electrode metal level 413 and differ upper strata etching stop layer (this is not shown) far away, this layer can be formed by silicon nitride or nitrogenous materials such as silit.
Step 305: photoetching, etching top electrode metal level are to form electrode of metal.
Fig. 8 is the device profile synoptic diagram after the formation electrode of metal in the second embodiment of the invention; As shown in Figure 8; Utilize photoetching technique on top electrode metal level 413, to form the mask pattern of electrode of metal earlier; Utilize the method for etching that this top electrode metal level 413 is carried out etching again, formed electrode of metal 433.
Step 306: photoetching, etching capacitive insulation layer and lower electrode metal level form capacity isolator and metal lower electrode.
Fig. 9 is the device profile synoptic diagram behind the formation capacitance structure in the second embodiment of the invention; As shown in Figure 9; Utilize photoetching technique on capacitive insulation layer 412, to form the mask pattern of metal lower electrode earlier; Utilize the method for etching that capacitive insulation layer 412 and lower electrode metal level 411 are carried out etching again, formed capacity isolator 432 and metal lower electrode 431.
So far, the structure of MIM electric capacity is accomplished basically, has had upper and lower electrode of metal and intermediary capacitive insulation layer.
Figure 10 is the device profile synoptic diagram behind the formation metal electric connecting line construction in the second embodiment of the invention; Shown in figure 10; On substrate, form interlayer dielectric layer 404 earlier; In this interlayer dielectric layer 404, formed each conductive structure 414,415 and 416 again, it links to each other with metal lower electrode 431, electrode of metal 432 and lower floor's conductive structure 401 of MIM electric capacity respectively.
The metal electric connecting line construction that forms in the present embodiment can be formed by metallic copper, and its making can be suitable for the process step of copper dual-damascene structure.
In addition, the electrode of metal of the MIM electric capacity in the present embodiment utilizes the tantalum thing to form, and lower electrode utilizes metallic aluminium to form.In other embodiments of the invention; Above-mentioned metallic conduction structure also can be formed by other material in whole or in part; Like aluminium, tungsten or copper etc., its practical implementation step all similar with present embodiment with thinking (only be when forming metal construction concrete steps different) is under the enlightenment of the embodiment of the invention; The extension of this application is easy to understand and realization for those of ordinary skills, repeats no more at this.
Adopt the MIM electric capacity that method forms in the present embodiment; The electrical stability and the consistence of its capacitive insulation layer are improved; Reduce and stablized the voltage coefficient of capacitance and the capacitance temperature factor of electric capacity effectively, improved the kinetic characteristic of electric capacity, improved the electric performance stablity property of electric capacity.
Figure 11 is the voltage-capacitance curve that utilizes the MIM electric capacity of traditional method and the formation of second embodiment of the invention method, and shown in figure 11, X-coordinate is a magnitude of voltage, and ordinate zou is a capacitance.Curve 1101 and last data point thereof are to utilize the voltage-capacitance curve of the MIM electric capacity of traditional method formation among the figure, and curve 1102 and last data point thereof are to utilize the voltage-capacitance curve of the MIM electric capacity of second embodiment of the invention method formation.The former capacitance changes more along with the variation of voltage, the latter is then less, explain adopt the second embodiment of the invention method after, the voltage coefficient of capacitance of electric capacity is more stable.
In addition, the relation between capacitance and voltage can be by following formulate:
C(V)~C 0(1+Vcc1*V+Vcc2*V 2)
Relation between capacitance and temperature can be by following formulate:
C(T)~C 0(1+Tcc1*T)
Wherein, Vcc1 is the capacitance voltage linear coefficient, and requirements of making is at least less than 40ppm/V; Tcc1 is the capacitance temperature linear coefficient, and requirements of making is at least greater than-60ppm/C; Vcc2 is the capacitance voltage quadratic coefficients, and requirements of making is at least greater than-40ppm/V 2Notice that capacitance voltage quadratic coefficients Vcc2 wherein is very big to the kinetic characteristic influence of mimic channel.Following table 1 has been listed the comparative result of each parameter value of the MIM electric capacity that utilizes traditional method and the formation of second embodiment of the invention method respectively.
Table 1 utilizes the parameter value of the MIM electric capacity of traditional method and the formation of second embodiment of the invention method respectively
Parameter The tolerance value Traditional method The present embodiment method Improvement (%)
Vcc1(ppm/V) <40 27.42 13.94 49.2
Vcc2(ppm/V 2) >-40 -27.42 -20.91 23.7
Tcc1(ppm/C) >-60 -36.09 -24.6 31.8
Shown in result in the table 1; The MIM electric capacity that adopts the present embodiment method to form; Improvement is in various degree all arranged on each parameter, confirmed that further employing present embodiment method forms MIM electric capacity, can effectively reduce and the voltage coefficient of capacitance and the capacitance temperature factor of stable electric capacity; Improve the kinetic characteristic of electric capacity, improve the electric performance stablity property of electric capacity.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.

Claims (8)

1. the formation method of a silicon oxide film is characterized in that, comprises step:
Substrate is provided;
It is indoor that said substrate is put into thin film deposition, and wherein, said thin film deposition chamber is the PECVD sediment chamber;
Said sediment chamber is carried out vacuum pumping;
Said sediment chamber is carried out heating operation;
Feed silane and oxygen-containing gas to said sediment chamber, and the throughput ratio of said silane and oxygen-containing gas is between 1: 800 to 1: 125, wherein, said oxygen-containing gas is N 2O gas, said N 2The flow of O gas is between 10000sccm to 200000sccm, and the flow of said silane is between 25sccm to 80sccm;
Introduce energy to said sediment chamber, carry out depositing of thin film;
Take out the said substrate of deposit film.
2. formation method as claimed in claim 1 is characterized in that: said energy utilizes the radio-frequency power supply of high frequency to introduce, and the power of the radio-frequency power supply of said high frequency is between 800 to 1100W.
3. formation method as claimed in claim 1 is characterized in that: the pressure of said sediment chamber is between 2Torr to 6Torr, and temperature is between 300 ℃ to 500 ℃.
4. the formation method of a metal-insulator-metal type type electric capacity is characterized in that, comprises step:
Substrate is provided;
On said substrate, form the lower electrode metal level;
Using plasma enhanced chemical vapor deposition method, utilize throughput ratio at the silane between 1: 800 to 1: 125 and oxygen-containing gas deposited capacitances insulation layer on said lower electrode metal level; Said capacitive insulation layer is a silicon oxide layer; Wherein, said oxygen-containing gas is N 2O gas, said N 2The flow of O gas is between 10000sccm to 200000sccm, and the flow of said silane is between 25sccm to 80sccm;
On said capacitive insulation layer, form the top electrode metal level;
The said top electrode metal level of etching forms electrode of metal;
Said capacitive insulation layer of etching and said lower electrode metal level form capacity isolator and metal lower electrode.
5. formation method as claimed in claim 4 is characterized in that: said energy utilizes the radio-frequency power supply of high frequency to introduce, and the power of the radio-frequency power supply of said high frequency is between 800 to 1100W.
6. formation method as claimed in claim 4 is characterized in that: the pressure of said sediment chamber is between 2Torr to 6Torr, and temperature is between 300 ℃ to 500 ℃.
7. formation method as claimed in claim 4 is characterized in that: said top electrode metal level comprises the tantalum thing.
8. formation method as claimed in claim 4 is characterized in that: said lower electrode metal level comprises metallic aluminium.
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CN102437022B (en) * 2011-11-30 2014-04-16 上海华力微电子有限公司 Method for manufacturing multilayer metal-oxide-metal (MOM) capacitor
CN102820226A (en) * 2012-04-16 2012-12-12 上海华力微电子有限公司 Manufacturing method of multilayer metal-silicon oxide-metal capacitor
CN102664143A (en) * 2012-04-20 2012-09-12 上海华力微电子有限公司 Method for manufacturing capacitor comprising multilayer metal, silicon oxide and metal
CN102637583B (en) * 2012-04-20 2015-05-20 上海华力微电子有限公司 Preparation method of multilayer metal-monox-metal capacitor
CN105914280B (en) * 2016-05-11 2018-10-12 湘能华磊光电股份有限公司 The preparation method and a kind of LED chip of a kind of LED chip protective layer
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