CN105552116A - 金属栅极结构与其形成方法 - Google Patents

金属栅极结构与其形成方法 Download PDF

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CN105552116A
CN105552116A CN201410596532.6A CN201410596532A CN105552116A CN 105552116 A CN105552116 A CN 105552116A CN 201410596532 A CN201410596532 A CN 201410596532A CN 105552116 A CN105552116 A CN 105552116A
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gate structure
metal gate
workfunction layers
groove
thickness
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CN105552116B (zh
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李季儒
王尧展
何念葶
许启茂
苏冠丞
陈面国
杨晓光
姚芳弘
戴圣辉
李宗霖
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United Microelectronics Corp
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Abstract

本发明公开一种金属栅极结构与其形成方法，该金属栅极结构形成在一介电层的一沟槽中，该金属栅极结构包含一功函数金属层设置在沟槽中，功函数金属层包含一底部以及一侧部，其中底部的一厚度与侧部的一厚度的比值为2至5，以及一金属层填满该沟槽。本发明还提供了一种形成金属栅极结构的方法。

Description

金属栅极结构与其形成方法
技术领域
本发明涉及一种金属栅极结构与其形成方法，特别是涉及一种具有稳定晶形与特殊结构的功函数金属层的金属栅极结构与其形成方法。
背景技术
在现有半导体产业中，多晶硅广泛地应用于半导体元件如金属氧化物半导体(metal-oxide-semiconductor，MOS)晶体管中，作为标准的栅极材料选择。然而，随着MOS晶体管尺寸持续地微缩，传统多晶硅栅极因硼穿透(boronpenetration)效应导致元件效能降低，及其难以避免的空乏效应(depletioneffect)等问题，使得等效的栅极介电层厚度增加、栅极电容值下降，进而导致元件驱动能力的衰退等困境。因此，半导体业界更尝以新的栅极材料，例如利用具有功函数(workfunction)金属层的金属栅极来取代传统的多晶硅栅极，用以作为匹配高介电常数(High-K)栅极介电层的控制电极。
一般而言，具有金属栅极的制作方法可概分为前栅极(gatefirst)制作工艺及后栅极(gatelast)制作工艺两大类。其中前栅极制作工艺会在形成金属栅极后始进行源极/漏极超浅接面活化回火以及形成金属硅化物等高热预算制作工艺，因此使得材料的选择与调整面对较多的挑战。而在后栅极制作工艺中，先形成一牺牲栅极(sacrificegate)或取代栅极(replacementgate)，并在完成一般MOS晶体管的制作后，将牺牲/取代栅极移除而形成一栅极凹槽(gatetrench)，再依电性需求于栅极凹槽内填入不同的金属。
然而为了无论是前栅极或后栅极制作工艺，都需要形成多层的金属层以形成适合不同电性或驱动电压的金属栅极。而这些金属层的材料往往会影响晶体管的功函数，而成为影响产品效能的因素。目前，各厂商都致力于研发不同的制作工艺以制造具有较佳电性表现的金属栅极。
发明内容
本发明于是提供了一种金属栅极结构与其形成方法，以获得较佳电性的金属栅极。
根据本发明的一实施例，本发明提供了一种金属栅极结构，其形成在一介电层的一沟槽中，该金属栅极结构包含一功函数金属层设置在沟槽中，功函数金属层包含一底部以及一侧部，其中底部的一厚度与侧部的一厚度的比值为2至5，以及一金属层填满该沟槽。
根据本发明的另一实施例，本发明还提供了一种形成金属栅极结构的方法。首先提供一介电层，介电层中具有一沟槽。然后于沟槽中形成一功函数金属层，功函数金属层形成在高于摄氏200度的环境下，接着对功函数金属层进行一氧化制作工艺，以形成一氧化金属层。后续在氧化金属层上形成一金属层，以填满沟槽。
本发明所提供的一种金属栅极结构以及其形成方法，能形成稳定晶形以及较厚底部的功函数金属层，可避免现有技术的诸多问题。
附图说明
图1至图8为本发明制作一种集成电路的方法的步骤示意图；
图9为本发明稳定型态功函数金属层的X光绕射图；
图10为本发明功函数金属层的显微镜图。
主要元件符号说明
600基底624层内介电层
602浅沟槽隔离626沟槽
604晶体管628底阻障层
606介质层630功函数金属层
608高介电常数层630A底部
610蚀刻停止层630B侧部
612牺牲栅极630C突部
614盖层632氧化制作工艺
616间隙壁634氧化金属层
618轻掺杂漏极636顶阻障层
620源极/漏极638金属层
622接触洞蚀刻停止层640金属栅极
具体实施方式
为使熟悉本发明所属技术领域的一般技术者能更进一步了解本发明，下文特列举本发明的数个优选实施例，并配合所附的附图，详细说明本发明的构成内容及所欲达成的功效。
请参考图1至图8，所绘示为本发明制作一种集成电路的方法的步骤示意图。首先，提供一基底600，例如是硅基底(siliconsubstrate)、外延硅(epitaxialsiliconsubstrate)、硅锗半导体基底(silicongermaniumsubstrate)、碳化硅基底(siliconcarbidesubstrate)或硅覆绝缘(silicon-on-insulator,SOI)基底等，但并不以此为限。基底600上具有多个浅沟槽隔离(shallowtrenchisolation，STI)602。接着于基底600上浅隔渠隔离602所包围的区域中形成一晶体管604。晶体管604可以是P型晶体管也可以是N型晶体管。下文的实施例将以N型晶体管为示例。
如图1所示，在本发明的一实施例中，晶体管604包含一介质层606、一高介电常数层608、一蚀刻停止层610、一牺牲栅极612、一盖层614、一间隙壁616、一轻掺杂漏极(lightdopeddrain，LDD)618以及一源极/漏极620。在本发明优选实施例中，介质层606为一二氧化硅层。高介电常数层608的介电常数大约大于4，其可以是稀土金属氧化物层或镧系金属氧化物层，例如氧化铪(hafniumoxide,HfO2)、硅酸铪氧化合物(hafniumsiliconoxide,HfSiO4)、硅酸铪氮氧化合物(hafniumsiliconoxynitride,HfSiON)、氧化铝(aluminumoxide,Al2O3)、氧化镧(lanthanumoxide,La2O3)、铝酸镧(lanthanumaluminumoxide,LaAlO)、氧化钽(tantalumoxide,Ta2O5)、氧化锆(zirconiumoxide,ZrO2)、硅酸锆氧化合物(zirconiumsiliconoxide,ZrSiO4)、锆酸铪(hafniumzirconiumoxide,HfZrO)、氧化镱(yttriumoxide,Yb2O3)、氧化硅镱(yttriumsiliconoxide,YbSiO)、铝酸锆(zirconiumaluminate,ZrAlO)、铝酸铪(hafniumaluminate,HfAlO)、氮化铝(aluminumnitride,AlN)、氧化钛(titaniumoxide,TiO2),氮氧化锆(zirconiumoxynitride,ZrON)、氮氧化铪(hafniumoxynitride,HfON)、氮氧硅锆(zirconiumsiliconoxynitride,ZrSiON)、氮氧硅铪(hafniumsiliconoxynitride,HfSiON)、锶铋钽氧化物(strontiumbismuthtantalate,SrBi2Ta2O9,SBT)、锆钛酸铅(leadzirconatetitanate,PbZrxTi1-xO3,PZT)或钛酸钡锶(bariumstrontiumtitanate,BaxSr1-xTiO3,BST)，但不以上述为限。蚀刻停止层610包含金属层或金属氮化物层，例如是氮化钛(TiN)。牺牲栅极612则例如是多晶硅栅极，但也可以是由多晶硅层、非晶硅(amorphousSi)或者锗层所组合的复合栅极。盖层614则例如是一氮化硅层。间隙壁616可为一复合膜层的结构，其可包含高温氧化硅层(hightemperatureoxide,HTO)、氮化硅、氧化硅或使用六氯二硅烷(hexachlorodisilane,Si2Cl6)形成的氮化硅(HCD-SiN)。轻掺杂漏极618以及第一源极/漏极620则以适当浓度的掺质加以形成。而于另一实施例中，介质层606以及蚀刻停止层610则可以省略。
后续，在基底600上依序形成一接触洞蚀刻停止层(contactetchstoplayer,CESL)622与一内层介电层(inter-layerdielectric,ILD)624覆盖在晶体管604上。在一实施例中，接触洞蚀刻停止层622可提供应力(stress)，以作为一选择性应力系统(selectivestrainscheme,SSS)。在一实施例中，接触洞蚀刻停止层622也可以省略。
接着，如图2所示，进行一平坦化制作工艺，例如一化学机械平坦化(chemicalmechanicalpolish,CMP)制作工艺或者一回蚀刻制作工艺或两者的组合，以依序移除部分的内层介电层624、部分的接触洞蚀刻停止层622、部分的间隙壁616，并完全移除盖层614，直到暴露出牺牲栅极612的顶面。
如图3所示，进行一湿蚀刻制作工艺及/或干蚀刻制作工艺以移除牺牲栅极612，其中此蚀刻步骤会停止在蚀刻停止层610上，而在晶体管604中形成一沟槽(trench)626。在本发明的一实施例中，在形成了沟槽626后，可选择性地移除蚀刻停止层610。
如图4所示，接着在基底600全面形成一底阻障层628。底阻障层628会沿着沟槽626的表面形成，但不会完全填满沟槽626。底阻障层626的材质例如是氮化钛(TiN)、钛/氮化钛(Ti/TiN)、氮化钽(TaN)或钽/氮化钽(Ta/TaN)，但并不以此为限。在本发明的一实施例中，底阻障层628可以是多层结构，例如包含一第一阻障层(图未示)以及位于其上的第二阻障层(图未示)，其中第一阻障层例如是氮化钛，而第二阻障层例如是氮化钽。
如图5所示，在基底600上形成一功函数金属层630填入在沟槽626中，覆盖在底阻障层628上。在一实施例中，若晶体管604是P型晶体管，则功函数金属层630的材质例如是镍(Ni)、钯(Pd)、铂(Pt)、铍(Be)、铱(Ir)、碲(Te)、铼(Re)、钌(Ru)、铑(Rh)、钨(W)、钼(Mo)；钨、钌、钼、钽(Ta)、钛(Ti)的氮化物；钨、钽、钛的碳化物；或者氮铝化钛(TiAlN)、氮铝化钽(TaAlN)。若晶体管604为N型晶体管，则功函数金属层630的材质例如是铝化钛(titaniumaluminides,TiAl)、铝化锆(aluminumzirconium,ZrAl)、铝化钨(aluminumtungsten,WAl)、铝化钽(aluminumtantalum,TaAl)或铝化铪(aluminumhafnium,HfAl)，但并不以此为限。本发明的一实施例中，形成功函数金属层630的步骤包含一高温沉积制作工艺，例如是在高于200℃的环境下形成，例如200℃至500℃，且优选是在真空(≒0atm)环境下。相较于现有常温下所形成的功函数金属层，本发明可形成较稳定晶形的功函数金属层630。
请参考图9，所绘示为本发明稳定型态功函数金属层的X光绕射图(X-raydiffusion,XRD)，其中横坐标为角度，纵坐标为强度。如图9所示，以功函数金属层630为铝化钛(TiAl)为例，本发明高温沉积制作工艺所形成的功函数金属层(实线标示)会形成TiAl3的稳定晶形，而现有常温下形成的功函数金属层(虚线标示)，则没有这种形态。在一实施例中，此种具有稳定晶形的功函数金属层630可以用TiAlx来表示，其中x为3。而于另一实施例中，若后续填入的金属层(未示于图5)的材质，功函数金属层630也可以是TiAlxCuy，其中x+y＝3。
另外，请参考图10，所绘示为本发明功函数金属层的显微镜图。如图10所示，本发明另外一个特点在于，所形成的功函数金属层630具有较厚的底部以及较薄的侧部，以及较小的突部(overhang)。请再次参考图5，本发明的功函数金属层630位在沟槽626处具有一底部630A、一侧部630B以及一突部630C。底部630A靠近沟槽626的底面，且具有一底部厚度WA；侧部630B靠近沟槽626的侧壁，且具有一侧部厚度WB；突部630C靠近沟槽626开口处，由侧部630B向沟槽626中心延伸，且具有一突部厚度WC。底部厚度WA明显地大于侧部厚度WB与突部厚度WC。在本发明的一实施例中，底部厚度WA与侧部厚度WB的比值约为2～5，优选是4；而于另一实施例中，底部厚度WA与突部厚度WC的比值约为2～6，优选是3。
接着如图6所示，进行一氧化制作工艺632，以将功函数金属层630靠近表面的部分形成一金属氧化层634。在一实施例中，若功函数金属层630为铝化钛(TiAl)，则金属氧化层632为铝氧化钛(TiAlO)。在本发明的一实施例中，氧化制作工艺632例如将功函数金属层630可以通入任何具有氧(oxygen)的物质，例如将其暴露于常温的空气中，或者也可通入氧气并在高温环境(例如200～400℃)中进行。由于功函数金属层630已形成稳定晶形的TiAl3，故在氧化制作工艺632中，仅有少部分的TiAl3能被氧化，故会形成较薄的金属氧化层634，有助于电性的提升。在高温氧化制作工艺632的实施例中，不仅可以加快反应时间，而也能形成品质良好的金属氧化层634。此外，由于形成为极薄的金属氧化物层634，故并不影响前述功函数金属层630中各部位如底部630A、侧部630B与突部630C的比例关系。
后续，如图7所示，在基底600上依序形成一顶阻障层636与一金属层638，其中顶阻障层636形成在金属氧化层634上，而金属层638则会填满沟槽626。在一实施例中，顶阻障层636例如是氮化钛(TiN)、碳化铝钛(TiAlC)、氮化铝钛(TiAlN)、氮化钽(TaN)、碳化铝钽(TaAlC)、氮化铝钽(TaAlN)、碳化铜钛(TiCuC)、氮化铜钛(TiCuN)、碳化铜钽(TaCuC)、氮化铜钽(TaCuN)等，但并不以此为限。金属层638包含铝(Al)、钛(Ti)、钽(Ta)、钨(W)、铌(Nb)、钼(Mo)、铜(Cu)、氮化钛(TiN)、碳化钛(TiC)、氮化钽(TaN)、钛钨(Ti/W)或钛与氮化钛(Ti/TiN)等复合金属层料，但不以此为限。值得注意的是，由于本发明的功函数金属层630具有较厚的底部630A，故可以防止现有技术金属层638向下穿刺(spiking)至高介电系数层608甚至是基底600的情况。也因如此，在本发明的另一实施例中，可以省略顶阻障层636。另一方面，由于本发明的功函数金属层630具有较小的突部630C，因此后续较容易成功填入顶阻障层636或金属层638，避免现有空孔(void)的情况。
最后，如图8所示，进行一平坦化制作工艺以移除沟槽626以外的金属层638、顶阻障层636、氧化金属层634、功函数金属层630与底阻障层628。如此一来，位于沟槽626内的蚀刻停止层610、底阻障层628、功函数金属630、氧化金属层634、顶阻障层636以及金属层638会形成晶体管604中的金属栅极640，此即完成具有金属栅极640的晶体管604。
值得注意的是，前述实施方式先形成高介电常数的栅极介电层为例(即high-Kfirst制作工艺)，而本领域技术人士应当了解，本发明也可在形成金属栅极之前再次形成高介电常数的栅极介电层(即high-Klast制作工艺)。并且，前述实施例都以平面晶体管(planartransistor)为示例，本领域具有通常知识者也可了解，本发明的结构与制作工艺也可应用在非平面晶体管(non-planartransistor)上，例如是鳍状晶体管(Fin-FET)等。
本发明所形成的晶体管604，不仅具有良好的电性，且特别适用于高频通讯的集成电路。如下表所示，本发明形成的晶体管在1伏特的电压下，其最大频率(fmax)可以至275.04GHz，明显高出现有技术的239.18GHz。
本发明 现有技术
最大频率(GHz) 275.04 239.18
这是因为本发明所形成的金属栅极640中，其产生的电容(Cgd)与电阻(Rg)都较小，因此根据式(1)的方程式，可以获得较大的操作频率。
f max = f T 2 R g ( g ds + 2 π f T C gd 式(1)
综上所述，本发明提供了一种金属栅极结构以及其形成方法，能形成稳定晶形以及较厚底部的功函数金属层，可避免现有技术的诸多问题。
以上所述仅为本发明的优选实施例，凡依本发明权利要求所做的均等变化与修饰，都应属本发明的涵盖范围。

Claims (20)

1.一种金属栅极结构，形成在一介电层的一沟槽中，该金属栅极结构包含：
功函数金属层设置在该沟槽中，该功函数金属层包含一底部以及一侧部，其中该底部的一厚度与该侧部的一厚度的比值为2至5；以及
金属层填满该沟槽。
2.如权利要求1所述的金属栅极结构，其中该功函数金属层还包含一突部位于该沟槽的开口。
3.如权利要求2所述的金属栅极结构，其中该底部的该厚度与该突部的一厚度的比值为2至6。
4.如权利要求1所述的金属栅极结构，其中该功函数金属层包含铝化钛、铝化锆、铝化钨、铝化钽或铝化铪。
5.如权利要求1所述的金属栅极结构，其中该功函数金属层包含TiAlxCuy，且x+y＝3。
6.如权利要求5所述的金属栅极结构，其中该功函数金属层包含TiAl3。
7.如权利要求1所述的金属栅极结构，其中该功函数金属层包含镍(Ni)、钯(Pd)、铂(Pt)、铍(Be)、铱(Ir)、碲(Te)、铼(Re)、钌(Ru)、铑(Rh)、钨(W)、钼(Mo)；钨、钌、钼、钽(Ta)、钛(Ti)的氮化物；钨、钽、钛的碳化物；或者氮铝化钛(TiAlN)、氮铝化钽(TaAlN)。
8.如权利要求1所述的金属栅极结构，还包含一氧化金属层，设置在该功函数金属层与该金属层之间。
9.如权利要求8所述的金属栅极结构，其中该氧化金属层包含氧铝化钛(TiAlO)。
10.如权利要求1所述的金属栅极结构，其中该金属层包含铝或铜。
11.一种形成金属栅极结构的方法，包含：
提供一介电层，该介电层中具有一沟槽；
在该沟槽中形成一功函数金属层，该功函数金属层形成在高于摄氏200度的环境下；
对该功函数金属层进行一氧化制作工艺，以形成一氧化金属层；以及
在该氧化金属层上形成一金属层，以填满该沟槽。
12.如权利要求11所述的形成金属栅极结构的方法，其中该氧化制作工艺在常温进行。
13.如权利要求11所述的形成金属栅极结构的方法，其中该氧化制作工艺在摄氏200度至400度下进行。
14.如权利要求11所述的形成金属栅极结构的方法，其中该氧化制作工艺将该功函数金属层暴露至空气。
15.如权利要求11所述的形成金属栅极结构的方法，其中该功函数金属层包含一底部以及一侧部，且该底部的一厚度与该侧部的一厚度的比值为2至5。
16.如权利要求15所述的形成金属栅极结构的方法，其中该功函数层还包含一突部位于该沟槽的开口。
17.如权利要求16所述的形成金属栅极结构的方法，其中该底部的该厚度与该突部的一厚度的比值为2至6。
18.如权利要求11所述的形成金属栅极结构的方法，其中该功函数金属层包含铝化钛、铝化锆、铝化钨、铝化钽或铝化铪。
19.如权利要求11所述的形成金属栅极结构的方法，其中该功函数金属层包含TiAlxCuy，且x+y＝3。
20.如权利要求19所述的形成金属栅极结构的方法，其中该功函数金属层包含TiAl3。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019086983A1 (en) * 2017-10-31 2019-05-09 International Business Machines Corporation Conformal replacement gate electrode for short channel devices

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10644153B2 (en) * 2016-02-25 2020-05-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for fabricating the same
US10008386B2 (en) * 2016-09-12 2018-06-26 International Business Machines Corporation Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
CN108346577B (zh) * 2017-01-22 2021-04-09 中芯国际集成电路制造(上海)有限公司 半导体器件及其制造方法
US10529823B2 (en) 2018-05-29 2020-01-07 International Business Machines Corporation Method of manufacturing a semiconductor device having a metal gate with different lateral widths between spacers
US20210391438A1 (en) * 2020-06-15 2021-12-16 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect Structure Having a Multi-Deck Conductive Feature and Method of Forming the Same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950756A (zh) * 2009-07-08 2011-01-19 台湾积体电路制造股份有限公司 n型场效应晶体管、其金属栅极及其制造方法
US20120223397A1 (en) * 2011-03-01 2012-09-06 Chan-Lon Yang Metal gate structure and manufacturing method thereof
CN102683397A (zh) * 2011-03-17 2012-09-19 联华电子股份有限公司 金属栅极结构及其制作方法
CN102737971A (zh) * 2011-04-15 2012-10-17 联华电子股份有限公司 具有金属栅极的半导体元件与其制造方法
US20120292721A1 (en) * 2011-05-17 2012-11-22 United Microelectronics Corp. Semiconductor device and method of fabricating the same
CN102856255A (zh) * 2011-06-27 2013-01-02 联华电子股份有限公司 具有金属栅极的半导体元件及其制作方法
US20130049109A1 (en) * 2011-08-22 2013-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Metal Gate Structure
US20140110790A1 (en) * 2012-10-18 2014-04-24 Globalfoundries Inc. Structure and method for forming a low gate resistance high-k metal gate transistor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101950756A (zh) * 2009-07-08 2011-01-19 台湾积体电路制造股份有限公司 n型场效应晶体管、其金属栅极及其制造方法
US20120223397A1 (en) * 2011-03-01 2012-09-06 Chan-Lon Yang Metal gate structure and manufacturing method thereof
CN102683397A (zh) * 2011-03-17 2012-09-19 联华电子股份有限公司 金属栅极结构及其制作方法
CN102737971A (zh) * 2011-04-15 2012-10-17 联华电子股份有限公司 具有金属栅极的半导体元件与其制造方法
US20120292721A1 (en) * 2011-05-17 2012-11-22 United Microelectronics Corp. Semiconductor device and method of fabricating the same
CN102856255A (zh) * 2011-06-27 2013-01-02 联华电子股份有限公司 具有金属栅极的半导体元件及其制作方法
US20130049109A1 (en) * 2011-08-22 2013-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Metal Gate Structure
US20140110790A1 (en) * 2012-10-18 2014-04-24 Globalfoundries Inc. Structure and method for forming a low gate resistance high-k metal gate transistor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019086983A1 (en) * 2017-10-31 2019-05-09 International Business Machines Corporation Conformal replacement gate electrode for short channel devices
US10529815B2 (en) 2017-10-31 2020-01-07 International Business Machines Corporation Conformal replacement gate electrode for short channel devices
GB2582080A (en) * 2017-10-31 2020-09-09 Ibm Conformal replacement gate electrode for short channel devices
US11195929B2 (en) 2017-10-31 2021-12-07 International Business Machines Corporation Conformal replacement gate electrode for short channel devices
GB2582080B (en) * 2017-10-31 2022-03-09 Ibm Conformal replacement gate electrode for short channel devices

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