CN105515908A - AFDX photoelectric conversion time delay test method - Google Patents

AFDX photoelectric conversion time delay test method Download PDF

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Publication number
CN105515908A
CN105515908A CN201510920774.0A CN201510920774A CN105515908A CN 105515908 A CN105515908 A CN 105515908A CN 201510920774 A CN201510920774 A CN 201510920774A CN 105515908 A CN105515908 A CN 105515908A
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China
Prior art keywords
afdx
signal
end system
time delay
test
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Pending
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CN201510920774.0A
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Chinese (zh)
Inventor
白杨
孔维刚
张旭
陈长胜
何向栋
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Xian Aeronautics Computing Technique Research Institute of AVIC
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Xian Aeronautics Computing Technique Research Institute of AVIC
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Priority to CN201510920774.0A priority Critical patent/CN105515908A/en
Publication of CN105515908A publication Critical patent/CN105515908A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

The invention belongs to the technology of airborne network test, and discloses an AFDX (Avionics Full Duplex Switched Ethernet) photoelectric conversion time delay test method. According to the method, an AFDX end system is used as a test apparatus, the test of AFDX photoelectric conversion time delay is converted into a test of time delay between transmitting an enable signal TX_EN and receiving a useful signal RF_DV by the AFDX end system, test of photoelectric conversion time delay of ns grade is realized, and consequently, high-precision test of the AFDX photoelectric conversion time delay is realized.

Description

AFDX photoelectric conversion time delay test method
Technical Field
The invention is used in the field of airborne network testing, and relates to a method for testing conversion delay of an AFDX photoelectric converter.
Background
Avionics full duplex switched ethernet (AFDX) is a real-time, deterministic, full duplex switched ethernet, currently internationally recognized as the mainstream airborne network of transport aircraft. Based on the current development, in the on-board AFDX network, the optical fiber does not completely replace the conventional medium such as the coaxial cable and the twisted pair, so the AFDX photoelectric converter is required to provide the photoelectric conversion for the coaxial cable and the optical fiber.
The network delay is a very important performance index of the AFDX network, and the delay characteristic of the network system must be considered when the AFDX network is designed and data stream distribution is performed, so that the data stream is ensured to be transmitted within a determined delay range. Under normal conditions, the photoelectric conversion time delay of the AFDX photoelectric converter is less than 1us, but the precision of a common AFDX network test device is us grade, and the photoelectric conversion time delay of the AFDX photoelectric converter cannot be accurately measured.
Disclosure of Invention
The invention provides an AFDX photoelectric conversion time delay test method, which realizes AFDX photoelectric conversion time delay test by directly sampling and testing a sending enabling signal and a receiving effective signal of an AFDX end system physical layer, has high test precision and can reach ns level.
The technical scheme of the invention is as follows:
the AFDX photoelectric conversion time delay testing method is characterized by comprising the following steps of:
(1) as in fig. 2, the two paths of AFDX end-system are electrically interfaced back to the loop using coaxial cables; the two paths of electric interfaces are an electric interface 1 and an electric interface 2 respectively;
(2) an electrical interface 1 of the AFDX end system sends an AFDX data frame to an electrical interface 2 through a coaxial cable;
(3) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T1 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
wherein, the TX _ EN signal is a sending enable signal, and the RX _ DV signal is a receiving effective signal;
(4) disconnecting the coaxial cable connecting the electrical interface 1 and the electrical interface 2;
(5) as shown in fig. 3, two electrical interfaces of the AFDX photoelectric converter are respectively connected to two electrical interfaces of the AFDX end system, and two optical interfaces of the AFDX photoelectric converter use optical fiber jumpers to loop back;
(6) repeating the step (2);
(7) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T2 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
(8) and calculating (delta T2-delta T1) to obtain the AFDX photoelectric conversion time delay delta T.
The TX _ EN signal and RX _ DV signal are tapped from the ethernet physical layer chip of the AFDX end system to the test panel,
and when the oscilloscope collects the TX _ EN signal and the RX _ DV signal led out from the AFDX end system at the same time, the oscilloscope is connected with the test panel.
The pin corresponding to the TX _ EN signal of the Ethernet physical layer chip is connected with the test panel through the FPGA and the PCI interface,
a pin corresponding to an RX _ DV signal of the Ethernet physical layer chip is connected with the test panel through an FPGA and a PCI interface;
or,
the pin corresponding to the TX _ EN signal of the Ethernet physical layer chip is connected with the test panel through a PCI interface,
and the pin corresponding to the RX _ DV signal of the Ethernet physical layer chip is connected with the test panel through a PCI interface.
Has the advantages that:
the invention uses the AFDX end system as a testing device, converts the test of AFDX photoelectric conversion time delay into the time delay test between the AFDX end system sending enabling signal TX _ EN and the receiving effective signal RX _ DV, can realize the test of ns-level photoelectric conversion time delay, meets the test requirement of AFDX photoelectric conversion time delay, has accurate and intuitive test result, and solves the problems that the common AFDX network testing equipment has low precision and can not accurately measure the conversion time delay of the AFDX photoelectric converter.
Drawings
FIG. 1 is a functional block diagram of an AFDX photoelectric converter;
FIG. 2 is a schematic diagram of the delay test of the AFDX end system of the present invention;
fig. 3 is a schematic diagram of the time delay test of the AFDX photoelectric converter of the present invention.
Detailed Description
The invention provides an AFDX photoelectric conversion time delay testing method.A testing device for AFDX photoelectric conversion time delay uses an AFDX end system, the end system is provided with two paths of electric interfaces, one path outputs an AFDX data frame, and the other path receives the AFDX data frame. The physical layer circuit of the AFDX end system consists of a PHY chip, the time delay between the sending data and the sending enable signal TX _ EN of the PHY chip and the time delay between the receiving data and the receiving effective signal RX _ DV are basically fixed, so that the time delay of the sending data and the receiving data can be converted into a time delay test between the sending enable signal TX _ EN and the receiving effective signal RX _ DV. In the test apparatus, the transmission enable signal TX _ EN and the reception valid signal RX _ DV are led to the panel through a cable. During testing, firstly, two paths of electrical interfaces of an AFDX end system are looped back through a coaxial cable (relative to total time delay, jumper wires are short in distance, and introduced time delay is negligible), the AFDX end system sends and receives data, two paths of probes of an oscilloscope are used for testing TX _ EN and RX _ DV respectively, and time difference delta T1 of signals TX _ EN and RX _ DV is read and recorded; secondly, disconnecting the coaxial cable, respectively connecting two electrical interfaces of the AFDX photoelectric converter with two electrical interfaces of an AFDX end system, looping two optical interfaces of the AFDX photoelectric converter by using an optical fiber jumper (relative total time delay, the introduced time delay can be ignored due to short distance of the jumper), sending and receiving data by the AFDX end system, respectively testing TX _ EN and RX _ DV by using two probes of an oscilloscope, and reading and recording the time difference delta T2 of signals TX _ EN and RX _ DV; finally, the conversion time delay of the photoelectric converter is obtained through calculation (delta T2-delta T1).
The invention is further described below with reference to the accompanying drawings:
fig. 1 shows a functional block diagram of an AFDX photoelectric converter, which is used for completing the interconversion between optical signals and electrical signals of AFDX data, wherein the conversion delay of the AFDX photoelectric converter needs to meet the delay characteristic of a network system, and the data stream is ensured to be transmitted within a determined delay range.
Referring to fig. 2, the AFDX photoelectric conversion delay testing apparatus uses an AFDX end system, which has two electrical interfaces, one electrical interface outputs an AFDX data frame, and the other electrical interface receives the AFDX data frame. The physical layer circuit of the AFDX end system consists of a PHY chip, the time delay delta t1 between the sending data and the sending enable signal TX _ EN of the PHY chip and the time delay delta t21 between the receiving data and the receiving valid signal RX _ DV are basically fixed, so that the time delay of the sending data and the receiving data can be converted into a time delay test between the sending enable signal TX _ EN and the receiving valid signal RX _ DV. In a specific test apparatus, the transmit enable signal TX _ EN of the channel 1 and the receive valid signal RX _ DV of the channel 2 of the AFDX end-system are directed to the panel through a cable.
The AFDX photoelectric conversion time delay test method comprises the following steps:
(1) as in fig. 2, the two paths of AFDX end-system are electrically interfaced back to the loop using coaxial cables; the two paths of electric interfaces are an electric interface 1 and an electric interface 2 respectively;
(2) an electrical interface 1 of the AFDX end system sends an AFDX data frame to an electrical interface 2 through a coaxial cable;
(3) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T1 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
wherein, the TX _ EN signal is a sending enable signal, and the RX _ DV signal is a receiving effective signal;
(4) disconnecting the coaxial cable connecting the electrical interface 1 and the electrical interface 2;
(5) as shown in fig. 3, two electrical interfaces of the AFDX photoelectric converter are respectively connected to two electrical interfaces of the AFDX end system, and two optical interfaces of the AFDX photoelectric converter use optical fiber jumpers to loop back;
(6) repeating the step (2);
(7) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T2 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
(8) and calculating (delta T2-delta T1) to obtain the AFDX photoelectric conversion time delay delta T.
The TX _ EN signal and RX _ DV signal can be tapped to a test panel to which the oscilloscope is connected when the oscilloscope simultaneously collects the TX _ EN signal and RX _ DV signal tapped from the AFDX end system.

Claims (4)

  1. The AFDX photoelectric conversion time delay testing method is characterized by comprising the following steps of:
    (1) two paths of electric interfaces of the AFDX end system are connected back to a ring by using a coaxial cable; the two paths of electric interfaces are an electric interface 1 and an electric interface 2 respectively;
    (2) an electrical interface 1 of the AFDX end system sends an AFDX data frame to an electrical interface 2 through a coaxial cable;
    (3) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T1 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
    wherein, the TX _ EN signal is a sending enable signal, and the RX _ DV signal is a receiving effective signal;
    (4) disconnecting the coaxial cable connecting the electrical interface 1 and the electrical interface 2;
    (5) connecting two paths of electrical interfaces of the AFDX photoelectric converter with two paths of electrical interfaces of an AFDX end system respectively, wherein two paths of optical interfaces of the AFDX photoelectric converter use optical fiber jumpers to return to a loop;
    (6) repeating the step (2);
    (7) the oscilloscope simultaneously collects a TX _ EN signal and an RX _ DV signal led out from the AFDX end system, and obtains the delay time delta T2 of the TX _ EN signal and the RX _ DV signal according to the collected signals;
    (8) and calculating (delta T2-delta T1) to obtain the AFDX photoelectric conversion time delay delta T.
  2. 2. The AFDX optoelectric conversion delay test method of claim 1, wherein the TX _ EN signal and the RX _ DV signal are derived from an Ethernet physical layer chip of an AFDX end-system to a test panel;
    and when the oscilloscope collects the TX _ EN signal and the RX _ DV signal led out from the AFDX end system at the same time, the oscilloscope is connected with the test panel.
  3. 3. The AFDX optoelectric conversion delay test method of claim 2, wherein,
    a pin corresponding to a TX _ EN signal of the Ethernet physical layer chip is connected with the test panel through an FPGA and a PCI interface;
    and a pin corresponding to an RX _ DV signal of the Ethernet physical layer chip is connected with the test panel through the FPGA and the PCI interface.
  4. 4. The AFDX optoelectric conversion delay test method of claim 2, wherein,
    a pin corresponding to a TX _ EN signal of the Ethernet physical layer chip is connected with the test panel through a PCI interface;
    and the pin corresponding to the RX _ DV signal of the Ethernet physical layer chip is connected with the test panel through a PCI interface.
CN201510920774.0A 2015-12-10 2015-12-10 AFDX photoelectric conversion time delay test method Pending CN105515908A (en)

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Cited By (3)

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WO2019036943A1 (en) * 2017-08-23 2019-02-28 华为技术有限公司 Packet processing method and network device
CN109884517A (en) * 2019-03-21 2019-06-14 浪潮商用机器有限公司 A kind of chip to be measured and test macro
CN113923108A (en) * 2021-09-26 2022-01-11 浙江大华技术股份有限公司 Method, system, equipment and storage medium for automatically configuring time delay parameters

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CN202940827U (en) * 2012-09-07 2013-05-15 北京旋极信息技术股份有限公司 Avionic full duplex real-time Ethernet data pre-processing device
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CN102209000A (en) * 2011-07-05 2011-10-05 北京航空航天大学 Avionics full duplex switched Ethernet (AFDX) network terminal system simulator with layered fault injection and fault analysis functions
EP2600546A1 (en) * 2011-12-02 2013-06-05 Alcatel Lucent Method and Related Network Element Providing Delay Measurement in an Optical Transport Network
CN202818339U (en) * 2012-09-07 2013-03-20 北京旋极信息技术股份有限公司 AFDX time delay measuring device
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019036943A1 (en) * 2017-08-23 2019-02-28 华为技术有限公司 Packet processing method and network device
CN109699199A (en) * 2017-08-23 2019-04-30 华为技术有限公司 A kind of method and the network equipment of Message processing
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CN109884517A (en) * 2019-03-21 2019-06-14 浪潮商用机器有限公司 A kind of chip to be measured and test macro
CN109884517B (en) * 2019-03-21 2021-04-30 浪潮商用机器有限公司 Chip to be tested and test system
CN113923108A (en) * 2021-09-26 2022-01-11 浙江大华技术股份有限公司 Method, system, equipment and storage medium for automatically configuring time delay parameters
CN113923108B (en) * 2021-09-26 2024-01-30 浙江大华技术股份有限公司 Method, system, equipment and storage medium for automatically configuring time delay parameters

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