CN105489755A - Self-aligned preparation method of full-limited phase-change memory with vertical structure - Google Patents
Self-aligned preparation method of full-limited phase-change memory with vertical structure Download PDFInfo
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- CN105489755A CN105489755A CN201510874184.9A CN201510874184A CN105489755A CN 105489755 A CN105489755 A CN 105489755A CN 201510874184 A CN201510874184 A CN 201510874184A CN 105489755 A CN105489755 A CN 105489755A
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8418—Electrodes adapted for focusing electric field or current, e.g. tip-shaped
Abstract
The invention provides a self-aligned preparation method of a full-limited phase-change memory with a vertical structure. On one hand, a method for forming a localized phase-change material through filling, annealing and wet etching of a maskless phase-change material is adopted, so that the depth-to-width ratio in a hole filling technology is reduced; the filling quality of a thin film is improved; the phase-change material filling technology is a self-aligned technology; and the technology implementation difficulty is low; and on the other hand, a tapered electrode of the structure can strengthen an electric field between two electrodes near a tapered tip, so that the size of a contact electrode is reduced; the effective phase-change volume is reduced; and the power consumption is lowered. In addition, the available phase-change material is fully stored, and the structure has relatively good fatigue properties, so that the work reliability of a device is improved.
Description
Technical field
The present invention relates to micro & nano technology field, particularly a kind of vertical stratification limits the autoregistration preparation method of phase transition storage entirely.
Background technology
The accelerated development of new high-tech industry and infrastructure service facility is more and more higher for the requirement of quick calculating and efficient storage, and the lifting of CPU disposal ability to the speed of storage chip and the dependence of power consumption more and more significant, therefore how developing efficient storage becomes following and is badly in need of one of key technology broken through.Phase transition storage PCM (phasechangerandomaccessmemory) take chalcogenide compound as storage medium, rely on the thermal effect of electric current control phase-change material between crystalline state (low-resistance) and amorphous state (high resistant), transform write and the erasing of the information that realizes, rely on the change of detection storage area resistance to realize the reading of information.PCM has non-volatile, compared with current most memory, have that device size is little, low in energy consumption, reading speed be fast, Flouride-resistani acid phesphatase, can realize dynamic data attemper and with the plurality of advantages such as existing CMOS technology is compatible.There is similar device architecture, based on the Memister RRAM of metal oxide because its structure is simple, composition controllable precise, with the advantage such as logic process is compatible, be considered to most possible and replace the main products such as current SRAM, DRAM, FLASH and become one of semiconductor memory that following main flow stores.
At present, the main problem that PCM phase transition storage faces is that operating current is excessive, higher to the requirement of drive circuit, limits the raising storing the reduction of power consumption, the lifting of storage speed and storage density.It is prepare the nanometer plug electrode of smaller szie that the volume production structure of PCM reduces a class in the method for effective phase variable volume; Another kind of method prepares phase-change material restrictive, reduces effective phase variable volume by the volume reducing to be available for phase transformation.These two class methods all will be limited to complicated PVD, CVD process for filling hole and CMP surface planarisation technique.The vertical stratification that the present invention proposes limits the autoregistration preparation method of phase transition storage entirely, on the one hand, adopt maskless phase-change material to fill, anneal and the method for wet etching formation localization phase-change material, reduce the depth-to-width ratio in process for filling hole, improve the filling quality of film, and preparation technology is self-registered technology, reduce process implementing difficulty; On the other hand, the tapered electrode of this structure the strengthening near cone is most advanced and sophisticated of two interelectrode electric fields, can be equivalent to the size reducing contact electrode, reduces effective phase variable volume, reduce power consumption.In addition, because available phase-change material deposit is abundant, this structure also has good fatigue properties, improves the functional reliability of device.
Summary of the invention
For solving the above-mentioned problems in the prior art, the present invention proposes the autoregistration preparation method that a kind of vertical stratification limits phase transition storage entirely.The present invention, for realizing junior unit power consumption, large devices function reliability, compatible with existing CMOS technology fast, has extraordinary commercial application prospect.
The invention discloses the autoregistration preparation method that a kind of vertical stratification limits phase transition storage entirely.The concrete steps of the method comprise:
Step 1: deposit first electric insulating material layer 102A on the substrate 101, then the method for " photoetching-thin film deposition-stripping " is used to prepare bottom electrode layer 103 on the first electric insulating material layer 102A, and deposit second electric insulating material layer 102B passivated surface, and prepare auxiliary electrode layer 104 by the method for " photoetching-stripping ";
Step 2: at the upper surface of the second electric insulating material layer 102B and auxiliary electrode layer 104, spin coating also makes photoresist mask 100 by lithography, and etch the through hole that the degree of depth arrives bottom electrode layer 103 upper surface by this mask dry, and deposit one deck tapered electrode layer 105;
Step 3: remove photoresist mask 100, peels off and forms cone point not higher than the tapered electrode 105A of auxiliary electrode layer 104 upper surface;
Step 4: above auxiliary electrode layer 104 and tapered electrode 105A, adopts the method for " photoetching-thin film deposition-stripping " to prepare one deck phase-change material layers 106;
Step 5: annealing also with alkaline solution corrosion phase-change material layers 106, forms the localization phase-change material layers 106A being only positioned at through hole;
Step 6: above the second electric insulating material layer 102B, auxiliary electrode layer 104 and localization phase-change material layers 106A, top electrode layer 107 is prepared by the method for " photoetching-thin film deposition-stripping ", and with deposit the 3rd electric insulating material layer 102C passivated surface;
Step 7: at the 3rd electric insulating material layer 102C upper surface, adopt the method preparation contact degree of depth of " photoetching-etching-thin film deposition-stripping " to arrive the first test electrode 108A and the second test electrode 108B of bottom electrode layer 103 and top electrode layer 107 upper surface, complete device preparation.
The implementation quality of process for filling hole is relevant to the depth-to-width ratio in hole to a great extent, the filling perforation of the preparation method's phase-change material that the present invention relates to is without the need to by means of mask, reduce the depth-to-width ratio wanting filling perforation, on the one hand, adopt maskless phase-change material to fill, annealing also wet etching forms the method for localization phase-change material, reduce the depth-to-width ratio in process for filling hole, improve the filling quality of film, and preparation technology is self-registered technology, reduces process implementing difficulty; On the other hand, the tapered electrode of this structure the strengthening near cone is most advanced and sophisticated of two interelectrode electric fields, can be equivalent to the size reducing contact electrode, reduces effective phase variable volume, reduce power consumption.In addition, because available phase-change material deposit is abundant, this structure also has good fatigue properties, improves the functional reliability of device.
Solve the shortcoming that R&D cycle is long, difficulty is large, cost is high, poor for applicability researched and developed this type of vertical stratification in the past and caused by the research and development bottleneck of CMP technology, and preparation precision, preparation efficiency, economy and compatible etc. with existing CMOS technology in tool have an enormous advantage.
Accompanying drawing explanation
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in further detail, wherein:
Fig. 1 is the flow chart that vertical stratification provided by the invention limits the autoregistration preparation method of phase transition storage entirely;
Fig. 2-8 is autoregistration preparation technology schematic flow sheets that vertical stratification limits phase transition storage entirely.
Embodiment
Refer to shown in Fig. 1, the invention provides the autoregistration preparation method that a kind of vertical stratification limits phase transition storage entirely, on the one hand, adopt maskless phase-change material to fill, anneal and the method for wet etching formation localization phase-change material, not only reduce the depth-to-width ratio in process for filling hole, improve the filling quality of film, and this phase-change material fill process is self-registered technology, process implementing difficulty is low; On the other hand, the tapered electrode of this structure the strengthening near cone is most advanced and sophisticated of two interelectrode electric fields, can be equivalent to the size reducing contact electrode, reduces effective phase variable volume, reduce power consumption.In addition, because available phase-change material deposit is abundant, this structure also has good fatigue properties, improves the functional reliability of device.
Fig. 1 shows a kind of vertical stratification that the present invention proposes and entirely limits the autoregistration preparation method flow chart of phase transition storage.Fig. 2-8 gives a kind of vertical stratification that the present invention proposes and entirely limits the autoregistration preparation technology flow chart of phase transition storage.The invention provides the autoregistration preparation method that a kind of vertical stratification limits phase transition storage entirely, the method comprises:
Step 1: deposit first electric insulating material layer 102A on the substrate 101, then the method for " photoetching-thin film deposition-stripping " is used to prepare bottom electrode layer 103 on the first electric insulating material layer 102A, and deposit second electric insulating material layer 102B passivation bottom electrode layer 103, and prepare auxiliary electrode layer 104 by the method for " photoetching-stripping ";
Wherein, the material of described substrate 101 can be silicon, gallium nitride, sapphire, carborundum, GaAs or glass; Effect is that provider part is prepared necessary planarization and supported.
Wherein, the purpose of design of the first electric heating insulating barrier 102A is the electric heating insulation environment providing device, and its characteristic thickness is no more than 300 nanometers.The purpose of design of the second electric insulating material layer 102B is to form the tapered electrode in hole, and realizes the phase-change material of restricted type in hole.The design thickness of the second electric insulating material layer 102B directly determines can the design thickness of deposit phase-change material, and its design thickness is 50 to 300 nanometers;
Wherein, the design function of bottom electrode layer 103 is that the phase-change material of local area is interior and applies electric pulse induced phase transformation, and its thickness setting is between 20 to 200 nanometers; The design function of auxiliary electrode layer 104 provides the inducing layer of phase-change material wet etching, the phase-change material in conductive substrates and insulation class substrate that experiment finds to be in crystalline state in alkaline solution wet etching speed difference more than an order of magnitude.Phase-change material after magnetron sputtering is in amorphous state, is insoluble to alkaline solution, through the annealing of 200-500 DEG C, phase-change material can be set to crystalline state.Therefore, by the metal level to the thin layer of deposit above circular hole, as the conductive-type substrate in phase-change material corrosion process, improve the corrosion rate of phase-change material in alkaline solution, its design thickness is less than 20 nanometers;
Step 2: at the upper surface of the second electric insulating material layer 102B and auxiliary electrode layer 104, spin coating also makes photoresist mask 100 by lithography, and etch the through hole that the degree of depth arrives bottom electrode layer 103 upper surface by this mask dry, and deposit one deck tapered electrode layer 105;
Wherein, the design function of photoresist mask 100 is the etching mask providing circular hole, and increase the depth-to-width ratio that film is filled on the other hand, object is the film parallel port of impelling above hole, in hole, form taper.Design thickness 200 ~ 500 nanometer of photoresist mask 100.The material of photoresist mask 100 is SU-8 photoresist, ZEP photoresist, HSQ photoresist, PMMA photoresist, AZ sequence of photolithography glue; The combination preparation of any one or a few method in directly being write by spin-coating method, optical lithography, laser direct-writing, electron beam exposure, ion beam;
Step 3: remove photoresist mask 100, peels off and forms cone point not higher than the tapered electrode 105A of auxiliary electrode layer 104 upper surface;
Wherein, the top yardstick of cone point and the deposition thickness of phase-change material determine the size of effective phase variable volume.The top of cone point is not higher than the design of auxiliary electrode layer 104, and object is that phase-change material is filled in circular hole by the later stage, improves the efficiency of heating surface of phase-change material;
Step 4: above auxiliary electrode layer 104 and tapered electrode 105A, adopts the method for " photoetching-thin film deposition-stripping " to prepare one deck phase-change material layers 106;
Wherein, phase-change material layers 106 is GeSbTe series alloys, is to be prepared by the one in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, laser-assisted deposition method, atomic layer deposition strategy, thermal oxidation method or metallo-organic decomposition process;
Step 5: annealing also with alkaline solution corrosion phase-change material layers 106, forms the localization phase-change material layers 106A being only positioned at through hole;
Wherein, under annealing way can select vacuum, nitrogen, argon atmosphere, short annealing, limit temperature is at 200-500 DEG C; The initial deposition state of phase-change material is amorphous state, and the first-phase temperature of phase-change material, usually between about 150 DEG C, adopts the annealing in process of 200-500 DEG C, phase-change material can be set to crystalline state;
Step 6: above the second electric insulating material layer 102B, auxiliary electrode layer 104 and localization phase-change material layers 106A, top electrode layer 107 is prepared by the method for " photoetching-thin film deposition-stripping ", and with deposit the 3rd electric insulating material layer 102C passivation top electrode layer 107;
Step 7: at the 3rd electric insulating material layer 102C upper surface, adopt the method preparation contact degree of depth of " photoetching-etching-thin film deposition-stripping " to arrive the first test electrode 108A and the second test electrode 108B of bottom electrode layer 103 and top electrode layer 107 upper surface, complete device preparation.
Wherein, the material of described first, second, third, fourth and fifth electric heating spacer material layer 102A, 102B and 102C can be oxynitrides, nitride or oxide, or more wherein several combination, effect be the work of provider part electric heating insulation environment, can identical also can not be identical.Because its function is identical, the lexicographic order only from last in numbering is distinguished.Wherein, in order to realize electric heating insulation characterisitic better, the silica of the silicon nitride that the first electric insulating material layer 102A preferably selects LPCVD method to grow or thermal oxidation process growth.Consider that the temperature of film deposition art is compatible simultaneously, according to the order (the 2nd 102B and the 3rd 102C) of motor film, come the deposition temperature of film below not higher than the deposition temperature of the film of preorder; Described first and second and three electric insulating material layer 102A, 102B and 102C, be prepared by one or several the combination in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, laser-assisted deposition method, atomic layer deposition strategy or thermal oxidation method or metallo-organic decomposition process.
Wherein, the material of bottom electrode layer 103, auxiliary electrode layer 104, tapered electrode layer 105, tapered electrode 105A, top electrodes 107, first test electrode 108A and the second test electrode 108B is the combination of one or more in tungsten, titanium nitride, nickel, aluminium, titanium, gold, silver, copper, platinum simple substance and oxide thereof, can pass through one or several preparations in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, atomic layer deposition method, metallo-organic decomposition process.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. vertical stratification limits an autoregistration preparation method for phase transition storage entirely, and the method comprises:
Step 1: at upper deposit first electric insulating material layer (102A) of substrate (101), then the method for " photoetching-thin film deposition-stripping " is used to prepare bottom electrode layer (103) on the first electric insulating material layer (102A), and deposit second electric insulating material layer (102B) passivation bottom electrode layer (103), and prepare auxiliary electrode layer (104) by the method for " photoetching-stripping ";
Step 2: at the upper surface of the second electric insulating material layer (102B) and auxiliary electrode layer (104), spin coating also makes photoresist mask (100) by lithography, and go out the through hole that the degree of depth arrives bottom electrode layer (103) upper surface by this mask (100) dry etching, and deposit one deck tapered electrode layer (105);
Step 3: remove photoresist mask (100), peels off and forms cone point not higher than the tapered electrode (105A) of auxiliary electrode layer (104) upper surface;
Step 4: in the top of auxiliary electrode layer (104) and tapered electrode (105A), adopts the method for " photoetching-thin film deposition-stripping " to prepare one deck phase-change material layers (106);
Step 5: annealing also corrodes phase-change material layers (106) with alkaline solution, forms the localization phase-change material layers (106A) being only positioned at through hole;
Step 6: in the top of the second electric insulating material layer (102B), auxiliary electrode layer (104) and localization phase-change material layers (106A), top electrode layer (107) is prepared by the method for " photoetching-thin film deposition-stripping ", and with deposit the 3rd electric insulating material layer 102C passivation top electrode layer (107);
Step 7: at the 3rd electric insulating material layer (102C) upper surface, adopt the method preparation contact degree of depth of " photoetching-etching-thin film deposition-stripping " to arrive the first test electrode (108A) and second test electrode (108B) of bottom electrode layer (103) and top electrode layer (107) upper surface, complete device preparation.
2. vertical stratification according to claim 1 limits the autoregistration preparation method of phase transition storage entirely, and wherein the material of photoresist mask layer (100) is SU-8 photoresist, ZEP photoresist, PMMA photoresist, AZ6130 photoresist or S9912 photoresist.
3. vertical stratification according to claim 2 limits the autoregistration preparation method of phase transition storage entirely, and wherein photoresist mask layer (100) is the combination preparation of any one or a few method in directly being write by optical lithography, laser direct-writing, electron beam exposure and ion beam.
4. vertical stratification according to claim 1 limits the autoregistration preparation method of phase transition storage entirely, and wherein the material of substrate (101) is silicon, gallium nitride, sapphire, carborundum or glass.
5. vertical stratification according to claim 1 limits the autoregistration preparation method of phase transition storage entirely, and wherein the material of first, second, and third electric heating spacer material layer (102A), (102B) and (102C) is any one or a few the combination in oxynitrides, nitride or oxide.
6. vertical stratification according to claim 5 limits the autoregistration preparation method of phase transition storage entirely, and wherein first, second, and third electric heating spacer material layer (102A), (102B) and (102C) are prepared by the one in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, laser-assisted deposition method, atomic layer deposition strategy, thermal oxidation method or metallo-organic decomposition process.
7. vertical stratification according to claim 1 limits the autoregistration preparation method of phase transition storage entirely, and wherein the material of bottom electrode layer (103), auxiliary electrode layer (104), tapered electrode layer (105), tapered electrode (105A), top electrode layer (107), the first test electrode (108A) and the second test electrode (108B) is the combination of one or more in tungsten, titanium nitride, nickel, aluminium, titanium, gold, silver, copper or platinum simple substance and oxide thereof.
8. entirely limit the autoregistration preparation method of phase transition storage according to the arbitrary described vertical stratification of claim 1-7, wherein bottom electrode layer (103), auxiliary electrode layer (104), tapered electrode layer (105), tapered electrode (105A), top electrode layer (107), the first test electrode (108A) and the second test electrode (108B) are by one or several preparations in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, atomic layer deposition method, metallo-organic decomposition process.
9. vertical stratification according to claim 1 limits the autoregistration preparation method of phase transition storage entirely, and wherein the material of phase-change material layers (106) and localization phase-change material layers (106A) is GeSbTe series alloy.
10. vertical stratification according to claim 9 limits the autoregistration preparation method of phase transition storage entirely, and wherein phase-change material layers (106) and localization phase-change material layers (106A) are by one or several preparations in sputtering method, vapour deposition method, CVD (Chemical Vapor Deposition) method, laser-assisted deposition method, atomic layer deposition strategy, thermal oxidation method or metallo-organic decomposition process.
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| CN106409685A (en) * | 2016-09-13 | 2017-02-15 | 扬州扬杰电子科技股份有限公司 | Method for removing deposition on side walls of grooves |
| CN111463347A (en) * | 2020-04-08 | 2020-07-28 | 电子科技大学 | Method for preparing high-performance memristor |
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| US20130157434A1 (en) * | 2009-06-29 | 2013-06-20 | SK Hynix Inc. | Phase change memory apparatus and fabrication method thereof |
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| US20090191367A1 (en) * | 2008-01-30 | 2009-07-30 | Industrial Technology Research Institute | Memory devices, stylus-shaped structures, electronic apparatuses, and methods for fabricating the same |
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| CN106409685A (en) * | 2016-09-13 | 2017-02-15 | 扬州扬杰电子科技股份有限公司 | Method for removing deposition on side walls of grooves |
| CN111463347A (en) * | 2020-04-08 | 2020-07-28 | 电子科技大学 | Method for preparing high-performance memristor |
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