CN105470345A - Preparation method of ultrathin polysilicon solar cell sheet - Google Patents

Preparation method of ultrathin polysilicon solar cell sheet Download PDF

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Publication number
CN105470345A
CN105470345A CN201510627213.1A CN201510627213A CN105470345A CN 105470345 A CN105470345 A CN 105470345A CN 201510627213 A CN201510627213 A CN 201510627213A CN 105470345 A CN105470345 A CN 105470345A
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Prior art keywords
annealing
sintering
solar cell
ultrathin
oscillation
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许新湖
柯雨馨
戴亮亮
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Sunshine Earth (fujian) New Energy Co Ltd
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Sunshine Earth (fujian) New Energy Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864Annealing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868Passivation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Photovoltaic Devices (AREA)

Abstract

The invention discloses a preparation method of an ultrathin polysilicon solar cell sheet. A silicon chip of 130+/-20 micrometers is used, and the steps of pre-cleaning, texturing, diffusion, annealing after the diffusion, plasma etching, first ultrasonic oscillation, post-cleaning-plasma vapor deposition-second ultrasonic oscillation, screen printing, sintering, annealing after the sintering, and detection are carries out. According to the invention, the cost of the silicon chip is lowered.

Description

Preparation method of ultrathin polycrystalline silicon solar cell
Technical Field
The invention relates to the field of solar cells, in particular to a labor intensity method of a preparation method of an ultrathin polycrystalline silicon solar cell.
Background
The general preparation process of the solar cell comprises the following steps: the method comprises the following steps of pre-cleaning, texturing, diffusing, plasma etching, post-cleaning, plasma vapor deposition, screen printing, sintering and detecting. Wherein, the silicon chip is about 200 microns.
However, in the thickness of 200 microns, the junction depth of the P-N junction is generally within 0.3-0.5 microns, and the thickness of the silicon wafer for the actual absorption spectrum is 50-60 microns, which absorbs more than 90%, so the thickness of 200 microns is not necessary at all. However, the thickness of the silicon wafer of the polysilicon cell in the market is 200 micrometers (+ -20 micrometers), so that no ultrathin silicon wafer is used for the cell in the market, and the ultrathin silicon wafer cannot be used for the cell because of the cutting technology, for example, 201120425060.X discloses an ultrathin silicon wafer of a solar cell, which comprises a silicon wafer body, and is characterized in that the thickness of the silicon wafer body is 120 micrometers to 160 micrometers, and the surface of the silicon wafer body is a rectangular pyramid textured surface. CN200820030960.2 discloses an ultrathin solar grade silicon wafer, which is a solar cell substrate material. The body is a square thin sheet consisting of an upper plane and a lower plane, four corners of the square thin sheet are four identical 45-degree chamfers, the distance between the upper plane and the lower plane is 165 mu M-195 mu M, the surfaces of the upper plane and the lower plane of the ultrathin solar grade silicon wafer are smooth, flat and flawless, and the warping degree of the body is less than 75 mu M. The ultrathin solar-grade silicon wafer is formed by cutting a silicon wafer round bar. The solar cell is mainly prepared by the following steps of 3h processing from a silicon wafer to a cell, and multiple working procedures including high temperature and liquid cooling: the method comprises the following steps of pre-cleaning, texturing, diffusing, plasma etching, post-cleaning, plasma vapor deposition, screen printing, sintering and detecting. During these processes, the silicon wafer itself is fragile, and ultra-thin silicon wafers are more fragile. In order to ensure the fragmentation rate, a silicon wafer with a certain thickness must be used.
The present application addresses this issue.
Disclosure of Invention
The invention aims to provide a preparation method of an ultrathin polycrystalline silicon solar cell to solve the problems in the prior art.
The technical scheme provided by the invention is as follows:
a preparation method of an ultrathin polycrystalline silicon solar cell comprises the following steps:
adopting a 130 +/-20 micron silicon wafer, pre-cleaning, texturing, diffusing, annealing after diffusing, plasma etching, first ultrasonic oscillation, post-cleaning, plasma vapor deposition, second ultrasonic oscillation, screen printing, sintering, annealing after sintering and detecting, wherein,
1) treatment in the texturing process: piling two silicon wafers together for wool making, and simultaneously adding sodium acetate with the mass volume ratio of 2-8% into a wool making solution;
2) the annealing time after diffusion is 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing;
3) oscillating for 30-50min with primary ultrasonic frequency of 20-150 KHZ;
4) the annealing time after sintering is 10-15min, the temperature is 120-250 ℃, and the negative pressure argon filling protection is carried out during the annealing;
5) the second ultrasonic wave is 20KHZ-100KHZ, and the oscillation is carried out for 10-20 min.
In the preferred embodiment of the invention, the first ultrasonic wave is 50KHZ-80KHZ, and the oscillation time is 35-40 min.
In the preferred embodiment of the invention, the second ultrasonic wave is 20KHZ-45KHZ, and the oscillation time is 12-15 min.
In the invention, the steps of pre-cleaning/texturing/diffusion/plasma etching/post-cleaning/plasma vapor deposition/screen printing/sintering/detection are as follows:
removing a damaged layer: and removing a damaged layer on the surface of the silicon wafer in the cutting process of the silicon wafer. First, the oil is initially removed with an organic solvent (e.g., toluene, etc.), the remaining organic and inorganic impurities are removed with a cleaning agent, and each cleaning solution is rinsed clean with deionized water. Then, surface etching is performed to remove about 10 μm of each side in an etching solution, which serves to remove mechanical damage to the sliced surface, exposing a lattice-completed silicon surface.
Texturing a silicon wafer: a suede structure is formed on the surface of the crystal silicon wafer, and the fine, uniform and clean surface texture is ensured. After the textured surface is etched, general chemical cleaning is performed. The silicon wafers after texturing are not suitable for long-term storage in water to prevent contamination and should be diffused and sintered as soon as possible.
Diffusion: and forming a uniform p-n junction on the surface of the silicon wafer. The impurity element enters the matrix at high temperature (800-. The requirements for diffusion are to obtain a junction depth and diffusion layer sheet resistance suitable for the solar cell p-n junction requirements.
Plasma etching: the front surface and the back surface of the battery after the diffusion are both provided with p-n junctions, the p-n junctions at the edges are removed, and the p-n junctions at the edges are removed by adopting a plasma etching method.
Removing phosphorus silicon glass: and removing the phosphorosilicate glass formed in the diffusion process on the surface of the silicon wafer. HF is generally used.
Depositing an antireflection film: and an effective passivated, compact and uniform silicon nitride antireflection film is obtained by a PECVD method.
Preparing an optical antireflection film and passivating the surface: the surface passivation of the semiconductor device can effectively reduce the surface density of the device and improve the stability and reliability of the device. If the surface of the emitter region or the base region of the silicon solar cell is passivated, the surface recombination of the emitter region and the base region can be effectively reduced, the open-circuit voltage of the solar cell is improved, and the photoelectric conversion efficiency of the solar cell can be improved. The optical antireflection on the light-facing surface of the solar cell can effectively improve the light absorption of the solar cell, so that the gain of the short-circuit current of the cell is increased.
Screen printing and sintering: and (2) preparing an electrode of the solar cell with the prepared antireflection film by adopting screen printing, printing a silver paste or silver-aluminum paste back electrode on the back surface of the cell, drying, printing a back electric field on the aluminum paste, drying again, printing a silver paste front electrode on the front surface of the cell, and finally sintering, wherein the sintering temperature is controlled to be about 800-.
The above steps can adopt the prior art.
The invention has the following advantages:
1) treatment in the texturing process: the thickness of the silicon chip consumed for cleaning and texturing to remove the damage layer and manufacturing the textured surface before normal operation is 10 microns. And simultaneously, sodium acetate with the mass volume ratio of 2-8% is added into the texturing solution to slow down the reaction rate, so that the texture is small and uniform.
2) After the diffusion step, an annealing process is added to remove the internal stress (the diffusion temperature is generally 830 ℃) caused by the high diffusion temperature of the ultrathin silicon wafer for 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing.
3) After the sintering process, an annealing process is added to remove the internal stress generated during sintering, the sintering temperature is generally 800 ℃, the time is 10-15min, the temperature is 120-.
4) The oscillation is increased for the first time, so that the internal stress after the plasma etching is reduced;
5) the oscillation is increased for the second time, so that the influence of high-temperature gas deposition in a PECVD link on the internal stress of the ultrathin silicon wafer is reduced;
compared with the commonly used 200 micron (+/-20 micron) silicon chip rate, the silicon chip rate prepared by adopting the scheme of the invention has no increase, and the cost of the silicon chip is greatly reduced because the silicon chip is thinned by about 1/4-1/3.
Detailed Description
Example 1
The method comprises the following steps of adopting a 130-micron silicon wafer, pre-cleaning, texturing, diffusing, annealing after diffusing, plasma etching, first ultrasonic oscillation, post-cleaning, plasma vapor deposition, second ultrasonic oscillation, screen printing, sintering, annealing after sintering and detecting.
Wherein,
1) treatment in the texturing process: piling two silicon wafers together for wool making, and simultaneously adding sodium acetate with the mass volume ratio of 2-8% into a wool making solution;
2) the annealing time after diffusion is 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing;
3) performing ultrasonic oscillation for 50KHZ for 40 min;
4) the annealing time after sintering is 10-15min, the temperature is 120-250 ℃, and the negative pressure argon filling protection is carried out during the annealing;
5) the second ultrasonic oscillation is 45KHZ for 12 min.
The fragmentation rate of the whole process is about 1 percent.
Example 2
The method comprises the following steps of adopting a 140-micron silicon wafer, cleaning, texturing, diffusing, annealing after diffusing, plasma etching, first ultrasonic oscillation, cleaning after diffusing, plasma vapor deposition, second ultrasonic oscillation, screen printing, sintering, annealing after sintering and detecting.
Wherein,
1) treatment in the texturing process: piling two silicon wafers together for wool making, and simultaneously adding sodium acetate with the mass volume ratio of 2-8% into a wool making solution;
2) the annealing time after diffusion is 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing;
3) oscillating for 35min at 80KHZ with primary ultrasonic oscillation wave;
4) the annealing time after sintering is 10-15min, the temperature is 120-250 ℃, and the negative pressure argon filling protection is carried out during the annealing;
5) and performing ultrasonic oscillation for a second time for 15min at 20 KHZ.
The fragmentation rate of the whole process is about 1 percent.
Example 3
Adopting a 150 micron silicon wafer, pre-cleaning, texturing, diffusing, annealing after diffusing, plasma etching, first ultrasonic oscillation, post-cleaning, plasma vapor deposition, second ultrasonic oscillation, screen printing, sintering, annealing after sintering and detecting, wherein,
1) treatment in the texturing process: piling two silicon wafers together for wool making, and simultaneously adding sodium acetate with the mass volume ratio of 2-8% into a wool making solution;
2) the annealing time after diffusion is 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing;
3) performing ultrasonic oscillation at 70KHZ for 30 min;
4) the annealing time after sintering is 10-15min, the temperature is 120-250 ℃, and the negative pressure argon filling protection is carried out during the annealing;
5) the second ultrasonic oscillation is carried out for 15min at 40 KHZ.
The fragmentation rate of the whole process is about 1 percent.

Claims (3)

1. A method for preparing an ultrathin polycrystalline silicon solar cell slice adopts a 130 +/-20 micron silicon slice and comprises the following steps
Preparation:
pre-cleaning, texturing, diffusing, annealing after diffusing, plasma etching, first ultrasonic oscillation, post-cleaning, plasma vapor deposition, second ultrasonic oscillation, screen printing, sintering, annealing after sintering and detection, wherein,
1) treatment in the texturing process: piling two silicon wafers together for wool making, and simultaneously adding sodium acetate with the mass volume ratio of 2-8% into a wool making solution;
2) the annealing time after diffusion is 15-20min, the temperature is 320-450 ℃, and argon is filled for protection during annealing;
3) oscillating for 30-50min with primary ultrasonic frequency of 20-150 KHZ;
4) the annealing time after sintering is 10-15min, the temperature is 120-250 ℃, and the negative pressure argon filling protection is carried out during the annealing;
5) the second ultrasonic wave is 20KHZ-100KHZ, and the oscillation is carried out for 10-20 min.
2. The method for preparing an ultrathin polysilicon solar cell piece as claimed in claim 1: the method is characterized in that: the first ultrasonic wave is 50KHZ-80KHZ, and the oscillation is carried out for 35-40 min.
3. The method for preparing the ultrathin polysilicon solar cell as claimed in claim 1, wherein the method comprises the following steps: the second ultrasonic wave is 20KHZ-45KHZ, and the oscillation is carried out for 12-15 min.
CN201510627213.1A 2015-09-28 2015-09-28 Preparation method of ultrathin polysilicon solar cell sheet Pending CN105470345A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107093648A (en) * 2017-03-22 2017-08-25 横店集团东磁股份有限公司 A kind of diffusion annealing and dry etching method applied to solar cell
CN107338480A (en) * 2017-08-24 2017-11-10 嘉兴尚能光伏材料科技有限公司 A kind of monocrystalline silicon silicon wafer fine hair making method and its flocking additive
CN108400182A (en) * 2018-05-03 2018-08-14 苏州阿特斯阳光电力科技有限公司 Silicon chip single side prepares the equipment of nanometer suede and the production equipment of solar battery sheet
CN114256380A (en) * 2020-09-21 2022-03-29 比亚迪股份有限公司 Preparation method of solar cell and solar cell

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103290482A (en) * 2013-01-06 2013-09-11 河北同光晶体有限公司 Method for removing stress of silicon carbide crystal with large diameter
CN103774239A (en) * 2013-11-13 2014-05-07 河南科技学院 Cleaning and wool making technology for monocrystal silicon chip
CN103972325A (en) * 2013-11-13 2014-08-06 睿纳能源科技(上海)有限公司 Single-surface texturing method for single-crystal silicon wafers
CN104538500A (en) * 2015-01-06 2015-04-22 横店集团东磁股份有限公司 PECVD coating and sintering process for protecting crystalline silicon solar cell against LID and PID

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103290482A (en) * 2013-01-06 2013-09-11 河北同光晶体有限公司 Method for removing stress of silicon carbide crystal with large diameter
CN103774239A (en) * 2013-11-13 2014-05-07 河南科技学院 Cleaning and wool making technology for monocrystal silicon chip
CN103972325A (en) * 2013-11-13 2014-08-06 睿纳能源科技(上海)有限公司 Single-surface texturing method for single-crystal silicon wafers
CN104538500A (en) * 2015-01-06 2015-04-22 横店集团东磁股份有限公司 PECVD coating and sintering process for protecting crystalline silicon solar cell against LID and PID

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107093648A (en) * 2017-03-22 2017-08-25 横店集团东磁股份有限公司 A kind of diffusion annealing and dry etching method applied to solar cell
CN107338480A (en) * 2017-08-24 2017-11-10 嘉兴尚能光伏材料科技有限公司 A kind of monocrystalline silicon silicon wafer fine hair making method and its flocking additive
CN108400182A (en) * 2018-05-03 2018-08-14 苏州阿特斯阳光电力科技有限公司 Silicon chip single side prepares the equipment of nanometer suede and the production equipment of solar battery sheet
CN114256380A (en) * 2020-09-21 2022-03-29 比亚迪股份有限公司 Preparation method of solar cell and solar cell

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Application publication date: 20160406