Present application was enjoyed with No. 2014-188528 (applying date of Japanese patent application case:On September 17th, 2014) as base
The priority of plinth application case.Present application includes all the elements of basic application case by referring to the basis application case.
Specific embodiment
Hereinafter, the semiconductor manufacturing apparatus of embodiment is illustrated with reference to attached drawing.
(first embodiment)
Fig. 1 is to represent the semiconductor manufacturing apparatus of first embodiment and cuing open using its interelectrode Connection Step
View.Semiconductor manufacturing apparatus 1 shown in FIG. 1, which has the bonding head 2 of the first connected part of absorption and loads second, to be connected
The platform 3 of pipe fitting.Bonding head 2 includes:Collet 5 is adsorbed, is abutted with as the semiconductor chip 4 of the first connected part;
And collet retainer 6, keep absorption collet 5.Adsorbing collet 5 and collet retainer 6 has through hole (not shown) (suction
Hole), it is aspirated via these through holes, thus semiconductor chip 4 is adsorbed onto absorption collet 5.
Bonding head 2 has to adsorb semiconductor chip 4 into the aspirating mechanism (non-schema) for remaining to absorption collet 5.Into
And bonding head 2 includes the heating cooling body (non-schema) that semiconductor chip 4 is heated and cooled down according to Connection Step.
Bonding head 2 can be moved using driving mechanism (not shown) on XYZ θ directions.Platform 3 includes:Adsorbing mechanism (non-schema) is inhaled
The second connected part 7 of attached holding;And heating cooling body (non-schema), according to Connection Step to second connected part 7
It is heated and is cooled down.Platform 3 can be moved using driving mechanism (not shown) on XY directions.Heating cooling body can also only be set
It puts in one of bonding head 2 and platform 3.
In Fig. 1, the first connected part of bonding head 2 is adsorbed onto as the first semiconductor chip 4, first semiconductor
Chip 4 has:First salient pole 42 is arranged on upper surface (circuit face/first surface) 41a sides of chip body 41;It passes through
Energization pole (Through Silicon Via:TSV) 43, it is set in a manner of penetrating through chip body 41, with the first salient pole
42 electrical connections;And second salient pole 44, lower surface (non-electrical road surface/second surface) 41b sides of chip body 41 are arranged on,
It is electrically connected with through electrode 43.The second connected part being placed on platform 3 is the second semiconductor chip 7, described the second half
Conductor chip 7 has the third salient pole 72 of upper surface (circuit face/first surface) the 71a sides for being arranged on chip body 71.
Second connected part is not limited to semiconductor chip, can also be wiring board with connection electrode etc..
As shown in Fig. 2, in the upper surface 41a sides of the first semiconductor chip 4, set multiple convex block forming region X1~
X5.In multiple convex block forming region X1~X5, the first salient pole 42 is respectively configured.First salient pole 42 is respectively configured
In the multiple convex block forming region X1~X5 partly set in the upper surface 41a relative to the first semiconductor chip 4.Second is convex
Block electrode 44 is connect via through electrode 43 with the first salient pole 42.In the lower surface 41b sides of the first semiconductor chip 4,
In position corresponding with convex block forming region X1~X5 of upper surface 41a sides, it is also provided with convex block forming region.In semiconductor core
In multiple convex block forming regions of the lower surface 41b of piece 4, the second salient pole 44 is respectively configured.In the second semiconductor chip 7
Upper surface 71a sides, in a manner of corresponding with the second salient pole 44, third salient pole 72 is set.
The absorption collet 5 of bonding head 2 has:First face 51 is connected to and sets the first the half of the first salient pole 42
The upper surface 41a of conductor chip 4;And second face 52, it is opposite side with the first face 51.Absorption collet 5 makes the first face (chip
Bearing surface) it 51 is connected in the state of the upper surface 41a of the first semiconductor chip 4, absorption keeps the first semiconductor chip 4.It inhales
Attached collet 5 is formed to absorb because of the concaveconvex shape on the surface that the first salient pole 42 is formed by elastomer.Adsorb collet 5
To use the elastomer collet of the rubber-like elastic bodies such as natural rubber, synthetic rubber, thermo-setting elastomer (elastomer).
Upper surface (convex block forming face) 41a for keeping the first semiconductor chip 4 is adsorbed using elastomer collet 5, is thus existed
When applying loading, the bumps formed by the first salient pole 42 are absorbed by elastomer collet 5, therefore can inhibit with the first convex block electricity
Generation of the pole 42 for the bending stress of fulcrum.As shown in figure 3, the first face (chip bearing surface) 51 of elastomer collet 5 has:Core
Piece abuts region C, is abutted with the first semiconductor chip 4;And multiple convex blocks abut region Y1~Y5, grade with the first semiconductor
Convex block forming region X1~X5 (and convex block forming region of lower surface 41b sides) of the upper surface 41a sides of chip 4 is corresponding.
Bonding head 2 includes the collet retainer 6 for keeping elastomer collet 5.Collet retainer 6 to elastomer in order to pressing from both sides
First 5 transmit loading well, and are formed by rigid body.Collet retainer 6 is use just like gold such as various steel, stainless steel, aluminium, titaniums
Belong to the rigid body collet retainer of the body material of material or ceramic material.Rigid body collet retainer 6 has embedding for elastomer collet 5
The recess portion 61 entered.It is embedded in the elastomer collet 5 in the recess portion 61 of collet retainer 6, with the first face (chip bearing surface) 51
The second face 52 for opposite side connects with rigid body collet retainer 6.
To using the first semiconductor chip 4 of semiconductor manufacturing apparatus shown in FIG. 1 and the company of the second semiconductor chip 7
Step is connect to illustrate.As shown in Fig. 1 (a), the second semiconductor chip 7 is loaded on platen 3.Second semiconductor chip 7 adsorbs
It is maintained at platform 3.It is adsorbed using bonding head 2 and keeps the first semiconductor chip 4.44 position alignment of the second salient pole is arrived on one side
Third salient pole 72 makes the first semiconductor chip 4 that absorption is maintained at bonding head 2 be moved to and be placed on platform 3 on one side
On second semiconductor chip 7.
Decline bonding head 2 as shown in Fig. 1 (b), such as using driving mechanism, thus make on one side the second salient pole 44 with
Third salient pole 72 contacts, and makes 4 lamination of the first semiconductor chip being moved on the second semiconductor chip 7 on one side to the second half
On conductor chip 7.Be heated on one side more than the connection temperature of salient pole 44,72 temperature or one side to salient pole 44,
72 apply ultrasonic, apply loading to the first semiconductor chip 4 using driving mechanism on one side and are crimped onto the second semiconductor chip
7.Using this crimping step, the second salient pole 44 with third salient pole 72 is connect and forms convex block connector 8.
As the formation material of salient pole 44,72, it can enumerate and be added to what Cu, Ag, Bi, In etc. were formed included in Sn
The metal materials such as the welding material or Cu, Ni, Au, Ag, Pd, Sn of Sn alloys.As the specific of welding material (no Pb welding)
Example, can enumerate Sn-Cu alloys, Sn-Ag alloys, Sn-Ag-Cu alloys etc..Metal material is not limited to monofilm, can also be
The laminated film of multiple metal films such as Cu/Ni, Cu/Ni/Cu, Cu/Ni/Au, Ni/Au, Cu/Au.And then metal material can also be packet
Alloy containing metal as described above.As the combination of the second salient pole 44 and third salient pole 72, welding/weldering is illustrated
Connect, metal/welding, welding/metal, metal/metal etc..Moreover, about the second salient pole 44 and third salient pole 72
The shape for lugs such as hemispherical or column combination with one another or shape for lugs and the group of the even shape such as weld pad can be used in shape
It closes.
, it is preferable to use welding material at least one of the second salient pole 44 and third salient pole 72.Consider
Bonding head 2, preferably in the lower surface 41b sides of the first semiconductor chip 4, forms packet to adsorptivity of the first semiconductor chip 4 etc.
The salient pole 44 of the welding materials such as alloy containing Sn-Cu, Sn-Ag-Cu alloys, in the upper surface 71a of the second semiconductor chip 7
Side forms the salient pole 14 for including the metal materials such as Cu/Ni/Cu, Cu/Ni/Au, Ni/Au.In the case, comprising welding
The salient pole 44 of material is preferably set to shape for lugs, and the salient pole 72 comprising metal material is preferably set to even shape.Institute
The connection temperature for calling salient pole 44,72 is the institute in the case where forming salient pole 44, at least one of 72 using welding
The temperature more than fusing point of the welding used.
The first salient pole 42 for being arranged on the upper surface 41a sides of the first semiconductor chip 4 is further the first half
On conductor chip 4 during other semiconductor chips of lamination, the salient pole that is functioned as connection electrode.Herein, in product
The first semiconductor chip 4 of layer and during the second semiconductor chip 7, the feelings that the second salient pole 44 is connect with third salient pole 72
Condition is described, but further by semiconductor chip lamination in the case of multistage, can also will be interim between salient pole 44,72
It is fixed, after all semiconductor chips of lamination, carry out Reflow Soldering or thermo-compression bonding and will formally be connected between salient pole.
When the first semiconductor chip 4 is crimped onto the second semiconductor chip 7, led via elastomer collet 5 to the first half
Body chip 4 adds loading.First face 51 of elastomer collet 5 is in the state for being trapped in the first salient pole 42.In this state
Under, if elastomer collet 5 and rigid body collet retainer 6 are respectively with plane contact, load dispersing to the first salient pole 42
Forming region around.It as a result, can not be fully to being arranged on and the 42 corresponding position (position of overlapping of the first salient pole
Put) the second salient pole 44 apply loading.This situation leads to the bad connection or convex as making between salient pole 42,72
The main reason for connection reliability between block electrode 42,72 reduces.
In the semiconductor manufacturing apparatus 1 of embodiment, in the contact surface of elastomer collet 5 and rigid body collet retainer 6,
The forming region of first salient pole 42 is set, and then in the forming region of the second salient pole 44, setting makes loading collection
In bumps.In the first embodiment, as shown in Figures 4 and 5, in the bottom surface 61a of the recess portion 61 of rigid body collet retainer 6,
It sets with convex block forming region X1~X5 of the first semiconductor chip 4 shown in Fig. 2 and then is pressed from both sides with elastomer shown in Fig. 3
First 5 convex block abuts the corresponding protrusion 62A~62E of region Y1~Y5.Protrusion 62A~62E of rigid body collet retainer 6 is located at half
The surface of the forming region (and forming region of the second salient pole 44) of first salient pole 42 of conductor chip 4.
Rigid body collet retainer 6 with protrusion 62A~62E relative to elastomer collet 5 the second face 52, only and protrusion
The upper surface of 62A~62E connects.Therefore, partly elastomer can be pressed from both sides from rigid body collet retainer 6 via protrusion 62A~62E
First 5 apply loading.The loading of the first semiconductor chip 4 is applied to via elastomer collet 5 corresponding with protrusion 62A~62E
Each region, i.e. convex block abut region Y1~Y5, concentrate the forming region for being attached to salient pole 42,44.It, can according to these situations
The connectivity of the second salient pole 42 and third salient pole 72 is improved, and then the connection that can be improved between salient pole 42,72 can
By property.Therefore, the chip product that the first semiconductor chip 4 and the second semiconductor chip 7 are connected under higher reliability can be produced on
Layer body.
When protrusion 62A~62E via rigid body collet retainer 6 applies loading to elastomer collet 5, protrusion 62A~
The highly preferred of 62E is set as 10 μm or more and less than 1000 μm.If the height of protrusion 62A~62E is less than 10 μm, can not make
Loading fully focuses on the forming region of salient pole 42,44.If the height of protrusion 62A~62E is passed more than 1000 μm
Passing the distance of the elastomer of loading becomes long, is thus applied to the loading of the forming region of salient pole 42,44 and reduces.No matter
In the case which kind of, all there are the worries that the connectivity between salient pole 42,72 and connection reliability reduce.Protrusion 62A~62E
Preferably consistent than with the forming region of salient pole 42, the 44 big 5mm of shape of flat shape or so shape.If make convex
The flat shape of portion 62A~62E is exceedingly more than the forming region of salient pole 42,44, then loading is for salient pole 42,44
Concentration efficiency reduce.
The layering steps of the semiconductor chip of the semiconductor manufacturing apparatus 1 of embodiment has been used to be not limited to lamination 2
The situation of a semiconductor chip 4,7.For example, as shown in fig. 6, can be on semiconductor chip 4, lamination third semiconductor chip 4A,
The 4th semiconductor chip 4B of further lamination.Semiconductor chip 4A, 4B have the structure identical with semiconductor chip 4.Partly leading
On body chip 4 in the case of lamination semiconductor chip 4A, 4B, layering steps shown in FIG. 1 are implemented in repetition.As shown in fig. 6, it partly leads
Body chip 4 is electrically connected and is mechanically connected with the connector 8A of salient pole 44A using salient pole 42 with semiconductor chip 4A.Into
And semiconductor chip 4A is electrically connected with semiconductor chip 4B using salient pole 42A with the connector 8B of salient pole 44B and machine
Tool connects.The lamination quantity of semiconductor chip is any amount.
(second embodiment)
Secondly, with reference to Fig. 7 to Fig. 9, the semiconductor manufacturing apparatus of second embodiment is illustrated.Fig. 7 is to represent
The semiconductor manufacturing apparatus of two embodiments and the sectional view using its interelectrode Connection Step.Semiconductor shown in Fig. 7
Manufacturing device 21 has the elastomer collet 5 with protrusion to replace the rigid body with protrusion 62A~62E of first embodiment
Collet retainer 6.Additionally, there are following situations:Phase is indicated to the part identical with first embodiment of second embodiment
Same symbol, omits the part in the explanation of these parts.
In the semiconductor manufacturing apparatus 21 of second embodiment, rigid body collet retainer 6 has embedding for elastomer collet 5
The recess portion 61 entered.The bottom surface 61a of recess portion 61 is set as plane.On the other hand, as can be seen from figures 8 and 9, the of elastomer collet 5
Two faces 52, set with convex block forming region X1~X5 of the first semiconductor chip 4 shown in Fig. 2 so that with the second face 51
Convex block abuts the corresponding protrusion 53A~53E of region Y1~Y5.Protrusion 53A~53E of elastomer collet 5 is located at semiconductor chip 4
The first salient pole 42 forming region (and forming region of the second salient pole 44) surface.
Elastomer collet 5 with protrusion 53A~53E relative to the recess portion 61 of rigid body collet retainer 6 bottom surface 61a,
Only connect with the upper surface of protrusion 53A~53E.Therefore, can from rigid body collet retainer 6 via protrusion 53A~53E locally
Loading is applied to elastomer collet 5.The loading of the first semiconductor chip 4 is applied to via elasticity corresponding with protrusion 53A~53E
Each region of body collet 5, i.e. convex block abut region Y1~Y5, concentrate the forming region for being attached to salient pole 42,44.According to this
A little situations, can improve the connectivity of the second salient pole 42 and third salient pole 72, and then can improve between salient pole 42,72
Connection reliability.Therefore, it can be produced under higher reliability and connect the first semiconductor chip 4 and the second semiconductor chip 7
Chip laminate.
As described above, the bumps of forming region that loading focuses on salient pole 42,44 is made to can also be formed in elastomer folder
First 5 face 52 to connect with rigid body collet retainer 6 and the face 61a to connect with elastomer collet 5 of rigid body collet retainer 6
In any one face.Moreover, it according to circumstances, can also be set in two sides of elastomer collet 5 and rigid body collet retainer 6 concave-convex.
However, if it is considered that the ease or processing cost of processing when forming the protrusion for concentrating loading, and are considered as consuming
Replacement frequency of elastomer collet 5 of product etc., then preferably in the face 61a to connect with elastomer collet 5 of rigid body collet retainer 6
Form protrusion 62A~62E.
In addition, several embodiments of the invention are described, but these embodiments are prompted as example,
It is not intended to limit the range invented.These embodiments can be implemented in various other forms, can be in the purport for not departing from invention
In the range of carry out it is various omit, displacement, change.These embodiments and its variation are included in the range or purport of invention,
Simultaneously in the invention recorded in claims and its range of equalization.
[explanation of symbol]
1 semiconductor manufacturing apparatus
2 bonding heads
3 platforms
4th, 7 semiconductor chip
41 chip bodies
42nd, 44,72 salient pole
43 through electrodes
5 elastomer collets
53 protrusions
6 rigid body collet retainers
61 recess portions
62 protrusions
8 convex block connectors