CN105374899A - Surface passivation technology of crystalline silicon solar cell - Google Patents
Surface passivation technology of crystalline silicon solar cell Download PDFInfo
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- CN105374899A CN105374899A CN201510662345.8A CN201510662345A CN105374899A CN 105374899 A CN105374899 A CN 105374899A CN 201510662345 A CN201510662345 A CN 201510662345A CN 105374899 A CN105374899 A CN 105374899A
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- 238000005516 engineering process Methods 0.000 title claims abstract description 49
- 238000002161 passivation Methods 0.000 title claims abstract description 30
- 229910021419 crystalline silicon Inorganic materials 0.000 title claims abstract description 8
- 238000000034 method Methods 0.000 claims abstract description 73
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 50
- 230000008569 process Effects 0.000 claims abstract description 50
- 230000003647 oxidation Effects 0.000 claims abstract description 43
- 238000009792 diffusion process Methods 0.000 claims abstract description 32
- 230000001590 oxidative effect Effects 0.000 claims abstract description 28
- 239000012535 impurity Substances 0.000 claims abstract description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 20
- 229910052710 silicon Inorganic materials 0.000 claims description 20
- 239000010703 silicon Substances 0.000 claims description 20
- 239000013078 crystal Substances 0.000 claims description 16
- 238000010301 surface-oxidation reaction Methods 0.000 claims description 8
- 238000004140 cleaning Methods 0.000 claims description 7
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 7
- 238000001039 wet etching Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 230000008859 change Effects 0.000 claims description 2
- 239000002019 doping agent Substances 0.000 claims description 2
- 125000004437 phosphorous atom Chemical group 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 abstract description 7
- 230000006866 deterioration Effects 0.000 abstract description 2
- 241001387976 Pera Species 0.000 abstract 1
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 229910004205 SiNX Inorganic materials 0.000 description 12
- 229910004304 SiNy Inorganic materials 0.000 description 9
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 9
- 238000012360 testing method Methods 0.000 description 7
- 229910020286 SiOxNy Inorganic materials 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 238000007650 screen-printing Methods 0.000 description 4
- 239000002253 acid Substances 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000010276 construction Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 235000008216 herbs Nutrition 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- 210000002268 wool Anatomy 0.000 description 3
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 2
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 2
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical compound ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a surface passivation technology of a crystalline silicon solar cell. The surface passivation technology specifically comprises the following two processes: (a) a low-temperature surface thermal oxidation process and (b) a surface oxidizing and doping process, wherein in the low-temperature surface thermal oxidation process, the oxidation temperature is controlled under 800 DEG C on the premise that excellent surface passivation quality is ensured, a dead layer formed in a diffusion process is activated, and good matching with an emitter junction diffusion process is achieved; and in the surface oxidizing and doping process, impurity doping is simultaneously carried out in an oxidizing process, and doped impurities are identical with emitter junctions in conductive type. The surface passivation technology of the crystalline silicon solar cell has the advantages that the conversion efficiency of the cell is improved, and the assembly packaging loss is effectively lowered; in addition, the oxidizing process can be applied in the case that the square resistance of the emitter junctions is higher than 100 [omega], and the FF deterioration problem of the PERA cell is solved.
Description
Technical field
The present invention relates to crystal silicon solar energy battery and manufacture correlative technology field, refer in particular to a kind of surface passivation technology of crystal silicon solar energy battery.
Background technology
SiO
2film can effective passivation interface state, is the ideal material of surface passivation; The PERL battery that the efficiency that University of New South Wales proposes reaches 25.0% is exactly based on SiO
2the Typical Representative of surface passivation.But because thermal oxidation process needs the high temperature of 1000 DEG C, and oxidization time is long, cause it to fail to be applied on a large scale in photovoltaic industry always.For this reason, people start to adopt the wet oxidation process that can carry out at a lower temperature, but passivation effect also declines thereupon.Therefore, developing a kind of thermal oxidation technology that can carry out at low temperatures, is the key realizing its industrialization.
The Industry Promotion of thermal oxidation technology, needs to overcome following problem: reduce oxidizing temperature and time, thus reduces energy consumption and improve production capacity; Reduce oxidizing process to the impact of emitter junction doping curve, overcoming the declines contact resistance that causes of surface concentration increases, thus the improvement of guarantee battery FF.
Summary of the invention
There is above-mentioned deficiency to overcome in prior art in the present invention, provides a kind of surface passivation technology improving the crystal silicon solar energy battery of battery conversion efficiency and decremental component encapsulation loss.
To achieve these goals, the present invention is by the following technical solutions:
A surface passivation technology for crystal silicon solar energy battery, specifically comprises following two techniques:
A () low-temperature surface thermal oxidation technology: under the prerequisite ensureing excellent surface passivation quality, oxidizing temperature controlled below 800 DEG C, activates " dead layer " that formed in diffusion process, reaches the matched well with emitter junction diffusion technology;
B () surface oxidation doping process: in oxidizing process, carries out impurity doping simultaneously, impurity conduction type is identical with emitter junction.
The low-temperature surface thermal oxidation technology that the present invention proposes, overcome the impact of conventional high temperature oxidation technology on emitter junction doping curve, not only increase battery Voc and Isc, and, by the effective adjustment to emitter junction diffusion technology, make it to mate with oxidation technology, overcome the decline FF that causes of surface concentration and worsen, realize the raising of battery conversion efficiency more than 0.2%; On this basis, the present invention has further developed surface oxidation doping process, by the Effective Doping in oxidizing process, improve the impurity concentration of battery surface, effective reduction metal/semiconductor contact resistance, improves battery FF, realizes the raising of battery conversion efficiency more than 0.4%; Present invention optimizes battery to the electricity of assembly and optical match, reduce component package loss, ensure that the raising of battery efficiency is embodied completely in component power; Therefore, present invention incorporates the double effects of battery-end and assembly end, effectively improve component power.
As preferably, described low-temperature surface thermal oxidation technology, implements after the secondary cleaning technique of specifically producing at conventional crystalline silicon solar cell, specifically comprises the steps:
(1) emitter junction diffusion technology: carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance controls at 60 Ω/-90 Ω/, and surface concentration controls 10
20-10
22atom/cm
3, junction depth controls at 300-600nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
(2) thermal oxidation technology: be oxidized in high temperature furnace, adjustment oxidate temperature and time, is ensureing, under the prerequisite that surface oxide layer passivation needs, to activate phosphorus atoms, remove " dead layer "; After oxidation, sheet resistance controls at 60 Ω/-100 Ω/, and surface concentration controls 10
20-5*10
21atom/cm
3, junction depth controls at 350nm-750nm.
Differently from conventional thermal oxidation technique to be, this low-temperature surface thermal oxidation technology is under the prerequisite ensureing excellent surface passivation quality, oxidizing temperature is controlled below 800 DEG C, reduce energy consumption to the full extent, decrease the damage that pyroprocess may cause silicon chip simultaneously; In addition, lower temperature is conducive to the control to doping curve and emitter junction sheet resistance, activates " dead layer " that formed in diffusion process, reaches the matched well with emitter junction diffusion technology, effectively inhibit the decline of battery FF.
As preferably, in step (1), emitter junction diffusion technology takes constant temperature technique or alternating temperature technique.
As preferably, in step (2), the oxidation temperature range of required adjustment is 650 DEG C-800 DEG C, and thermal oxidation time scope is 10min-60min.
As preferably, described surface oxidation doping process, implements after the secondary cleaning technique of specifically producing at conventional crystalline silicon solar cell, controls, specifically comprise the steps: while formation surface oxide layer to oxide layer impurity concentration
(1) emitter junction diffusion technology: carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance controls at 80 Ω/-120 Ω/, and surface concentration controls 10
19-10
21atom/cm
3, junction depth controls at 200-500nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
(2) Oxidation Doping technique: comprise oxidizing process and doping process, wherein oxidizing process refers to and to be oxidized in high temperature furnace, and after oxidation, surface concentration controls 10
19-10
21atom/cm
3, junction depth controls at 300nm-600nm; Doping process refers to the change according to surface impurity concentration, carries out the doping of oxide layer impurity, and it is identical with emitter junction to mix impurity conduction type.
Differently from conventional thermal oxidation technique to be, the surface oxidation doping process that the present invention takes is in oxidizing process, carry out impurity doping simultaneously, impurity conduction type is identical with emitter junction, effective raising surface concentration, reduce contact resistance, improve battery FF, oxidation technology can be applied in the occasion of emitter junction sheet resistance up to 100 Ω/more than.
As preferably, in step (1), emitter junction diffusion technology takes constant temperature technique or alternating temperature technique.Wherein: the temperature in doping process can be identical with the temperature in oxidizing process, also can carry out alternating temperature doping.
As preferably, in step (2), in described oxidizing process, the temperature range of oxidation is 600 DEG C-900 DEG C, and the time range of oxidation is 10min-60min.
As preferably, in step (2), described doping process and oxidizing process are carried out continuously, and impurity passes in oxidizing process.
Preferred as another kind, in step (2), described doping process is carried out after oxidizing process terminates, and namely after oxide layer surface-coated impurity source, carries out high temperature dopant.
As preferably, in described doping process, the temperature range of doping is 600 DEG C-900 DEG C, and the time range of doping is within 10min; After described doping process completes, surface concentration controls 10
20-10
22atom/cm
3.
The invention has the beneficial effects as follows: the conversion efficiency not only increasing battery, and effectively reduce component package loss; The surface oxidation doping process developed on this basis, makes oxidation technology can be applied in the occasion of emitter junction sheet resistance up to 100 Ω/more than, meets the needs of surface passivation and silk screen printing simultaneously; Also can be applicable to the surface passivation of efficient PERC technology, thus solve the problem of PERC battery FF deterioration.
Embodiment
Below in conjunction with embodiment, the present invention will be further described.
Embodiment 1:
1, silicon chip is at alkalescence (NaOH or KOH) or acid solution (HF+HNO
3) in after making herbs into wool, cleaning, dry, matte size is within 5um;
2, carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance is 80 Ω/, surface concentration 6*10
20atom/cm
3, junction depth 300nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
3, be oxidized in high temperature furnace, temperature 750 DEG C, oxidization time 15min, after oxidation, surface concentration 1.5*10
20atom/cm
3, junction depth 400nm;
4, carry out front anti-reflection layer deposition, adopt PECVD (to pass into SiH
4, NH
3and N
2o) on emitter region, deposit SiNx/SiNy (or laminated construction of SiOx/SiNx/SiNy or SiNx/SiNy/SiOxNy or SiOx, SiNx and SiOxNy three), thickness is 70-85nm, and refractive index is 1.9-2.2;
5, after carrying on the back silver, back of the body aluminium and positive screen printing silver and sintering, testing, sorting is carried out;
6, component package, carries out component power test.
Embodiment 2:
3rd step in embodiment 1, oxidizing temperature 700 DEG C, oxidization time 15min, after oxidation, surface concentration 2*10
20atom/cm
3, junction depth 380nm, other techniques are identical with embodiment 1.
Embodiment 3:
2nd step in embodiment 1, diffused sheet resistance is 60 Ω/, surface concentration 1.5*10
21atom/cm
3, junction depth 400nm, the 3rd step, oxidizing temperature 750 DEG C, oxidization time 15min, after oxidation, surface concentration 5*10
20atom/cm
3, junction depth 550nm, other techniques are identical with embodiment 1.
Embodiment 4:
1, silicon chip is at alkalescence (NaOH or KOH) or acid solution (HF+HNO
3) in after making herbs into wool, cleaning, dry, matte size is within 5um;
2, carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance is 80 Ω/, surface concentration 6*10
20atom/cm
3, junction depth 300nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
3, be oxidized in high temperature furnace, temperature 750 DEG C, oxidization time 15min, after oxidation, surface concentration 1.5*10
20atom/cm
3, junction depth 400nm; Pass into POCl
3, carry out the doping of oxide layer impurity, the time is 300s, after doping, and surface concentration 5*10
20atom/cm
3;
4, carry out front anti-reflection layer deposition, adopt PECVD (to pass into SiH
4, NH
3and N
2o) on emitter region, deposit SiNx/SiNy (or laminated construction of SiOx/SiNx/SiNy or SiNx/SiNy/SiOxNy or SiOx, SiNx and SiOxNy three), thickness is 70-85nm, and refractive index is 1.9-2.2;
5, after carrying on the back silver, back of the body aluminium and positive screen printing silver and sintering, testing, sorting is carried out;
6, component package, carries out component power test.
Embodiment 5:
2nd step in embodiment 4, diffused sheet resistance is 100 Ω/, surface concentration 3*10
20atom/cm
3, junction depth 200nm, the 3rd step, temperature 750 DEG C, oxidization time 15min, after oxidation, surface concentration 9*10
19atom/cm
3, junction depth 300nm; In pipe, temperature rises to 800 DEG C, passes into POCl
3, carry out the doping of oxide layer impurity, the time is 300s, after doping, and surface concentration 5*10
20atom/cm
3; Other techniques are identical with embodiment 4.
Embodiment 6:
1, silicon chip is at alkalescence (NaOH or KOH) or acid solution (HF+HNO
3) in after making herbs into wool, cleaning, dry, matte size is within 5um;
2, carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance is 100 Ω/, surface concentration 3*10
20atom/cm
3, junction depth 200nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
3, be oxidized in high temperature furnace, temperature 750 DEG C, oxidization time 15min, after oxidation, surface concentration 9*10
19atom/cm
3, junction depth 300nm;
4, spin coating one deck liquid phase phosphorus source, oxide layer surface, after oven dry, enter in high temperature furnace and adulterate, temperature 800 DEG C, the time is 300s, after doping, surface concentration 5*10
20atom/cm
3;
5, carry out front anti-reflection layer deposition, adopt PECVD (to pass into SiH
4, NH
3and N
2o) on emitter region, deposit SiNx/SiNy (or laminated construction of SiOx/SiNx/SiNy or SiNx/SiNy/SiOxNy or SiOx, SiNx and SiOxNy three), thickness is 70-85nm, and refractive index is 1.9-2.2;
6, after carrying on the back silver, back of the body aluminium and positive screen printing silver and sintering, testing, sorting is carried out;
7, component package, carries out component power test.
Comparative example:
Conventional crystalline silicon cell technique, namely without thermal oxidation or Oxidation Doping process, emitter junction diffused sheet resistance is 80 Ω/.
Embodiment and the concrete test result of comparative example as shown in table 1.Described cell piece can be single crystal battery sheet or polycrystalline cell piece, described assembly can be monocrystalline silicon battery assembly or polycrystal silicon cell assembly, wherein Voc is battery open circuit voltage, Isc is battery short circuit electric current, FF is battery fill factor, curve factor, Eff is cell conversion efficiency, and CTM is component package loss.
Table 1 embodiment and comparative example battery performance contrast
| Technique | Voc(mV) | Isc(A) | FF(％) | Eff(％) | CTM(％) |
| Comparative example | 642.55 | 9.44 | 79.00 | 19.73 | 4.2 |
| Embodiment 1 | 646.12 | 9.58 | 78.47 | 20.00 | 3.8 |
| Embodiment 2 | 644.32 | 9.54 | 79.05 | 20.01 | 3.5 |
| Embodiment 3 | 644.30 | 9.48 | 79.12 | 19.90 | 3.3 |
| Embodiment 4 | 645.82 | 9.56 | 79.08 | 20.11 | 3.6 |
| Embodiment 5 | 645.96 | 9.59 | 79.19 | 20.20 | 3.6 |
| Embodiment 6 | 646.52 | 9.59 | 79.27 | 20.24 | 3.6 |
From embodiment 1,2,3 and comparative example battery performance relatively, after carrying out the process of low-temperature surface thermal oxidation technology, battery Voc and Isc all significantly improves, and can improve FF with further coupling of emitter junction diffusion technology simultaneously, conversion efficiency improves more than 0.2%, and component package loss effectively reduces; From embodiment 4,5,6 and comparative example relatively, carry out surface oxidation doping process, while improving Voc and Isc, can reduce series resistance, improve FF, the application of coupling high square resistance, battery efficiency can improve more than 0.4%.
Claims (10)
1. a surface passivation technology for crystal silicon solar energy battery, is characterized in that, specifically comprises following two techniques:
A () low-temperature surface thermal oxidation technology: under the prerequisite ensureing excellent surface passivation quality, oxidizing temperature controlled below 800 DEG C, activates " dead layer " that formed in diffusion process, reaches the matched well with emitter junction diffusion technology;
B () surface oxidation doping process: in oxidizing process, carries out impurity doping simultaneously, impurity conduction type is identical with emitter junction.
2. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 1, it is characterized in that, described low-temperature surface thermal oxidation technology, specifically implements, specifically comprises the steps: after the secondary cleaning technique of conventional crystalline silicon solar cell production
(1) emitter junction diffusion technology: carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance controls at 60 Ω/-90 Ω/, and surface concentration controls 10
20-10
22atom/cm
3, junction depth controls at 300-600nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
(2) thermal oxidation technology: be oxidized in high temperature furnace, adjustment oxidate temperature and time, is ensureing, under the prerequisite that surface oxide layer passivation needs, to activate phosphorus atoms, remove " dead layer "; After oxidation, sheet resistance controls at 60 Ω/-100 Ω/, and surface concentration controls 10
20-5*10
21atom/cm
3, junction depth controls at 350nm-750nm.
3. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 2, is characterized in that, in step (1), emitter junction diffusion technology takes constant temperature technique or alternating temperature technique.
4. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 2, is characterized in that, in step (2), the oxidation temperature range of required adjustment is 650 DEG C-800 DEG C, and thermal oxidation time scope is 10min-60min.
5. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 1, it is characterized in that, described surface oxidation doping process, specifically implement after the secondary cleaning technique of conventional crystalline silicon solar cell production, while formation surface oxide layer, oxide layer impurity concentration is controlled, specifically comprise the steps:
(1) emitter junction diffusion technology: carry out high temperature phosphorous diffusion in diffusion furnace, diffused sheet resistance controls at 80 Ω/-120 Ω/, and surface concentration controls 10
19-10
21atom/cm
3, junction depth controls at 200-500nm, after forming pn knot, carries out wet etching and removes back of the body knot and PSG;
(2) Oxidation Doping technique: comprise oxidizing process and doping process, wherein oxidizing process refers to and to be oxidized in high temperature furnace, and after oxidation, surface concentration controls 10
19-10
21atom/cm
3, junction depth controls at 300nm-600nm; Doping process refers to the change according to surface impurity concentration, carries out the doping of oxide layer impurity, and it is identical with emitter junction to mix impurity conduction type.
6. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 5, is characterized in that, in step (1), emitter junction diffusion technology takes constant temperature technique or alternating temperature technique.
7. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 5, it is characterized in that, in step (2), in described oxidizing process, the temperature range of oxidation is 600 DEG C-900 DEG C, and the time range of oxidation is 10min-60min.
8. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 5, is characterized in that, in step (2), described doping process and oxidizing process are carried out continuously, and impurity passes in oxidizing process.
9. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 5, it is characterized in that, in step (2), described doping process is carried out after oxidizing process terminates, and namely after oxide layer surface-coated impurity source, carries out high temperature dopant.
10. the surface passivation technology of a kind of crystal silicon solar energy battery according to claim 8 or claim 9, it is characterized in that, in described doping process, the temperature range of doping is 600 DEG C-900 DEG C, and the time range of doping is within 10min; After described doping process completes, surface concentration controls 10
20-10
22atom/cm
3.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106653871A (en) * | 2016-11-18 | 2017-05-10 | 横店集团东磁股份有限公司 | PERC solar cell structure and preparation process thereof |
| CN108231917A (en) * | 2017-12-20 | 2018-06-29 | 横店集团东磁股份有限公司 | A kind of PERC solar cells and preparation method thereof |
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| CN106653871A (en) * | 2016-11-18 | 2017-05-10 | 横店集团东磁股份有限公司 | PERC solar cell structure and preparation process thereof |
| CN108231917A (en) * | 2017-12-20 | 2018-06-29 | 横店集团东磁股份有限公司 | A kind of PERC solar cells and preparation method thereof |
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Application publication date: 20160302 |