CN105353370A - All-digital ultrahigh frequency radar system for offshore flow detection and data processing method thereof - Google Patents
All-digital ultrahigh frequency radar system for offshore flow detection and data processing method thereof Download PDFInfo
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- CN105353370A CN105353370A CN201510824357.6A CN201510824357A CN105353370A CN 105353370 A CN105353370 A CN 105353370A CN 201510824357 A CN201510824357 A CN 201510824357A CN 105353370 A CN105353370 A CN 105353370A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/88—Radar or analogous systems specially adapted for specific applications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- Radar, Positioning & Navigation (AREA)
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- Computer Networks & Wireless Communication (AREA)
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- Radar Systems Or Details Thereof (AREA)
Abstract
The invention discloses an all-digital ultrahigh frequency radar system for offshore flow detection and a data processing method thereof. Hardware of the radar system comprises a transmitting circuit and a receiving circuit, wherein the transmitting circuit comprises a transmitting antenna, a transmitter, a digital signal source and a clock source which are sequentially connected; and the receiving circuit comprises a receiving antenna array, an analog front end, an analog-to-digital converter, an FPGA (field programmable gate array), a USB module and an upper computer which are sequentially connected. The data processing method disclosed by the invention is divided into an FPGA part and an upper computer part. The all-digital ultrahigh frequency radar system has the advantages of clear structure, simple hardware circuit, convenient installation, manpower saving, flexible configuration, simple operation and the like. The all-digital ultrahigh frequency radar system is high in measurement precision, the distance resolution reaches 10m, the flow rate resolution reaches 0.1cm/s, thereby having ultrahigh precision which cannot be reached by existing offshore flow rate measuring instruments. In addition, the maximum detection distance of the system can reach 5 kilometers that is a detection distance which is difficult to be reached by existing X-band radar.
Description
Technical field
The invention belongs to Radar Technology field, relate to UHF Doppler radar system, particularly relate to a kind of digital UHF Doppler radar system for coastal waters stream detection and data processing method thereof.
Background technology
The precision that radar can obtain finally depends on signal-to-noise ratio (SIR) or signal noise ratio (SNR), and the object of Radar Signal Processing is exactly to improve these indexs.Traditional receiver employing super heterodyne architectures employs analog multiplier and carries out demodulation to echo, because the non-linear signal that makes of semiconductor devices produces crosstalk, be apparent that most third order intermodulation, although echo signal to noise ratio (S/N ratio) can be significantly improved by pulse compression technique, but but cannot eliminate crosstalk, because analog multiplier produce distortion and nonwhite noise composition, pulse compression can think that it is a part for echoed signal itself by mistake.In order to eliminate the crosstalk that Analogue mixer is introduced, best solution is exactly in numeric field mixing, utilizes desirable digital multiplier to replace having the analog multiplier of nonlinear characteristic.This is also method used in the present invention, utilizes high-speed AD to echoed signal direct RF sampling, then realizes mixing at numeric field and obtain low frequency signal, more down-sampled after be further analyzed.The method effectively prevent the distortion that analog multiplier is introduced, and echoed signal carry information is utilized effectively.
In recent years U.S. Lao Lei industrial group is proposed ultrahigh frequency river noncontact detection system RiverSonde on the basis of its hydrospace detection radar system SeaSonde, RiverSonde frequency of operation is at 420 to 450MHz, transmitter emissive power is at 1W, maximum detectable range 300m, the highest measurable flow speed 4m/s, its receiver just have employed digital structure.Being called of Wuhan University's application: a kind of Full digital high-frequency radar installations, the patent No. are: in the patent of 201220632452.8, this device is operated in high-frequency band, the direct nyquist sampling of signal of coming is accepted to antenna, in digital signal processor, realizes down coversion; Because the sampling rate of analog to digital converter exists the upper limit, therefore the program is not suitable in ultra-wideband systems.
Detection technique at present for coastal waters stream has had significant progress, creates many new test technique automatics.Except the buoy method water surface flow velocity test of routine, the test of image method, photoelectric sensing method, acoustic Doppler flow velocity has become new means of testing all.But above several method of testing all more or less exists intrinsic defect, as the buoy mensuration of routine, surveying instrument needs directly to contact with seawater, and this promotes widely to the maintenance cost of instrument and equipment, and it can only record certain any flow velocity; And common photoelectric sensing method of testing is complicated in flow field situation, when needing test multiple spot flow velocity, need a large amount of hardware facilities, the reliability decrease of measurement result, cost also improves.
" method and radar system thereof with detecting surface flow speed of river lake using radar electric wave " (patent No.: 201220632452.8) has been invented by Wuhan University in 2005, this invention adopts traditional superheterodyne receiver radar to be used for measuring river flow, owing to employing Analogue mixer, its hardware configuration is complicated, reliability is poor relative to all-digital receiver, and it is only for the measurement of river flow, flows relative to coastal waters, river model is comparatively simple, and data processing is relatively easy.
Summary of the invention
For background technology Problems existing, the invention provides a kind of digital UHF Doppler radar system for coastal waters stream detection and data processing method thereof.
Technical scheme of the present invention is as follows:
For a digital UHF Doppler radar system for coastal waters stream detection,
Comprise radiating circuit, receiving circuit; Radiating circuit comprises the emitting antenna, transmitter, derived digital signal, the clock source that connect successively; Receiving circuit comprises the receiving antenna array, AFE (analog front end), analog-to-digital conversion module, FPGA, USB module and the host computer that connect successively; Clock source is analog-to-digital conversion module, FPGA, derived digital signal provide relevant clock signal, and power module provides stable power supply for whole system.
Described FPGA comprises controller, frame synchronization controller, local oscillation signal generator, bandpass sampling module, digital mixer, cic filter, fifo buffer; Controller is connected with frame synchronization controller, derived digital signal respectively, frame synchronization controller is connected with local oscillation signal generator, digital mixer, derived digital signal respectively, local oscillation signal generator is connected with digital mixer, and analog-to-digital conversion module, bandpass sampling module, digital mixer, cic filter, fifo buffer, USB module connect successively.
Described FPGA selects the CYCLONEV series of ALTERA company, and generates NIOSII controller therein as System Control Center, for initialize digital signal source and frame synchronization controller.
Described emitting antenna and receiving antenna array form by Yagi antenna, and wherein receiving antenna array is made up of 8 antennas, and 8 antennas linearly equidistantly arrange, and spacing is the half-wavelength that transmits; Emitting antenna is positioned at the left front end of receiving antenna array, apart more than 10 meters.
Described derived digital signal is used for producing radar emission signal, and derived digital signal adopts direct signal synthesis DDS technology, selects integrated DDS chip AD9910; Native system adopts linear frequency sweep to interrupt continuous wave FMICW transmitting as radar, and wherein the centre frequency of FMICW is 340Mhz, and bandwidth is 15Mhz, and frequency sweep cycle is set to 0.04s.
The simulating signal input channel band of described analog-to-digital conversion module is wider than radar working frequency range; What adopt is the radio frequency sampling that the logical equivalent sampling of band completes to antenna echo.
Described AFE (analog front end) comprises receiving key, radio frequency amplifier and radio frequency band filter; receiving key is for the protection of receiver; prevent direct wave from crossing strong jamming receiver; radio frequency amplifier adopts two-stage to amplify; full gain is 45dB; bandpass filter centre frequency 340Mhz, bandwidth 15MHz are used for anti-aliasing filter.
Described clock source comprises temperature compensating crystal oscillator, digital phase-locked loop chip and clock buffer chip; Temperature compensating crystal oscillator provides the clock source of high stable, produces two-way clock through digital phase-locked loop chip, and a road is used for derived digital signal, one tunnel is as the input of clock buffer chip, clock buffer chip exports 9 road clocks, and wherein 8 tunnels are used for 8 passage analog-to-digital conversion modules, and 1 tunnel is used for FPGA.
Based on a data processing method for said system, comprise FPGA part and epigynous computer section; Wherein the disposal route of FPGA part is for carry out direct radio frequency bandpass sampling to signal, after cic filter, low frequency digital restituted signal is obtained again with local oscillation signal digital mixing, this signal is transferred to host computer by USB module, in order to ensure the stability transmitted, between cic filter and USB module, add a fifo buffer, achieve frame synchronization controller in this external FPGA and operate for system synchronization; The disposal route of epigynous computer section is do twice DFT conversion to the signal that USB module transmits to obtain range Doppler spectrum, and to each channel data calibrate, re-uses MUSIC algorithm and carry out DOA estimation, finally calculate the radial flow in each orientation.
The principle that the calculating of described radial flow adopts utilizes ocean current to test the speed to the Doppler shift that the Bragg diffraction of radar electromagnetic wave produces.
Compared with prior art, the present invention has the following advantages and good effect:
1, digital UHF Doppler radar system architecture of the present invention is simple, volume is little, cost is low; Owing to realizing down coversion in the digital domain, in AFE (analog front end), eliminate Analogue mixer part, thus greatly simplified, and signal quality is greatly improved, do not need to consider the interference problems such as third order intermodulation; Whole receiver circuit debugging difficulty simplifies greatly, and compact conformation can realize Portable radar apparatus.Clock due to modules all in native system all derives from same high-quality clock source, and the phase place therefore between module is extremely synchronous, and the phase stability of system promotes greatly.
2, relative to traditional superhet UHF Doppler radar system, this digital UHF Doppler radar system has obvious advantage and economic worth.Clear for data processing method orderliness of the present invention, be easy to realize, wherein disposal route all realizes in one piece of FPGA greatly, enormously simplify the complexity of system, also reduces cost simultaneously.
Accompanying drawing explanation
Fig. 1 is the system chart of the embodiment of the present invention.
Fig. 2 is the local oscillation signal digital ramp generator schematic diagram of the embodiment of the present invention.
Fig. 3 is clock source and the derived digital signal structured flowchart of the embodiment of the present invention.
Fig. 4 is the AFE (analog front end) structured flowchart of the embodiment of the present invention.
Fig. 5 is the frame synchronization controller timing figure of the embodiment of the present invention.
Fig. 6 is the experimental result (distance spectrogram) of the embodiment of the present invention.
Fig. 7 is the experimental result (Doppler's spectrogram) of the embodiment of the present invention.
Fig. 8 is the experimental result (range Doppler figure) of the embodiment of the present invention.
Embodiment
Describe in detail below in conjunction with drawings and Examples:
Fig. 1 is system chart of the present invention, and radar system hardware of the present invention is made up of radiating circuit and receiving circuit, and radiating circuit comprises the emitting antenna, transmitter, derived digital signal, the clock source that connect successively; Receiving circuit comprises the receiving antenna array, AFE (analog front end), analog to digital converter, FPGA, USB module and the host computer that connect successively; Clock source is analog to digital converter, FPGA, derived digital signal provide relevant clock signal, and power module provides stable power supply for whole system.
Data processing method of the present invention is divided into FPGA part and epigynous computer section, wherein the disposal route of FPGA part is for carry out direct radio frequency bandpass sampling to signal, after cic filter, low frequency digital restituted signal is obtained again with local oscillation signal digital mixing, this signal is transferred to host computer by USB module, in order to ensure the stability transmitted, between cic filter and USB module, add a fifo buffer, achieve frame synchronization controller in this external FPGA and operate for system synchronization; The disposal route of epigynous computer section is do twice DFT conversion to the signal that USB module transmits to obtain range Doppler spectrum, and to each channel data calibrate, re-uses MUSIC algorithm and carry out DOA estimation, finally calculate the radial flow in each orientation.
FPGA selects the CYCLONEV series of ALTERA company, and generates NIOSII controller therein as receiving circuit control core, and it is for initialization clock source and derived digital signal.Local oscillation signal is produced by the local oscillation signal generator of FPGA inside, numerically-controlled oscillator (NCO) IP kernel that local oscillation signal generator utilizes ALTERA company to provide and digital ramp generator (DRG) jointly produce digital linear frequency sweep and interrupt continuous wave (FMICW), wherein the schematic diagram of DRG as shown in Figure 2, DRG is made up of frequency step register, totalizer, frequency limitation device, the frequency sweep slope of linear frequency sweep can be changed by the size changing frequency step controller, thus configure radar waveform parameter flexibly.The parameter designing of cic filter is integration exponent number is 2, and extracting coefficient is 3200, and after cic filter, obtaining data transmission rate is like this 25.6Khz.
Fig. 3 is the structured flowchart of clock source and derived digital signal.Clock source is made up of temperature compensating crystal oscillator (10Mhz), digital phase-locked loop (SI5324) and clock buffer chip (CDCLVP1216), derived digital signal is made up of DDS chip (AD9910), radio frequency amplifier (GALI-52) and bandpass filter (centre frequency 340Mhz, bandwidth 15Mhz).During system electrification, digital phase-locked loop chip and the DDS chip of un-initialized are idle, at this moment system uses common 50Mhz crystal oscillator Direct driver NIOSII to configure digital phase-locked loop and DDS, digital phase-locked loop is made to export two-way clock, wherein the frequency on a road is that 982.04MHz is directly as the reference clock of DDS, the clock signal of an other road 81.92MHz is as the input of clock buffer chip, clock buffer chip exports 9 road clocks, wherein 8 tunnels are as analog-to-digital reference clock, and 1 tunnel is as FPGA internal synchronizing clock.In addition, NIOSII configures DDS chip output center frequency 340MHz, and the linear frequency sweep of bandwidth 15MHz interrupts continuous wave (FMICW) transmitting as radar.
Emitting antenna is Yagi antenna; Receiving antenna is Yagi antenna array, and array has 8 antennas, and 8 antennas linearly equidistantly arrange, and spacing is the half-wavelength that transmits; Emitting antenna is positioned at the left front end of receiving antenna array, apart more than 10 meters; Analog to digital converter simulating signal input channel bandwidth must be greater than radar working frequency range, but only need meet bandpass sample theory for sampling rate; What adopt here is the radio frequency sampling that the logical equivalent sampling of band completes to antenna echo, the analog to digital converter model that the present embodiment adopts is AD9265, its simulating signal input channel bandwidth can reach 600MHz, and sampling rate reaches as high as 105Mhz, meets the requirement of design.
Fig. 4 is the structured flowchart of AFE (analog front end); AFE (analog front end) comprises receiving key, radio frequency amplifier and radio frequency band filter; accept switch for the protection of receiver; prevent direct wave from crossing strong jamming receiver; radio frequency amplifier adopts two-stage to amplify; full gain is at about 45dB, and bandpass filter centre frequency 340Mhz, bandwidth 15MHz are used for anti-aliasing filter.Owing to adopting bandpass sampling and digital mixing technology, not containing frequency mixer in AFE (analog front end), which greatly simplifies the structure of AFE (analog front end), reduce design difficulty.
Fig. 5 is frame synchronization controller timing figure of the present invention.Radar data is in units of field, and in the present embodiment, a field data comprises 256 frames, and the frame synchronizing signal in each frame is synchronous for each module in FPGA; IO_UPDATE signal is used for the state reset of the DDS chip in digital local oscillator source; DRCTL signal produces swept-frequency signal for starting digital local oscillator source, and frequency sweep cycle signal is for indicating the effective of sampling period, and when it is high level, bandpass sampling and data processing are started working; TP and TR signal is for blocking the impact of direct wave on system, when TP signal is high level, transmitter normally works, the receiving key of AFE (analog front end) turns off for isolating direct wave, when TR signal is high level, AFE (analog front end) receiving key is opened, Transmitter Turn-Off, because receiving key has time delay when opening and turn off, therefore need to add certain Dead Time between TP and TR signal.These signals are all produced by frame synchronization controller.
Fig. 6, Fig. 7 and Fig. 8 are the experimental result pictures of the present embodiment, and they are respectively distance spectrogram, Doppler's spectrogram and range Doppler spectrogram.As can be seen from experimental result, due to the existence of coastal waters stream, and the radial flow velocity in each orientation is different, and doppler spectral is broadened a lot; If flow velocity is 0, so desirable doppler spectral single order summit concentrates near Bragg diffraction frequency, and we utilize the difference of actual Doppler peak and Bragg frequency to calculate flow velocity size just.
Claims (10)
1., for a digital UHF Doppler radar system for coastal waters stream detection, it is characterized in that:
Comprise radiating circuit, receiving circuit; Radiating circuit comprises the emitting antenna, transmitter, derived digital signal, the clock source that connect successively; Receiving circuit comprises the receiving antenna array, AFE (analog front end), analog-to-digital conversion module, FPGA, USB module and the host computer that connect successively; Clock source is analog-to-digital conversion module, FPGA, derived digital signal provide relevant clock signal, and power module provides stable power supply for whole system.
2. the digital UHF Doppler radar system for coastal waters stream detection according to claim 1, is characterized in that: described FPGA comprises controller, frame synchronization controller, local oscillation signal generator, bandpass sampling module, digital mixer, cic filter, fifo buffer; Controller is connected with frame synchronization controller, derived digital signal respectively, frame synchronization controller is connected with local oscillation signal generator, digital mixer, derived digital signal respectively, local oscillation signal generator is connected with digital mixer, and analog-to-digital conversion module, bandpass sampling module, digital mixer, cic filter, fifo buffer, USB module connect successively.
3. the digital UHF Doppler radar system for coastal waters stream detection according to claim 2, it is characterized in that: described FPGA selects the CYCLONEV series of ALTERA company, and generate NIOSII controller therein as System Control Center, for initialize digital signal source and frame synchronization controller.
4. the digital UHF Doppler radar system for coastal waters stream detection according to claim 3, it is characterized in that: described emitting antenna and receiving antenna array form by Yagi antenna, wherein receiving antenna array is made up of 8 antennas, 8 antennas linearly equidistantly arrange, and spacing is the half-wavelength that transmits; Emitting antenna is positioned at the left front end of receiving antenna array, apart more than 10 meters.
5. the digital UHF Doppler radar system for coastal waters stream detection according to claim 4, it is characterized in that: described derived digital signal is used for producing radar emission signal, derived digital signal adopts direct signal synthesis DDS technology, selects integrated DDS chip AD9910; Native system adopts linear frequency sweep to interrupt continuous wave FMICW transmitting as radar, and wherein the centre frequency of FMICW is 340Mhz, and bandwidth is 15Mhz, and frequency sweep cycle is set to 0.04s.
6. the digital UHF Doppler radar system for coastal waters stream detection according to claim 5, is characterized in that: the simulating signal input channel band of described analog-to-digital conversion module is wider than radar working frequency range; What adopt is the radio frequency sampling that the logical equivalent sampling of band completes to antenna echo.
7. the digital UHF Doppler radar system for coastal waters stream detection according to claim 6; it is characterized in that: described AFE (analog front end) comprises receiving key, radio frequency amplifier and radio frequency band filter; receiving key is for the protection of receiver; prevent direct wave from crossing strong jamming receiver; radio frequency amplifier adopts two-stage to amplify; full gain is 45dB, and bandpass filter centre frequency 340Mhz, bandwidth 15MHz are used for anti-aliasing filter.
8. the digital UHF Doppler radar system for coastal waters stream detection according to claim 7, is characterized in that: described clock source comprises temperature compensating crystal oscillator, digital phase-locked loop chip and clock buffer chip; Temperature compensating crystal oscillator provides the clock source of high stable, produces two-way clock through digital phase-locked loop chip, and a road is used for derived digital signal, one tunnel is as the input of clock buffer chip, clock buffer chip exports 9 road clocks, and wherein 8 tunnels are used for 8 passage analog-to-digital conversion modules, and 1 tunnel is used for FPGA.
9. based on a data processing method for system described in claim 1-8, it is characterized in that: comprise FPGA part and epigynous computer section; Wherein the disposal route of FPGA part is for carry out direct radio frequency bandpass sampling to signal, after cic filter, low frequency digital restituted signal is obtained again with local oscillation signal digital mixing, this signal is transferred to host computer by USB module, in order to ensure the stability transmitted, between cic filter and USB module, add a fifo buffer, achieve frame synchronization controller in this external FPGA and operate for system synchronization; The disposal route of epigynous computer section is do twice DFT conversion to the signal that USB module transmits to obtain range Doppler spectrum, and to each channel data calibrate, re-uses MUSIC algorithm and carry out DOA estimation, finally calculate the radial flow in each orientation.
10. data processing method according to claim 9, is characterized in that: the principle that the calculating of described radial flow adopts utilizes ocean current to test the speed to the Doppler shift that the Bragg diffraction of radar electromagnetic wave produces.
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| CN117990662A (en) * | 2024-04-07 | 2024-05-07 | 国家海洋局北海预报中心((国家海洋局青岛海洋预报台)(国家海洋局青岛海洋环境监测中心站)) | Non-contact radar seawater salinity measurement method |
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