CN105328804B - A kind of cutting method of wafer - Google Patents

A kind of cutting method of wafer Download PDF

Info

Publication number
CN105328804B
CN105328804B CN201410279926.9A CN201410279926A CN105328804B CN 105328804 B CN105328804 B CN 105328804B CN 201410279926 A CN201410279926 A CN 201410279926A CN 105328804 B CN105328804 B CN 105328804B
Authority
CN
China
Prior art keywords
cutting
wafer
cover wafer
device wafers
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201410279926.9A
Other languages
Chinese (zh)
Other versions
CN105328804A (en
Inventor
李飞
金立中
江博渊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN201410279926.9A priority Critical patent/CN105328804B/en
Publication of CN105328804A publication Critical patent/CN105328804A/en
Application granted granted Critical
Publication of CN105328804B publication Critical patent/CN105328804B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The present invention provides a kind of cutting method of wafer, including:Wafer is provided, the wafer includes device wafers and the cover wafer on the device wafers, alignment patterns, some Cutting Roads that the cover wafer includes some workspaces and extending in a first direction respectively between the workspace and extends along the second direction vertical with first direction are formed with the device wafers;The wafer is fixed on cutting carrier, makes the cover wafer above;Non-penetrating cutting is carried out to each Cutting Road both sides of the cover wafer along the first direction and the second direction respectively, one hemisect groove is respectively formed at two edges of the Cutting Road;Pad pasting is formed on the cover wafer surface;Pad pasting is removed, to remove the material in the Cutting Road in cover wafer.The method according to the invention, the impact that the chip produced in being prevented effectively from cover wafer cutting process is caused to device wafers improve the performance and yield of device.

Description

A kind of cutting method of wafer
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of cutting method of wafer.
Background technology
MEMS is MEMS (Microelectro Mechanical Systems), is in microelectric technique basis On the research frontier of multi-crossed disciplines that grows up.Through the development of more than 40 years, it has also become it is great that the world attractes attention One of sciemtifec and technical sphere.It is related to various subjects such as electronics, machinery, material, physics, chemistry, biology, medical science and technology, tool Have broad application prospects.MEMS sensor is the novel sensor manufactured using microelectronics and micromachining technology. Compared with traditional sensor, it have small volume, lightweight, low cost, low in energy consumption, reliability is high, be suitable to mass production, It is easily integrated and realizes intelligentized feature.Meanwhile, allow it to complete some traditional machines in the characteristic size of micron dimension The irrealizable function of tool sensor institute.
Consumer MEMS element was quickly grown in recent years.Should to broader from the application Quick Extended of relatively narrower before With.With the fast development in mobile device market, MEMS element in addition to microphone and gesture control sensor is widely used in, Also mobile phone and flat board manufacturer start active adoption MEMS pressure gauges, MEMS gyroscope and MEMS camera modules.With wearable The market of formula electronic product is gradually ripe, can more bring the wilderness demand to MEMS action sensors.
And the significant challenge that MEMS technology faces at present is the amount that high yield how is realized using existing traditional back segment equipment Product problem.Many MEMS products are made up of cover wafer (Cover Wafer) and device wafers (Device Wafer), and capping is brilliant After circle and device wafers bonding, also need to cut cover wafer, and cutting process often produces cutting chip, and cut The problems such as cooling and flushing liquid cause corrosion to pad in cutting mill platform, and then affect the performance and yield of device.
Therefore, for the problems referred to above, it is necessary to propose a kind of new cutting method.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will enter in specific embodiment part One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical scheme required for protection Key feature and essential features, more do not mean that the protection domain for attempting to determine technical scheme required for protection.
The present invention proposes a kind of cutting method of wafer to overcome the problem of presently, there are, including:
Wafer is provided, the wafer includes device wafers and the cover wafer on the device wafers, the device Alignment patterns are formed with part wafer, the cover wafer includes some workspaces and the edge respectively between the workspace Some Cutting Roads that first direction extends and extends along the second direction vertical with the first direction;
The wafer is fixed on cutting carrier, makes the cover wafer above;
Each Cutting Road both sides of the cover wafer are carried out along the first direction and the second direction respectively non- Cutting is penetrated, one hemisect groove is respectively formed at two edges of the Cutting Road;
Pad pasting is formed on the cover wafer surface;
The pad pasting is removed, to remove the material in the Cutting Road in the cover wafer.
Alternatively, before carrying out the non-penetrating cutting, also include cutting the edge of the cover wafer, to reveal The step of alignment patterns gone out in the device wafers.
Alternatively, before the non-penetrating cutting technique is carried out, by the alignment patterns in the device wafers, enter The alignment of row cutting machine and the wafer.
Alternatively, when carrying out the non-penetrating cutting, in the hemisect groove, the thickness of the remaining cover wafer is 10~20 μm.
Alternatively, the hemisect groove and the distance of the work area edge are 5~15 μm.
Alternatively, by way of cutting film being pasted on the cutting carrier, the wafer is fixed on into described cutting Cut on carrier.
Alternatively, the device wafers are MEMS wafer.
Alternatively, in the workspace, between the cover wafer and device wafers, it is formed with closed working chamber.
In sum, the cutting method for being provided according to the present invention, produces in being prevented effectively from cover wafer cutting process The impact that chip is caused to device wafers, while the corrosion of the coolant and flushing liquor of cutting machine to pad can be also avoided, and then Improve the performance and yield of device.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this Bright embodiment and its description, for explaining the principle of the present invention.
In accompanying drawing:
Figure 1A -1C are obtained the generalized section of device by MEMS wafer bonding technology and related process implementation process;
Fig. 2A -2G are obtained by the correlation step cut to cover wafer by the method according to exemplary embodiment of the present The schematic diagram of the device for obtaining;
Fig. 3 is the process chart cut to cover wafer according to the method for exemplary embodiment of the present.
Specific embodiment
In the following description, a large amount of concrete details are given to provide more thorough understanding of the invention.So And, it is obvious to the skilled person that the present invention can be able to without the need for one or more of these details Implement.In other examples, in order to avoid obscuring with the present invention, for some technical characteristics well known in the art do not enter Row description.
It should be appreciated that the present invention can be implemented in different forms, and should not be construed as being limited to what is proposed here Embodiment.Disclosure will be made thoroughly and complete on the contrary, providing these embodiments, and be will fully convey the scope of the invention to Those skilled in the art.In the accompanying drawings, in order to clear, the size and relative size in Ceng He areas may be exaggerated.From start to finish Same reference numerals represent identical element.
It should be understood that work as element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " other When element or layer, its can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or Person there may be element between two parties or layer.Conversely, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " directly It is connected to " or when " being directly coupled to " other elements or layer, then there is no element between two parties or layer.Although it should be understood that can make Various elements, part, area, floor and/or part are described with term first, second, third, etc., these elements, part, area, floor and/ Or part should not be limited by these terms.These terms be used merely to distinguish element, part, area, floor or part with it is another One element, part, area, floor or part.Therefore, without departing from present invention teach that under, the first element discussed below, portion Part, area, floor or part are represented by the second element, part, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... it On ", " above " etc., can describe for convenience here and used so as to describe an element or feature shown in figure with The relation of other elements or feature.It should be understood that in addition to the orientation shown in figure, spatial relationship term is intended to also include making With with operation in device different orientation.For example, if the device upset in accompanying drawing, then, is described as " under other elements Face " or " under it " or " under which " element or feature will be oriented to other elements or feature " on ".Therefore, exemplary art Language " ... below " and " ... under " may include upper and lower two orientations.Device can additionally be orientated and (be rotated by 90 ° or which It is orientated) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and the restriction not as the present invention.Here makes Used time, " one " of singulative, " one " and " described/should " be also intended to include plural form, unless context is expressly noted that separately Outer mode.It is also to be understood that term " composition " and/or " including ", when using in this specification, the feature, whole is determined The presence of number, step, operation, element and/or part, but be not excluded for one or more other features, integer, step, operation, The presence or addition of element, part and/or group.When here is used, term "and/or" includes any of related Listed Items and institute There is combination.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to explain proposition of the present invention Technical scheme.Presently preferred embodiments of the present invention is described in detail as follows, but in addition to these detailed descriptions, the present invention can be with With other embodiment.
[exemplary embodiment]
Below, with reference to Figure 1A to Fig. 1 C, MEMS wafer bonding technology and related process are illustrated, so as to deeper into Understand the present invention.
First, as shown in Figure 1A, there is provided device wafers 101 and cover wafer 102.
The device wafers 101 include Semiconductor substrate and device 103, and the material of the Semiconductor substrate can be monocrystalline Other substrates such as silicon or stress silicon on silicon, or insulator.The device is by several metal-oxides-half Other devices such as conductor field-effect transistor (MOSFETs) and electric capacity, resistance interconnect the integrated circuit to be formed by alloy, Can be semiconductor devices common in other integrated circuit fields, such as bipolar device or power device etc..Exemplarily, MEMS element is formed with the device wafers 101.Also include multiple contacts with the electrical connection of device 103 in device wafers 101 Pad 104.In addition, alignment patterns (not shown) is formed with the device wafers 101.The cover wafer 102 can be silicon Piece, glass or ceramic material.
As shown in Figure 1B, bonding technology is carried out, makes 101 front of device wafers and the back side of cover wafer 102 combine, with Form the working chamber 105 of device 103.The bonding method is selected from anode linkage, melting bonding, eutectic bonding or solder bond. As an example, the bonding technology is carried out using eutectic bonding method.
After bonding, also need to be ground reduction processing to cover wafer 102, to reach target thickness.Exemplarily, The lapping mode can be cmp.
As shown in Figure 1 C, cutting technique is carried out, is removed and is sealed corresponding to the part above engagement pad 104 in device wafers 101 Lid wafer, to expose engagement pad 104.And existing cutting process often produce in cutting chip, and cutting machine cooling and The problems such as flushing liquid causes corrosion to pad, and then affect the performance and yield of product.In consideration of it, the present invention proposes one kind New cutting method.
Below, cover wafer is carried out describing method according to an exemplary embodiment of the present invention with reference to Fig. 2A -2G and Fig. 3 The detailed step of cutting.
Shown in reference picture 2A-2B, wherein, Fig. 2A is the generalized section of modes of emplacement of the wafer on cutting carrier, Fig. 2 B are the top view of modes of emplacement of the wafer on cutting carrier.Wafer 200 is provided first, and the wafer 200 includes device Part wafer 201 and the cover wafer 202 above device wafers 201.The closed working chamber 203 formed in wafer 200 Workspace 204 of the corresponding region for device, and the cover wafer between operated adjacent area 204 removes part for predetermined, accordingly Target Cutting Road 205 is also located in this position.The cover wafer includes some workspaces and between the workspace The some Cutting Roads for extending in a first direction respectively and extending along the second direction vertical with the first direction.
Before cutting, wafer 200 is fixed on cutting carrier 206, makes cover wafer 202 above, so as to which Cut.In one example, by way of pasting cutting film 207 on cutting carrier 206, wafer 200 is fixed On cutting carrier 206.The cutting film 207 can be blue film or ultraviolet film etc..Wafer 200 is positioned over into cutting film 207 On, underlying device wafers 201 is sticked in cutting film 207.It is after wafer is fixed, ensuing to carry out Cutting technique.
Then, as shown in Figure 2 C, the edge of cover wafer 202 is cut, to expose in the device wafers 201 Alignment patterns 208.Exemplarily, along 209 position of line of cut in figure, cover wafer 202 is cut, removes cover wafer 202 marginal portion, to expose the alignment patterns 208 in the device wafers 201.Alternatively, the cutting method can be adopted With physics cutting or laser cutting.
As shown in Fig. 2 D-2E, wherein, Fig. 2 D are the top view for carrying out wafer after non-penetrating cutting technique, and Fig. 2 E are to carry out The generalized section of wafer after non-penetrating cutting technique.Before non-penetrating cutting technique is carried out, by the alignment in device wafers Figure, carries out the alignment of cutting machine and wafer.With reference to Fig. 2 D, with the Cutting Road 205a that extends in a first direction and along and first As a example by the Cutting Road 205b that the vertical second direction in direction extends, respectively in the first direction with second direction to the cover wafer 202 each Cutting Road both sides carry out non-penetrating cutting, and whole cutting process does not cut through cover wafer 202, but brilliant in capping One hemisect groove 210 is cut respectively in two edges of circle target Cutting Road.Alternatively, when carrying out non-penetrating cutting, hemisect groove The thickness of interior remaining cover wafer is 10~20 μm.Exemplarily, hemisect groove 210 and the distance at 204 edge of workspace are 5 ~15 μm, alternatively, hemisect groove is 10 μm with the distance of device work area edge, to avoid producing due to hypotelorism Fine cracks (crack) are impacted to the workspace of device.In Fig. 2 D, simply schematically illustrate respectively in the first direction Two Cutting Roads extended with second direction, but it is actual also including some cuttings for extending with second direction in the first direction Road.Non-penetrating cutting can be carried out to each Cutting Road both sides with second direction in the first direction respectively further.
Non-penetrating cutting is not the direct cutting to target Cutting Road, but is carried out at two edges of Cutting Road respectively non- The hemisect for penetrating.In cutting process, the still capped wafer of device wafers is covered, and will not be subject to cooling and punching in cutting machine The impact of wash liq.
As shown in Figure 2 F, the formation pad pasting 211 on 202 surface of the cover wafer.The pad pasting 211 can be ultraviolet film Or blue film etc..Type of pad pasting is not particularly limited at this, as long as with sufficiently strong viscosity and meeting application claims Pad pasting, it is applicable.
As shown in Figure 2 G, remove the pad pasting 211 on 202 surface of cover wafer.As pad pasting 211 sticks to cover wafer On 202, the hemisect groove in 202 Cutting Road region of cover wafer can be because disconnected with main body by pulling force upwards when pad pasting 211 is removed Split, form Cutting Road and integrally separate with cover wafer 202.Detached Cutting Road material 212 can be sticked on pad pasting 211 simultaneously It is removed.And 202 main body of cover wafer is removed because of being adhered on pad pasting with the bonding of device wafers 201.
With reference to Fig. 3, flow chart the step of method according to an exemplary embodiment of the present invention is implemented successively is illustrated therein is, For schematically illustrating the flow process of whole manufacturing process.
In step 301, there is provided wafer, the wafer includes device wafers and the capping on the device wafers Wafer;
In step 302, the wafer is fixed on cutting carrier, makes the cover wafer above;
In step 303, the edge of the cover wafer is cut, to expose the alignment figure in the device wafers Shape;
In step 304, each cutting respectively along the first direction and the second direction to the cover wafer Road both sides carry out non-penetrating cutting, respectively to form one hemisect groove at two edges of the Cutting Road;
In step 305, pad pasting is formed on the cover wafer surface;
Within step 306, the pad pasting is removed, to remove the material in the Cutting Road in the cover wafer.
In sum, the cutting method according to cover wafer proposed by the present invention, is cut to cover wafer first, with Expose the alignment patterns in device wafers, thereafter, each Cutting Road both sides of cover wafer are carried out in the first direction and second party To non-penetrating cutting, form deeper hemisect groove but and do not cut through cover wafer.So in cutting process, capping is brilliant Circle still functions as protective effect to device wafers, can be prevented effectively from device wafers and touch cutting coolant and flushing liquor, butt welding The generation of disk etching problem.Recycle pad pasting and remove pad pasting and Cutting Road material is removed, will not be formed in device wafers and be cut Chip is cut, and then improves the performance and yield of device.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to Citing and descriptive purpose, and be not intended to limit the invention in described scope of embodiments.In addition people in the art Member is it is understood that the invention is not limited in above-described embodiment, teaching of the invention can also be made more kinds of Variants and modifications, within these variants and modifications all fall within scope of the present invention.Protection scope of the present invention by The appended claims and its equivalent scope are defined.

Claims (8)

1. a kind of cutting method of wafer, including:
Wafer is provided, the wafer includes device wafers and the cover wafer on the device wafers, and the device is brilliant Circle and the cover wafer are bonded together, and alignment patterns are formed with the device wafers, and the cover wafer includes some Workspace and extending in a first direction respectively between the workspace and edge second party vertical with the first direction To some Cutting Roads for extending;
The wafer is fixed on cutting carrier, makes the cover wafer above;
Non-penetrating is carried out to each Cutting Road both sides of the cover wafer along the first direction and the second direction respectively Cutting, respectively to form one hemisect groove at two edges of the Cutting Road;
Pad pasting is formed on the cover wafer surface;
The pad pasting is removed, to remove the material in the Cutting Road in the cover wafer, wherein, the cover wafer is cut Cutting the hemisect groove in region can be because by pulling force upwards and body breaks, forming the cutting when the pad pasting is removed Road is integrally separated with the cover wafer, while the material in the detached Cutting Road can be sticked to and be moved on the pad pasting Remove.
2. method according to claim 1, it is characterised in that before carrying out the non-penetrating cutting, also include to described The edge of cover wafer is cut, the step of to expose the alignment patterns in the device wafers.
3. method according to claim 1, it is characterised in that before the non-penetrating cutting technique is carried out, by described The alignment patterns in device wafers, carry out the alignment of cutting machine and the wafer.
4. method according to claim 1, it is characterised in that when carrying out the non-penetrating and cutting, in the hemisect groove The thickness of the remaining cover wafer is 10~20 μm.
5. method according to claim 1, it is characterised in that the hemisect groove with the distance of the work area edge is 5~15 μm.
6. method according to claim 1, it is characterised in that by the side that cutting film is pasted on the cutting carrier Formula, the wafer is fixed on the cutting carrier.
7. method according to claim 1, it is characterised in that the device wafers are MEMS wafer.
8. method according to claim 1, it is characterised in that in the workspace, the cover wafer and device are brilliant Closed working chamber is formed between circle.
CN201410279926.9A 2014-06-20 2014-06-20 A kind of cutting method of wafer Active CN105328804B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410279926.9A CN105328804B (en) 2014-06-20 2014-06-20 A kind of cutting method of wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410279926.9A CN105328804B (en) 2014-06-20 2014-06-20 A kind of cutting method of wafer

Publications (2)

Publication Number Publication Date
CN105328804A CN105328804A (en) 2016-02-17
CN105328804B true CN105328804B (en) 2017-04-05

Family

ID=55279667

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410279926.9A Active CN105328804B (en) 2014-06-20 2014-06-20 A kind of cutting method of wafer

Country Status (1)

Country Link
CN (1) CN105328804B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106800272B (en) * 2017-02-17 2018-11-23 烟台睿创微纳技术股份有限公司 A kind of cutting of MEMS wafer and wafer scale release and test method
CN106946215A (en) * 2017-04-13 2017-07-14 华天科技(昆山)电子有限公司 Wire bonding core chip package of cover plate and preparation method thereof
CN107827079B (en) * 2017-11-17 2019-09-20 烟台睿创微纳技术股份有限公司 A kind of production method of MEMS chip
CN108147363B (en) * 2017-12-22 2019-09-20 烟台睿创微纳技术股份有限公司 A kind of separation method of MEMS wafer chip
CN111146225B (en) * 2019-12-24 2023-04-28 中芯集成电路(宁波)有限公司 Forming method and chip separation method of combined image sensor chip

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001035461A1 (en) * 1999-11-11 2001-05-17 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
CN1806326A (en) * 2004-03-15 2006-07-19 日立化成工业株式会社 Dicing/die boding sheet
CN101009230A (en) * 2006-01-24 2007-08-01 探微科技股份有限公司 Wafer-level encapsulation and cutting method
TW200910435A (en) * 2007-08-30 2009-03-01 Touch Micro System Tech Method of wafer-level segmenting capable of protecting contact pad
CN101388348A (en) * 2007-09-14 2009-03-18 探微科技股份有限公司 Wafer stage package cutting method protecting connection pad
CN102464296A (en) * 2010-11-05 2012-05-23 中芯国际集成电路制造(上海)有限公司 Cutting separation method of MEMS structure
CN102897708A (en) * 2011-07-29 2013-01-30 美新半导体(无锡)有限公司 Cutting method for MEMS wafer
CN103537806A (en) * 2012-07-17 2014-01-29 深圳市大族激光科技股份有限公司 Method for processing wafer through laser

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001035461A1 (en) * 1999-11-11 2001-05-17 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
CN1806326A (en) * 2004-03-15 2006-07-19 日立化成工业株式会社 Dicing/die boding sheet
CN101009230A (en) * 2006-01-24 2007-08-01 探微科技股份有限公司 Wafer-level encapsulation and cutting method
TW200910435A (en) * 2007-08-30 2009-03-01 Touch Micro System Tech Method of wafer-level segmenting capable of protecting contact pad
CN101388348A (en) * 2007-09-14 2009-03-18 探微科技股份有限公司 Wafer stage package cutting method protecting connection pad
CN102464296A (en) * 2010-11-05 2012-05-23 中芯国际集成电路制造(上海)有限公司 Cutting separation method of MEMS structure
CN102897708A (en) * 2011-07-29 2013-01-30 美新半导体(无锡)有限公司 Cutting method for MEMS wafer
CN103537806A (en) * 2012-07-17 2014-01-29 深圳市大族激光科技股份有限公司 Method for processing wafer through laser

Also Published As

Publication number Publication date
CN105328804A (en) 2016-02-17

Similar Documents

Publication Publication Date Title
CN105328804B (en) A kind of cutting method of wafer
CN103426732B (en) The method of low-temperature wafer bonding and the structure formed by the method
KR102047347B1 (en) Expansion method, method for manufacturing semiconductor devices, and semiconductor device
CN202855741U (en) Wafer-wafer, wafer-chip and chip-chip bonding structure
KR20160145062A (en) Device modified substrate article and methods for making
DE112017008327T5 (en) MICROELECTRONIC ARRANGEMENTS
WO2007137049A3 (en) Double-sided integrated circuit chips
TW201721819A (en) Combination of semiconductor die with another die by hybrid bonding
CN106206509B (en) Electronic package, manufacturing method thereof and substrate structure
CN103192459A (en) Wafer dicing method and method of manufacturing light emitting device chips employing the same
TW200707603A (en) Backside method and system for fabricating semiconductor components with conductive interconnects
US11335553B2 (en) Bonded semiconductor structures
TW200729371A (en) Semiconductor device and manufacturing method of the same, camera module
CN106935563A (en) Electronic package, manufacturing method thereof and substrate structure
CN103295893A (en) Wafer-level micro-assembly process
CN105185719B (en) A kind of hybrid bonded method of bayonet type
CN104241147A (en) Low-temperature bonding method based on aluminum and germanium eutectic
JP2013201460A (en) Scribe-line through silicon vias
EP2562802A3 (en) Method for producing a three-dimensional integrated circuit
CN105244308A (en) Method for holding thin wafer through temporary bonding of porous slide glass
WO2019132957A1 (en) Microelectronic assemblies
CN102556948A (en) Batch fabricated 3d interconnect
CN103722623B (en) The brisement jig and breaking method thereof of brittle material substrate
WO2019128769A1 (en) Mems component and manufacturing method therefor
CN105513943B (en) A kind of production method of semiconductor devices

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant