CN105324818A - 用于减少主机电流瞬态的备用电源 - Google Patents

用于减少主机电流瞬态的备用电源 Download PDF

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CN105324818A
CN105324818A CN201480034833.8A CN201480034833A CN105324818A CN 105324818 A CN105324818 A CN 105324818A CN 201480034833 A CN201480034833 A CN 201480034833A CN 105324818 A CN105324818 A CN 105324818A
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charge storage
storage cell
current
power
dsd
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CN105324818B (zh
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W·K·莱尔德
J·R·阿格尼斯
H·S·翁
R·P·梅奥
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Western Digital Technologies Inc
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G06F1/305Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations in the event of power-supply fluctuations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3221Monitoring of peripheral devices of disk drive devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/34Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
    • H02J7/345Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1566Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

一种数据存储设备(DSD),该数据存储设备(DSD)包括来自主机的电源以及电荷存储元件。在来自主机的电源上检测到电流瞬态,并且确定该电流瞬态是否超过电流阈值。当电流瞬态超过电流阈值时,从电荷存储元件汲取功率以减小从主机汲取的功率。

Description

用于减少主机电流瞬态的备用电源
背景技术
计算机和其它电子设备的新的形状因子常常需要新的功率要求。此外,针对设备的增加的便携性和更长的电池寿命可能需要更加严格的功率要求。例如,数据存储设备(DSD)(例如,固态驱动器(SSD)、固态混合驱动器(SSHD)或者硬盘驱动器(HDD))在可以从主机汲取多少电流方面可能会受到限制。
为了满足电流限制或者电流阈值,当电流开始超过电流阈值时DSD减小电流。减小电流常常需要降低DSD的性能,以便从主机汲取更少的电流。
附图说明
通过以下结合附图所阐述的具体实施方式,本公开内容的实现方式的特征和优点将变得更加显而易见。提供附图和相关联的描述是为了说明本公开内容的实现方式,而不是为了限制所要求保护的范围。
图1示出了根据本公开内容的一个实现方式的SSD的电流调节电路和开关控制电路的框图;
图2示出了根据本公开内容的一个实现方式的SSD的电流调节电路和开关控制电路的框图;
图3示出了根据本公开内容的一个实现方式的HDD的电流调节电路和开关控制电路的框图;
图4示出了根据本公开内容的一个实现方式的HDD的电流调节电路和开关控制电路的框图;
图5示出了根据本公开内容的一个实现方式的SSHD的电流调节电路和开关控制电路的框图;
图6示出了根据本公开内容的一个实现方式的SSHD的电流调节电路和开关控制电路的框图;
图7示出了根据本公开内容的一个实现方式的、在不使用电荷存储元件的情况下的电压和电流的图;
图8示出了图7的图的放大视图;
图9示出了根据本公开内容的一个实现方式的、在使用电荷存储元件时的电压和电流的图;
图10示出了图9的图的放大视图;以及
图11示出了根据本公开内容的一个实现方式的流程图。
具体实施方式
在以下具体实施方式中,为了提供对本公开内容的充分理解,阐述了很多具体细节。然而,对于本领域技术人员将显而易见的是,可以在没有这些具体细节的情况下实施所公开的各个实现方式。在其它实例中,没有详细示出公知结构和技术,以免不必要地混淆各个实现方式。
图1示出了具有电源电路102的电路100的框图,其中电源电路102耦合到主机电路101。电源电路102例如可以与用于SSD或者SSHD(包括固态存储器)的电源电路相对应。
尽管本文的描述通常是指固态存储器,但是应当理解的是,特定的实现方式可以包括各种类型的固态存储器中的一个或多个,例如硫族化合物RAM(C-RAM)、相变存储器(PC-RAM或者PRAM))、可编程金属化单元RAM(PMC-RAM或者PMCm)、双向统一存储器(OUM)、电阻RAM(RRAM)、NAND存储器(例如,单级单元(SLC)存储器、多级单元(MLC)存储器,或者其任意组合)、NOR存储器、EEPROM、铁电存储器(FeRAM)、磁阻RAM(MRAM)、其它分立NVM(非易失性存储器)芯片或者其任意组合。
在图1的例子中,电源电路102包括电荷存储元件110、接地105、隔离电路120、电阻器140、主机电流感测单元150、二极管160、电流调节电路180、SSD调节器185以及SSD负载190。电源电路102可选地包括电阻器141和负载电流感测单元151。主机电路101包括耦合到接地105的主机电源130。
电荷存储元件110被配置为存储功率并且向SSD调节器185提供所存储的功率。电荷存储元件110例如可以包括电容器或者电容器组中的多个电容器。
SSD调节器185为SSD负载190供电并且对其进行控制。SSD调节器185通常从主机电源130汲取功率。主机电流感测单元150对穿过电阻器140的电流进行感测,以测量从主机电源130汲取的电流。或者,可以在二极管160的另一侧连接电阻器141(其耦合到负载电流感测单元151),以对进入SSD调节器185的输入端的电流负载进行感测。在某些实现方式中,仅可以测量主机电流或者负载电流中的一个,而在其它实现方式中可以测量两者。电流调节电路180确定电流何时超过电流阈值。通常,当检测到诸如电流瞬态或者电流尖峰(currentspike)之类的瞬态事件时,电流调节电路180和/或SSD调节器185降低SSD负载190的性能,以便使电流减小至低于电流阈值。例如可以通过降低数据速率或者减小所写入的分页的数量来降低性能。
尽管降低性能实现了减小电流,但是降低性能不是所期望的。本公开内容在不必通常地降低性能的情况下实现了电流调节。电荷存储元件110提供补充功率来满足超过电流阈值处可用的功率需求,而不是降低性能来减小所需要的来自主机电源130的电流。电流调节电路180使用来自主机电流感测单元150的信号来确定来自主机的电流何时接近电流阈值。然后,电流调节电路180向隔离电路120发送ON信号或者以其它方式控制隔离电路120。隔离电路120将电荷存储元件110连接到SSD调节器185,以使得电荷存储元件110也向SSD调节器185提供功率。由于电荷存储元件110所提供的功率,因此从主机电源130汲取更少的电流。二极管160防止来自电荷存储元件110的电流流回至主机电源130。因此,主机电源电流被调节为保持低于电流阈值,同时不降低SSD负载190的性能。
电荷存储元件110可以包括一个或多个电容器。电荷存储元件110还提供了用于备份事件的备用电源。如果主机电源130例如由于停电而突然地断开,那么电荷存储元件110提供备用电源以允许SSD负载190在不损失数据的情况下正常地关闭。然而,电荷存储元件110需要足够的能量储备来提供备用电源。
为了防止电荷存储元件110消耗太多功率,电流调节电路180选择性地接通隔离电路120。在图1所示的实现方式中,电流调节电路180对已经发生的需要切换至电荷存储元件110的瞬态事件的数量进行计数。取决于电荷存储元件110中的电容器的数量和/或尺寸,电流调节电路180可以具有在预定的时间段期间瞬态事件的预定的极限。例如,预定的极限可以是20ms的跨度中的30个瞬时事件。电流调节电路180保持有瞬态事件的计数器,该计数器触发隔离电路120。如果计数器达到极限,那么在随后的瞬态事件中电流调节电路180不会接通隔离电路120。相反,电流调节电路180可以降低SSD负载190的性能,或者利用减小电流的其它常规方法。
在经过足够的时间之后,可以复位或者减少计数器。可以基于计算对电荷存储元件110进行再充电所需要的时间来预先确定该足够的时间。因此,电流调节电路180防止电荷存储元件110完全耗尽。
图2示出了包括主机电路201和电源电路202的电路200,其中电源电路202例如可以与用于SSD或者SSHD的电源电路相对应。主机电路201包括主机电源230和接地205。电源电路包括电源设备270、隔离电路220、电荷存储元件210、接地205、电阻器240、主机电流感测单元250、二极管260、电流调节电路280、SSD调节器285以及SSD负载290。这些部件可以对应于电路100中类似命名的部件。然而,电路200利用模数转换器(ADC)来测量电荷存储元件210的电压电平,而不是利用瞬态事件的计数器来管理电荷存储元件210。
在图2中,电源设备270具有耦合到电荷存储元件210的ADC。如在电路100中一样,电流调节电路280基于来自主机电流感测单元250的信号来确定瞬态事件,其中主机电流感测单元250对穿过电阻器240的电流进行感测。当电流达到电流阈值时,电流调节电路280接通隔离电路220,以使得电荷存储元件210向SSD调节器285提供功率。电源设备270可以对电荷存储元件210的电压电平进行检测。当电荷存储元件210达到最小阈值(其可以与提供足够的备用电源所需要的最小功率相对应)时,电源设备270可以防止接通隔离电路220。或者,电源设备270可以覆写来自电流调节电路280的ON信号。当经过足够的时间时,或者当电源设备检测到已对电荷存储元件210的电压电平进行充分充电时,然后电源设备270可以在需要时允许隔离电路220将电源转换至电荷存储元件210。
图3和图4分别示出了电路300和电路400,其中电路300和电路400例如可以对应于用于HDD的电源电路。电路300包括主机电路301以及电源电路302,主机电路301包括主机电源330和接地305,电源电路302包括电荷存储元件310、隔离电路320、电阻器340、主机电流感测单元350、二极管360、电源设备370、电流调节电路380、HDD负载390以及接地305。
电路300包括HDD负载390而非SSD负载,其中HDD负载390可以对应于从HDD汲取的功率。电源设备370为HDD负载390供电并对其进行调节。然而,其它部件可以对应于电路100中类似命名的部件。与图1中的电流调节电路180类似,电流调节电路380具有瞬态事件的计数器,以便管理和维持电荷存储元件310的功率电平,从而保持足够的功率以供备用。
图4中的电路400包括主机电路401和电源电路402,其中主机电路401包括主机电源430和接地405,电源电路402包括电荷存储元件410、隔离电路420、电阻器440、主机电流感测单元450、二极管460、电源设备470、电流调节电路480、HDD负载490以及接地405。与电路200不同,电路400包括电源设备470所控制的HDD负载490。然而,其它部件可以对应于电路200中类似命名的部件。
电源设备470包括ADC,其可以对电荷存储元件410的电压电平进行检测。当电荷存储元件410的电压电平下降得太低时,电源设备470可以防止隔离电路420切换至电荷存储元件410。当电荷存储元件410的电压电平返回至足够的电平时,电源设备470重新启用隔离电路420。
图5和图6分别示出了电路500和电路600,其中电路500和电路600例如可以对应于用于混合驱动器(SSHD)的电源电路。混合驱动器可以包括硬盘驱动器和固态存储器(例如,NAND闪存)。电路500包括主机电路501和电源电路502,其中主机电路501包括主机电源530和接地505,电源电路502包括电荷存储元件510、隔离电路520、电阻器540、主机电流感测单元550、二极管560、混合调节器585、电流调节电路580、混合负载590以及接地505。可选地,除了电阻器540和主机电流感测单元550之外或者代替电阻器540和主机电流感测单元550,电源电路502可以包括电阻器541和负载电流感测单元551。
电路500包括混合负载590而非SSD负载或者HDD负载,其中混合负载590可以对应于从HDD和/或固态存储器汲取的功率。混合调节器585为混合负载590供电并且对其进行调节。然而,其它部件可以对应于电路100中类似命名的部件。与图1中的电流调节电路180类似,电流调节电路580具有瞬态事件的计数器,以便管理和维持电荷存储元件510的功率电平,从而保持足够的功率以供备用。
图6中的电路600包括主机电路601和电源电路602,其中主机电路601包括主机电源630和接地605,电源电路602包括电荷存储元件610、隔离电路620、电阻器640、主机电流感测单元650、二极管660、电源设备670、混合调节器685、电流调节电路680、混合负载690以及接地605。混合负载690可以对应于从混合驱动器的HDD和/或SSD汲取的功率。与电路200不同,电路600包括由混合调节器685控制的混合负载690。然而,其它部件可以对应于电路200中类似命名的部件。
电源设备670包括ADC,其可以对电荷存储元件610的电压电平进行检测。当电荷存储元件610的电压电平下降得太低时,电源设备670可以防止隔离电路620切换至电荷存储元件610。当电荷存储元件610的电压电平返回至足够的电平时,电源设备670重新启用隔离电路620。
图7和图8分别示出了在不使用电荷存储元件(例如,图1的电荷存储元件110或者图2的电荷存储元件210)的情况下在时间上并列的电压电平和电流电平的图700和图800。
在图7中,当电荷存储元件随时间进行充电时,电容器电压曲线710上升。例如,电容器电压曲线710可以充电高达17V,或者任意其它适当的电压电平。主机电源曲线720示出了来自主机电源的电压电平,并且SSD电压曲线725示出了SSD(例如,图1的SSD负载190或者图2的SSD负载290)处的电压电平。主机电流曲线730描绘了从主机电源汲取的电流。负载曲线740描绘了SSD的负载。在图7中,瞬态事件发生在200ms处,示为负载尖峰750。
图8示出了图700中靠近瞬态事件的放大视图。图800中的曲线对应于图700中类似命名的曲线。在200ms处,负载曲线740上升至负载尖峰750,对应于瞬态事件。如主机电源曲线720中看到的,主机电源下降。类似地,SSD电压曲线725下降。主机电流增大,如主机电流曲线730上升至电流尖峰860中看到的。在瞬态事件期间,主机电源下降而主机电流增大。
图9和图10分别示出了在使用电荷存储元件(例如,来自图1的电荷存储元件110或者来自图2的电荷存储元件210)的情况下在时间上并列的电压电平和电流电平的图900和图1000。在图9中,与图7类似,当电荷存储元件随时间进行充电时,电容器电压曲线910上升。图900还示出了主机电源曲线920、SSD电压曲线925、主机电流曲线930以及负载曲线940。瞬态事件发生在200ms处,对应于负载尖峰950。然而,因为电荷存储元件提供功率,所以电容器电压曲线910经历电压下降915。此外,因为电荷存储元件连接到SSD负载,所以当SSD电压电平上升至电荷存储元件的电压电平时,SSD电压曲线925经历电压尖峰970。
图10示出了图900中靠近200ms处的瞬态事件的放大视图。图1000中的曲线对应于图900中类似命名的曲线。在200ms处,负载曲线940上升至负载尖峰950。与图8类似,主机电源曲线920经历主机电源下降1022,并且SSD电压曲线925类似地经历SSD电压下降1024。主机电流曲线930还经历电流尖峰1060。然而,当电荷存储元件开始提供功率时,曲线从图8的这些曲线偏离。
电容器电压曲线910经历电压下降915。作为响应,SSD电压曲线上升至接近电荷存储元件的电压电平的电压电平(由电压尖峰970示出),这是因为电荷存储元件现在连接到SSD。主机电源曲线920和SSD电压曲线925中的骤降(例如,主机电源下降1022和SSD电压下降1024)各自都未持续负载尖峰950的持续时间。主机电源曲线920返回至电流电平1023,同时SSD电压曲线925上升至电压尖峰970。在大致相同的时间,主机电流曲线930经历电流下降1065,以使得电流尖峰1060也未持续负载尖峰950的持续时间。电流尖峰1060的振幅和持续时间小于图8中的电流尖峰860的振幅和持续时间。因此,使用电荷存储元件可以使主机电流保持低于电流阈值。
图11示出了可以由电子设备中的电流调节电路(例如,电流调节电路180、280、380或480)来执行的逻辑的流程图1100。在1110处,在主机电源上检测到电流瞬态。电流调节电路可以使用主机电流感测单元来对穿过电流感测电阻器的电流进行感测,或者可以使用对电流进行检测的其它公知的方法。在1115处,电流调节电路确定检测到的电流瞬态是否超过电流阈值。电流阈值可以是所设定的电流值,例如略小于主机电源所提供的电流。例如,电流阈值可以对应于主机电源的电流极限。在其它实现方式中,可以由电流调节电路来执行算法,该算法对电流瞬态的速率进行分析以确定动态电流阈值。在这种实现方式中,瞬态电流中相对快的尖峰可以导致在1115中确定电流瞬态是否超过电流阈值中设置较低的电流阈值。
如果在1115中确定电流瞬态未超过电流阈值,那么逻辑返回至1110以继续对主机电源上的电流瞬态进行检测。
另一方面,如果电流调节电路在1115中确定电流瞬态超过电流阈值,那么在1120中电流调节电路确定电荷存储元件(例如,电荷存储元件110、210、310或410)的可用性。电荷存储元件可能由于低电压电平(例如如果电荷存储元件的电压电平下降至低于预定的电压)而不可用。
在电子设备为DSD的实现方式中,预定的电压可以是足以在意外的功率损失之后在没有数据损失的情况下安全地关闭DSD的电压。例如,对于SSD驱动器,可能需要电荷存储元件中的储备电源来防止由于功率损失而导致的数据损坏(例如,成对的分页损坏)。然而,诸如HDD之类的其它DSD可能不需要储备电源。在这些实现方式中,预定的电压可以是0伏特或者接近0伏特。换句话说,电荷存储元件可能完全耗尽。
当电荷存储元件在为若干个瞬态事件提供功率之后进行充电时,该电荷存储元件可能临时不可用。可以使用瞬态事件的计数器或者通过测量电荷存储元件的电压电平来确定电荷存储元件的可用性。在其它实现方式中,可以利用电荷存储元件电压的振幅,这可能需要额外的电路。
如果在1120中电荷存储元件不可用,那么在1125中电流调节电路降低的电子设备的性能并且逻辑结束。
如果电荷存储元件可用,那么1130中电流调节电路允许电子设备从电荷存储元件汲取功率。在某些实现方式中,也可以断开主机电源。在1140处,电流调节电路禁用来自电荷存储元件的电源,以使得电子设备停止从电荷存储元件汲取功率。电子设备可以在设定的时间段之后停止从电荷存储元件汲取功率。该时间段可以基于经验测试。在其它实现方式中,在电荷存储元件的电压电平下降至低于预定的电压(如上针对1120所讨论的)之后,电子设备可以停止从电荷存储元件汲取功率。如果检测到的由电子设备汲取的电流下降至低于预定的电流(指示瞬态事件结束),那么电子设备也可以停止从电荷存储元件汲取功率。一旦电子设备停止从电子存储元件汲取功率,电荷存储元件就可以进行再充电并且图11的逻辑结束。
本领域普通技术人员将意识到,结合本文所公开的例子所描述的各个说明性的逻辑框、模块和过程可以实现为电子硬件、计算机软件或者两者的组合。此外,可以在计算机可读介质上体现前述过程,其中计算机可读介质使处理器或者计算机进行或者执行某些功能。
为了清楚地说明硬件和软件的这种可互换性,上文已经对各个说明性的部件、框和模块围绕它们的功能进行了一般性描述。至于该功能是实现为硬件还是软件,这取决于特定的应用和施加在整个系统上的设计约束。本领域普通技术人员可以针对每个特定的应用以不同的方式来实现所描述的功能,但是这种实现决策不应当解释为导致背离本公开内容的范围。
可以利用被设计为执行本文所描述的功能的通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其它可编程逻辑器件、分立门或晶体管逻辑器件、分立硬件部件或者其任意组合来实现或执行结合本文所公开的例子所描述的各个说明性的逻辑框、单元、模块和控制器。通用处理器可以是微处理器,但是在替代方案中,处理器可以是任意常规的处理器、控制器、微处理器或者状态机。处理器还可以实现为计算设备的组合,例如DSP和微处理器的组合、多个微处理器、一个或多个微处理器结合DSP内核,或者任意其它此种配置。
结合本文所公开的例子所描述的方法或者过程的活动可以直接体现在硬件中、在处理器所执行的软件模块中或者在两者的组合中。也可以根据与例子中所提供的顺序交替的顺序来执行方法或者算法的步骤。软件模块可以驻留在RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动介质、光学介质或者本领域公知的任意其它形式的存储介质中。示例性的存储介质耦合到处理器,以使得处理器可以从存储介质读取信息并且向存储介质写入信息。在替代方案中,存储介质可以是存储器的组成部分。处理器和存储介质可以驻留在专用集成电路(ASIC)中。
提供所公开的示例性实现方式的以上描述是为了使得本领域任何普通技术人员能够实施或者使用本公开内容中的实现方式。对于本领域技术人员而言,对这些例子的各种修改将是显而易见的,并且在不背离本公开内容的精神或范围的情况下,本文所公开的原理可以应用于其它例子。所描述的实现方式在所有方面都仅视为是说明性的而非限制性的,并且因此,由所附的权利要求而不是由前面的描述来指示本公开内容的范围。落入权利要求等效项的含义和范围内的所有变化都将包含在其范围内。

Claims (22)

1.一种数据存储设备(DSD),其包括来自主机的电源,所述DSD包括:
电荷存储元件,所述电荷存储元件用于为所述DSD提供功率;
电流感测电路,所述电流感测电路用于对来自所述主机的所述电源上的电流瞬态进行检测;以及
电流调节电路,所述电流调节电路被配置为:
确定所述电流瞬态是否超过电流阈值;
当所述电流瞬态超过所述电流阈值时,使得所述DSD从所述电荷存储元件汲取功率;以及
停止从所述电荷存储元件汲取功率。
2.根据权利要求1所述的DSD,其中,所述电流调节电路还被配置为在以下各项中的至少一项之后停止从所述电荷存储元件汲取功率:
预定的时间段,
当所述电荷存储元件的电压电平达到或者下降至低于阈值电压时,以及
当所述DSD所汲取的功率的电流瞬态不再超过所述电流阈值时。
3.根据权利要求2所述的DSD,其中,所述阈值电压与用于在从所述主机提供的功率的意外损失之后向所述DSD提供功率的电压相对应。
4.根据权利要求2所述的DSD,其中,所述阈值电压是0伏特。
5.根据权利要求2所述的DSD,其中,所述电流调节电路还被配置为确定所述电荷存储元件是否可用于提供功率。
6.根据权利要求5所述的DSD,其中,所述电流调节电路还被配置为通过以下操作来确定所述电荷存储元件是否可用于提供功率:
将一时间段中超过所述电流阈值的电流瞬态的次数与预定的极限进行比较;以及
当在所述时间段内所述电流瞬态的次数超过所述预定的极限时,确定所述电荷存储元件不可用。
7.根据权利要求5所述的DSD,其中,所述电流调节电路还被配置为通过以下操作来确定所述电荷存储元件是否可用于提供功率:
将所述电荷存储元件的电压电平与阈值电压进行比较;以及
当所述电压电平位于或者低于所述阈值电压时,确定所述电荷存储元件不可用。
8.根据权利要求5所述的DSD,其中,所述电流调节电路还被配置为:当确定所述电荷存储元件不可用于提供功率时,降低所述DSD的性能。
9.根据权利要求2所述的DSD,其中,所述电流阈值与来自所述主机的所述电源的电流极限相对应。
10.根据权利要求2所述的DSD,其中,所述电流调节电路还被配置为基于所述电流瞬态的变化速率来设置所述电流阈值。
11.根据权利要求1所述的DSD,还包括:固态存储器。
12.根据权利要求1所述的DSD,还包括:硬盘驱动器。
13.根据权利要求1所述的DSD,还包括:混合驱动器。
14.一种用于减少针对从主机到包括电荷存储元件的数据存储设备(DSD)的电源的电流瞬态的方法,所述方法包括:
对从所述主机到所述DSD的所述电源上的电流瞬态进行检测;
确定所述电流瞬态是否超过电流阈值;
当所述电流瞬态超过所述电流阈值时,从所述电荷存储元件汲取功率以减少从所述主机汲取的功率;以及
停止从所述电荷存储元件汲取功率。
15.根据权利要求14所述的方法,其中,停止从所述电荷存储元件汲取功率发生在以下各项中的至少一项之后:
预定的时间段,
当所述电荷存储元件的电压电平下降至低于阈值电压时,以及
当所述DSD所汲取的功率的电流瞬态不再超过所述电流阈值时。
16.根据权利要求15所述的方法,其中,所述阈值电压与用于在从所述主机提供的功率的意外损失之后向所述DSD提供功率的电压相对应。
17.根据权利要求14所述的方法,还包括:确定所述电荷存储元件是否可用于提供功率。
18.根据权利要求17所述的方法,其中,确定所述电荷存储元件是否可用于提供功率包括:
将一时间段中超过所述电流阈值的电流瞬态的次数与预定的极限进行比较;以及
当在所述时间段内所述电流瞬态的次数超过所述预定的极限时,确定所述电荷存储元件不可用。
19.根据权利要求17所述的方法,其中,确定所述电荷存储元件是否可用于提供功率包括:
将所述电荷存储元件的电压电平与阈值电压进行比较;以及
当所述电压电平低于所述阈值电压时,确定所述电荷存储元件不可用。
20.根据权利要求17所述的方法,还包括:当确定所述电荷存储元件不可用于提供功率时,降低所述DSD的性能。
21.根据权利要求14所述的方法,其中,所述电流阈值是来自所述主机的所述电源的电流极限。
22.根据权利要求14所述的方法,还包括:基于所述电流瞬态的变化速率来设置所述电流阈值。
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