CN105262503A - Group delay calibration based multipath delay generation device and method - Google Patents

Abstract

The invention provides a multipath delay generation device and method suitable for a baseband channel analog device. A multiphase filter generates a delay and a group delay calibration filter calibrates the delay. According to multipath delay parameters set by a user, a coefficient of the multiphase filter is generated on a computer and is transmitted to a field programmable gate array (FPGA), and a digital baseband signal gathered by an AD is filtered in the FPGA to generate a multipath delay signal; and an external instrument measures the multipath delay signal to obtain a delay error, a minimum filter frequency response weighted mean square error is resolved in the computer according to the delay error, so as to obtain the coefficient of the group delay calibration filter, the coefficient of the multiphase filter and the coefficient of the group delay calibration filter are combined and then transmitted to the FPGA, and the digital baseband signal is filtered in the FPGA so as to obtain the calibrated multipath delay signal. The method has high multipath delay resolution and precision.

Description

Multi-path time delay generating device and method based on group time delay calibration

Technical Field

The invention relates to the technical field of wireless information transmission, in particular to a multipath time delay generating device based on group delay calibration and a multipath time delay generating method based on group delay calibration.

Background

The baseband channel simulator can simulate the influence of an actual communication scene on wireless signal propagation, provides an effective means for evaluating the performance of a wireless channel, and is widely applied to the research and development and test of communication equipment.

With the rapid development of science and technology, people have higher and higher requirements on the performance of a baseband channel simulator. In the process of wireless signal transmission, multipath effect is generated under the influence of surrounding propagation environment, signals reach a receiving end through a plurality of paths, and the time delay of each path is changed along with time. Therefore, the baseband channel simulator needs to have a multipath delay generating device with high accuracy.

The multipath time delay generating device obtains the digital baseband signal through AD acquisition and adopts the FPGA to perform multipath time delay on the digital baseband signal. Generally, the resolution of multipath delay required by users is much higher than the sampling rate of AD, so that delay cannot be realized directly by delaying the AD sampling clock.

In the existing scheme, a software radio technology is adopted, the data rate of a signal is increased by interpolating and low-pass filtering a digital baseband signal, the time domain resolution of the signal is improved, then, the signal is subjected to high-resolution time delay, and finally, the data rate of the signal is recovered by extraction to obtain the delayed baseband signal.

In practical applications, the baseband signal has a high data rate after interpolation, and the low-pass filter has an operating clock frequency equal to or higher than the data rate, which is difficult to implement in hardware. Therefore, the polyphase filtering structure of interpolation and low-pass filtering is obtained through formula derivation, the structure divides a low-pass filter into a plurality of branch filters, the interpolation is moved to the low-pass filtering, the operation efficiency is effectively improved, meanwhile, the interpolation can be simplified with the following signal delay and extraction, and the simplified structure is only composed of a plurality of branch filters. The signal passes through a branch filter to obtain the time delay of the corresponding branch, and the working clock of the structure can be an AD sampling clock, so that the hardware implementation is easy.

The existing multipath time delay generating device has a finite word length effect and an operation rounding error when an algorithm is realized, when hardware is realized, the layout and wiring of an FPGA program can generate time delay, a working clock can also have jitter, and the problems can not ensure the resolution and the precision of multipath time delay.

Disclosure of Invention

Aiming at the defects in the prior art, the invention provides a multi-path delay generating device and method based on group delay calibration, which are combined with a multi-phase filter delay method, and a group delay calibration filter is adopted to calibrate the multi-path delay according to the measured delay error, so that the high resolution and the precision of the multi-path delay are ensured.

The technical scheme of the invention is realized as follows:

a multi-path delay generating device based on group delay calibration comprises: the device comprises a time delay coefficient calculation module, a calibration coefficient calculation module, a quantitative transmission module, an AD acquisition module, a time delay module, a DA output module and a time delay measurement module;

the time delay module is realized by an FIR filter group, an FIR filter is added for the signal of each path, and the time delay of the signal is realized by the FIR filter;

the time delay coefficient calculation module and the calibration coefficient calculation module calculate the coefficients of the FIR filter group according to the related parameters;

the quantization transmission module performs fixed-point processing on the coefficients and then transmits the coefficients to the FPGA through a data interface, the time delay module of the FPGA loads each coefficient to the FIR filter of the corresponding path, and the digital baseband signals acquired by AD are filtered after transmission is finished to obtain multipath time delay signals;

the multipath time delay signal is output through DA after channel simulation processing;

the time delay measurement module measures signals output by the DA to obtain time delay errors of each path relative to a reference path, and the time delay errors are input to the time delay coefficient calculation module;

and the time delay coefficient calculation module calculates the group delay calibration filter coefficient of each path according to the time delay error, and obtains the final calibration coefficient through coefficient combination.

Optionally, the period of the FIR filter operation clock is the same as the AD sampling clock.

Based on the device, the invention also provides a multi-path time delay generating method based on group time delay calibration, according to the multi-path time delay parameter set by the user, the coefficient of the polyphase filter is generated on the computer and transmitted to the FPGA, and the multi-path time delay signal is generated in the FPGA by filtering the digital baseband signal acquired by AD; the method comprises the steps of measuring multipath delay signals through a delay measurement module to obtain delay errors, solving a weighted mean square error of a minimized filter frequency response on a computer according to the delay errors to obtain coefficients of a group delay calibration filter, combining the coefficients of a polyphase filter and the coefficients of the group delay calibration filter, transmitting the combined coefficients to an FPGA, and filtering digital baseband signals in the FPGA to obtain calibrated multipath delay signals.

Optionally, the time delay coefficient calculation module and the calibration coefficient calculation module calculate coefficients of the FIR filter group according to the relevant parameters, and specifically include the following steps:

firstly, a time delay coefficient calculation module calculates the multipath time delay resolution T according to the user setting_sAnd the delay value tau of each path relative to the reference path_mAnd calculating coefficients of the polyphase filter, wherein M is 1-M and M is the number of paths, and obtaining the time delay coefficients by selecting branch filter coefficients of the polyphase filter.

Optionally, the polyphase filter algorithm of the polyphase filter comprises the following steps:

step (1), the polyphase filter prototype low-pass filter adopts a raised cosine filter, and the unit impulse response is as follows:

$h\left(t\right)=\frac{sin(\mathrm{\π}t/T_b)cos(\mathrm{\α}\mathrm{\π}t/T_b)}{(\mathrm{\π}t/T_b)(1-4{\mathrm{\α}}^2{t}^2/T_b^2)}---\left(1\right)$

wherein, T_bFor the filter symbol period, α for the roll-off coefficient, according to the multipath delay resolution T_sDiscretizing the formula (1) to obtain

$h\left({\mathrm{nT}}_s\right)=\frac{sin({\mathrm{\πnT}}_s/T_b)cos({\mathrm{\α\πnT}}_s/T_b)}{({\mathrm{\πnT}}_s/T_b)(1-4{\mathrm{\α}}^2{\left({\mathrm{nT}}_s\right)}^2/T_b^2)}---\left(2\right)$

Step (2), setting the interpolation multiple I as T_b/T_sα is 1, formula (2) is simplified to

$h\left(n\right)=\frac{\sin (\mathrm{\πn}/I)\cos (\mathrm{\α\πn}/I)}{(\mathrm{\πn}/I)(1-4n^2/I^2)}---\left(3\right)$

And (3) converting the low-pass filter into a polyphase filter, setting the order of the raised cosine filter as N, and setting the number of coefficients of each branch filter as N, wherein N is N/I, and the unit impulse response is

s_k＝{h(k)，h(k+2I)，...，h(k+(n-1)I)}k＝0～I-1(4)

Step (4), according to tau of M paths_mSelecting a branch filter coefficient s corresponding to the time delay_kWhere k is τ_m/T_sAnd obtaining the time delay coefficient and sending the time delay coefficient to the quantization transmission module.

Optionally, the quantization transmission module transmits s_kAfter fixed-point processing, the data is transmitted to the FPGA through a data interface, and each s is transmitted to the FPGA through a time delay module_kAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD after transmission is finished to obtain multipath time delay signals.

Optionally, the delay coefficient calculation moduleAccording to delay error sigma_mCalculating the group delay calibration filter coefficient of each path, and obtaining the final calibration coefficient through coefficient combination, wherein the method comprises the following calculation steps:

step (11) of judging σ_mWhether all the parameters reach the index, if so, the time delay coefficient is the final calibration coefficient, otherwise, the step (12) is executed;

and (12) constructing an ideal frequency response function of the group delay calibration filter as follows:

where ω is the numerical angular frequency, f is the normalized numerical frequency, f_uIs a constrained upper frequency limit;

and (13) constructing a frequency response function of the FIR filter as follows:

$H\left(f\right)=\underset{n=0}{\overset{N-1}{\mathrm{\Σ}}}{h}_r\left(n\right)e^{-j2\mathrm{\πnf}}=e^T\left(f\right)h_r---\left(6\right)$

wherein the coefficient of the filter is h_r＝(h_r(0)，h_r(1)，...，h_r(N-1))^T；

Step (14), according to H_i(f) And H (f) solving the weighted mean square error of the frequency response of the minimization filter by the formula (7) to obtain h_r；

$\underset{h}{\min }\underset{0<f<f_u}{\mathrm{norm}}(W_k\&CenterDot;(H_i\left(f\right)-e^T\left(f\right)h_r))---\left(7\right)$

Wherein, W_kThe non-negative weighting vector is used for controlling the constrained degree of each frequency point;

step (15) of converting s_kAnd h_rObtaining a final calibration coefficient of a path through convolution operation combination;

$h_d=s_k\&CircleTimes;h_r---\left(8\right)$

and (5) repeating the steps (12) to (15) until the calibration coefficients of all paths are calculated, and sending the calibration coefficients to the quantization transmission module.

Optionally, the quantization transmission module detects whether the final calibration coefficient is changed, and if not, the coefficient transmission is not performed;

if the h is changed, the h is fixed and transmitted to the FPGA, and the delay module of the FPGA transmits the h of each path_dAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD to obtain multipath time delay signals.

The invention has the beneficial effects that:

(1) the multi-path time delay is calibrated by utilizing a group delay calibration filter in combination with a multiphase filter time delay method, so that the precision of the multi-path time delay is ensured;

(2) according to the measured multipath time delay error, the coefficient of the calibration filter is obtained by solving the weighted mean square error of the frequency response of the minimized filter, and is combined with the time delay coefficient of the polyphase filter to generate high-precision multipath time delay for the signal.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic block diagram of a multi-path delay generator according to the present invention;

fig. 2 is a flowchart of the work of calculating the coefficients of the FIR filter bank according to the related parameters by the delay coefficient calculating module and the calibration coefficient calculating module of the present invention;

FIG. 3 is a block diagram of a polyphase filter algorithm implementation of the present invention;

fig. 4 is a functional block diagram of a calibration filter for one path of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The invention has proposed a multipath time delay generating device and method suitable for baseband channel simulator, produce time delay and group delay calibration filter calibration time delay through the polyphase filter; according to the multi-path time delay parameter set by a user, the invention generates the coefficient of a multiphase filter on a computer and transmits the coefficient to an FPGA (field programmable gate array), and a multi-path time delay signal is generated in the FPGA by filtering a digital baseband signal acquired by AD (analog-to-digital); the method comprises the steps of measuring multipath delay signals through an external instrument to obtain delay errors, solving the frequency response weighted mean square error of a minimized filter on a computer according to the delay errors to obtain coefficients of a group delay calibration filter, combining the coefficients of a multiphase filter and the coefficients of the group delay calibration filter, transmitting the combined coefficients to an FPGA, and filtering digital baseband signals in the FPGA to obtain calibrated multipath delay signals. Therefore, the invention has higher multi-path time delay resolution and precision.

The following describes the multi-path delay generation apparatus and method based on group delay calibration in detail with reference to the accompanying drawings.

As shown in fig. 1, the multi-path delay generating device based on group delay calibration of the present invention comprises: the device comprises a time delay coefficient calculation module, a calibration coefficient calculation module and a quantitative transmission module of a computer, an AD acquisition module, a time delay module of an FPGA, a DA output module and a time delay measurement module.

The time delay module is realized by an FIR filter group, an FIR filter is added for the signal of each path, and the time delay of the signal is realized by the FIR filter.

The time delay coefficient calculation module and the calibration coefficient calculation module calculate the coefficient of the FIR filter group according to the related parameters, the work flow chart is shown in FIG. 2, firstly, the time delay coefficient calculation module calculates the multipath time delay resolution T set by the user_sAnd the delay value tau of each path relative to the reference path_mAnd calculating coefficients of the polyphase filter by adopting a software radio technology, wherein M is 1-M, and M is the path number. The delay coefficients are obtained by selecting the branch filter coefficients of the polyphase filter.

As shown in fig. 3, the polyphase filtering algorithm of the polyphase filter comprises the following steps:

step (1), the polyphase filter prototype low-pass filter adopts a raised cosine filter, and the unit impulse response of the raised cosine filter is

$h\left(t\right)=\frac{sin(\mathrm{\&pi;}t/T_b)cos(\mathrm{\&alpha;}\mathrm{\&pi;}t/T_b)}{(\mathrm{\&pi;}t/T_b)(1-4{\mathrm{\&alpha;}}^2{t}^2/T_b^2)}---\left(1\right)$

Wherein, T_bFor the filter symbol period, α is the roll-off factor, depending on the multipath delay resolution T_sDiscretizing the formula (1) to obtain

$h\left({\mathrm{nT}}_s\right)=\frac{sin({\mathrm{\&pi;nT}}_s/T_b)cos({\mathrm{\&alpha;\&pi;nT}}_s/T_b)}{({\mathrm{\&pi;nT}}_s/T_b)(1-4{\mathrm{\&alpha;}}^2{\left({\mathrm{nT}}_s\right)}^2/T_b^2)}---\left(2\right)$

Step (2), setting the interpolation multiple I as T_b/T_sFormula (2) can be simplified to 1, α ═ 1

$h\left(n\right)=\frac{\sin (\mathrm{\&pi;n}/I)\cos (\mathrm{\&alpha;\&pi;n}/I)}{(\mathrm{\&pi;n}/I)(1-4n^2/I^2)}---\left(3\right)$

And (3) converting the low-pass filter into a polyphase filter, setting the order of the raised cosine filter as N, and setting the number of coefficients of each branch filter as N, wherein N is N/I, and the unit impulse response is

s_k＝{h(k)，h(k+2I)，...，h(k+(n-1)I)}k＝0～I-1(4)

Step (4), according to tau of M paths_mSelecting a branch filter coefficient s corresponding to the time delay_kWhere k is τ_m/T_sAnd obtaining the time delay coefficient and sending the time delay coefficient to the quantization transmission module.

The quantization transmission module is used for transmitting s of the path_kAfter fixed-point processing, the data is transmitted to the FPGA through a data interface, and each s is transmitted to the FPGA through a time delay module_kAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD after transmission is finished to obtain multipath time delay signals.

The period of the working clock of the FIR filter is the same as that of the AD sampling clock, and the working clock period is T_b. And the multipath time delay signal is output through DA after analog processing of other channels.

Measuring the signal output by DA by adopting a time delay measuring instrument to obtain the time delay error sigma of each path relative to a reference path_mAnd M is 1-M, and the delay error is input into a delay coefficient calculation module of the computer.

The time delay coefficient calculation module calculates the time delay coefficient according to the sigma_mCalculating the group delay calibration filter coefficient of each path, and obtaining the final calibration coefficient through coefficient combination, wherein the calculating steps are as follows:

step (11) of judging σ_mWhether all reach the indexIf yes, the time delay coefficient is the final calibration coefficient, otherwise, the step (12) is executed.

And (12) constructing an ideal frequency response function of the group delay calibration filter as follows:

where ω is the numerical angular frequency, f is the normalized numerical frequency, f_uIs a constrained upper frequency limit.

From the formula (5), it can be seen that f is more than 0_uThe amplitude-frequency response of the filter is constant at 1 and the group delay is constant at D + sigma_mWhere D is the inherent delay introduced by the filter itself. D is related to the filter order, so the filter order is the same for each path.

And (13) constructing a frequency response function of the FIR filter as follows:

$H\left(f\right)=\underset{n=0}{\overset{N-1}{\mathrm{\&Sigma;}}}{h}_r\left(n\right)e^{-j2\mathrm{\&pi;nf}}=e^T\left(f\right)h_r---\left(6\right)$

wherein the coefficient of the filter is h_r＝(h_r(0)，h_r(1)，...，h_r(N-1))^T。

Step (14), according to H_i(f) And H (f) solving the weighted mean square error of the frequency response of the minimization filter by the formula (7) to obtain h_r。

$\underset{h}{\min }\underset{0<f<f_u}{\mathrm{norm}}(W_k\&CenterDot;(H_i\left(f\right)-e^T\left(f\right)h_r))---\left(7\right)$

Wherein, W_kAnd the non-negative weighting vector is used for controlling the constrained degree of each frequency point.

When the formula (7) is specifically implemented, a global optimal solution can be obtained by means of a Matlab CVX tool box.

Step (15) of converting s_kAnd h_rThe final calibration coefficient of one path is obtained by convolution operation combination, and FIG. 4 showsA calibration filter schematic block diagram for one path;

$h_d=s_k\&CircleTimes;h_r---\left(8\right)$

wherein,is a convolution operation.

And repeating the steps 12-15 until the calibration coefficients of all paths are calculated, and sending the calibration coefficients to the quantization transmission module.

And the quantization transmission module detects whether the final calibration coefficient is changed or not, and if not, the coefficient transmission is not carried out. If the h is changed, the h is fixed and transmitted to the FPGA, and the delay module of the FPGA transmits the h of each path_dAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD to obtain multipath time delay signals.

The invention relates to a multi-path time delay generating device and method based on group delay calibration, which is combined with a multi-phase filter time delay method, and utilizes a group delay calibration filter to calibrate the multi-path time delay so as to ensure the precision of the multi-path time delay; according to the measured multipath time delay error, the coefficient of the calibration filter is obtained by solving the weighted mean square error of the frequency response of the minimized filter, and is combined with the time delay coefficient of the polyphase filter to generate high-precision multipath time delay for the signal.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (8)

1. A multi-path delay generation device based on group delay calibration is characterized by comprising: the device comprises a time delay coefficient calculation module, a calibration coefficient calculation module, a quantitative transmission module, an AD acquisition module, a time delay module, a DA output module and a time delay measurement module;

the time delay module is realized by an FIR filter group, an FIR filter is added for the signal of each path, and the time delay of the signal is realized by the FIR filter;

the time delay coefficient calculation module and the calibration coefficient calculation module calculate the coefficients of the FIR filter group according to the related parameters;

the quantization transmission module performs fixed-point processing on the coefficients and then transmits the coefficients to the FPGA through a data interface, the time delay module of the FPGA loads each coefficient to the FIR filter of the corresponding path, and the digital baseband signals acquired by AD are filtered after transmission is finished to obtain multipath time delay signals;

the multipath time delay signal is output through DA after channel simulation processing;

the time delay measurement module measures signals output by the DA to obtain time delay errors of each path relative to a reference path, and the time delay errors are input to the time delay coefficient calculation module;

and the time delay coefficient calculation module calculates the group delay calibration filter coefficient of each path according to the time delay error, and obtains the final calibration coefficient through coefficient combination.

2. The group delay calibration based multipath delay generating apparatus of claim 1, wherein the FIR filter operating clock has the same period as the AD sampling clock.

3. A multi-path time delay generating method based on the device of claim 1 or 2 is characterized in that according to the multi-path time delay parameter set by the user, the coefficient of the polyphase filter is generated on the computer and transmitted to the FPGA, and the multi-path time delay signal is generated in the FPGA by filtering the digital baseband signal collected by the AD; the method comprises the steps of measuring multipath delay signals through a delay measurement module to obtain delay errors, solving a weighted mean square error of a minimized filter frequency response on a computer according to the delay errors to obtain coefficients of a group delay calibration filter, combining the coefficients of a polyphase filter and the coefficients of the group delay calibration filter, transmitting the combined coefficients to an FPGA, and filtering digital baseband signals in the FPGA to obtain calibrated multipath delay signals.

4. The multipath delay generating method of claim 3,

the time delay coefficient calculation module and the calibration coefficient calculation module calculate the coefficients of the FIR filter group according to the related parameters, and the method specifically comprises the following steps:

firstly, a time delay coefficient calculation module calculates the multipath time delay resolution T according to the user setting_sAnd the delay value tau of each path relative to the reference path_mAnd calculating coefficients of the polyphase filter, wherein M is 1-M and M is the number of paths, and obtaining the time delay coefficients by selecting branch filter coefficients of the polyphase filter.

5. The multipath delay generating method of claim 4 wherein the polyphase filter algorithm of the polyphase filter comprises the steps of:

step (1), the polyphase filter prototype low-pass filter adopts a raised cosine filter, and the unit impulse response is as follows:

$h\left(t\right)=\frac{\sin (\mathrm{\&pi;t}/T_b)\cos (\mathrm{\&alpha;\&pi;t}/T_b)}{(\mathrm{\&pi;t}/T_b)(1-{4\mathrm{\&alpha;}}^2{t}^2/T_b^2)}---\left(1\right)$

wherein, T_bFor the filter symbol period, α for the roll-off coefficient, according to the multipath delay resolution T_sDiscretizing the formula (1) to obtain

$h\left({\mathrm{nT}}_s\right)=\frac{\sin (\mathrm{\&pi;}{\mathrm{nT}}_s/T_b)\cos (\mathrm{\&alpha;\&pi;}{\mathrm{nT}}_s/T_b)}{(\mathrm{\&pi;}{\mathrm{nT}}_s/T_b)(1-{4\mathrm{\&alpha;}}^2{\left({\mathrm{nT}}_s\right)}^2/T_b^2)}---\left(2\right)$

Step (2), setting the interpolation multiple I as T_b/T_sα is 1, formula (2) is simplified to

$h\left(n\right)=\frac{\sin (\mathrm{\&pi;n}/I)\cos (\mathrm{\&alpha;\&pi;n}/I)}{(\mathrm{\&pi;n}/I)(1-{4n}^2/I^2)}---\left(3\right)$

And (3) converting the low-pass filter into a polyphase filter, setting the order of the raised cosine filter as N, and setting the number of coefficients of each branch filter as N, wherein N is N/I, and the unit impulse response is

s_k＝{h(k)，h(k+2I)，...，h(k+(n-1)I)}k＝0～I-1(4)

Step (4), according to tau of M paths_mSelecting a branch filter coefficient s corresponding to the time delay_kWhere k is τ_m/T_sAnd obtaining the time delay coefficient and sending the time delay coefficient to the quantization transmission module.

6. The multipath time delay generating method of claim 5, wherein the quantization transmission module applies the s_kAfter fixed-point processing, the data is transmitted to the FPGA through a data interface, and each s is transmitted to the FPGA through a time delay module_kAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD after transmission is finished to obtain multipath time delay signals.

7. The multipath delay generating method of claim 6, wherein the delay coefficient calculating module calculates the delay coefficient based on the delay error σ_mCalculating the group delay calibration filter coefficient of each path, and obtaining the final calibration coefficient through coefficient combination, wherein the method comprises the following calculation steps:

step (11) of judging σ_mWhether all the parameters reach the index, if so, the time delay coefficient is the final calibration coefficient, otherwise, the step (12) is executed;

and (12) constructing an ideal frequency response function of the group delay calibration filter as follows:

where ω is the numerical angular frequency, f is the normalized numerical frequency, f_uIs a constrained upper frequency limit;

and (13) constructing a frequency response function of the FIR filter as follows:

$H\left(f\right)=\underset{n=0}{\overset{N-1}{\mathrm{\&Sigma;}}}{h}_r\left(n\right)e^{-j2\mathrm{\&pi;nf}}=e^T\left(f\right)h_r---\left(6\right)$

wherein the coefficient of the filter is h_r＝(h_r(0)，h_r(1)，...，h_r(N-1))^T；

Step (14), according to H_i(f) And H (f) solving the weighted mean square error of the frequency response of the minimization filter by the formula (7) to obtain h_r；

$\underset{h}{\min }\underset{0<f<f_u}{\mathrm{norm}}(W_k\&CenterDot;(H_i\left(f\right)-e^T\left(f\right)h_r))---\left(7\right)$

Wherein, W_kThe non-negative weighting vector is used for controlling the constrained degree of each frequency point;

step (15) of converting s_kAnd h_rObtaining a final calibration coefficient of a path through convolution operation combination;

$h_d=s_k\&CircleTimes;h_r---\left(8\right)$

and (5) repeating the steps (12) to (15) until the calibration coefficients of all paths are calculated, and sending the calibration coefficients to the quantization transmission module.

8. The multipath delay generating method of claim 7 wherein the quantization transmission module detects whether the final calibration coefficients are changed, and if not, does not perform coefficient transmission;

if the h is changed, the h is fixed and transmitted to the FPGA, and the delay module of the FPGA transmits the h of each path_dAnd loading the digital baseband signals to FIR filters of corresponding paths, and filtering the digital baseband signals acquired by AD to obtain multipath time delay signals.