CN105261622B - A kind of manufacture method of imaging detector - Google Patents

A kind of manufacture method of imaging detector Download PDF

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CN105261622B
CN105261622B CN201410243357.2A CN201410243357A CN105261622B CN 105261622 B CN105261622 B CN 105261622B CN 201410243357 A CN201410243357 A CN 201410243357A CN 105261622 B CN105261622 B CN 105261622B
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layer
interconnected pores
metal
imaging detector
manufacture method
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CN105261622A (en
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杨天伦
毛剑宏
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Zhejiang Core Microelectronics Co ltd
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Lexvu Opto Microelectronics Technology Shanghai Co Ltd
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Abstract

The invention discloses a kind of manufacture method of imaging detector, sacrifice layer is formed on the substrate;The sacrifice layer is etched, forms the through hole of exposure first interconnected pores;The through hole, which is filled, using germanium silicon forms the second interconnected pores;Metal level is formed on the sacrifice layer and the second interconnected pores;Second dielectric layer is formed on the metal layer;It is etched away the second dielectric layer and metal level of subregion, so that four adjacent the second interconnected pores are connected to the position above the reflecting layer by 4 wires respectively, and 4 wires disconnect, the metal wire for wherein connecting two diagonal the second interconnected pores extends to the exposure of the position above reflecting layer, and the metal wire of other two diagonal the second interconnected pores of connection is covered by second dielectric layer;Layer on surface of metal is handled using hydrogen and/or nitrogen;Thermistor is formed in the second dielectric layer corresponding to reflecting layer.

Description

A kind of manufacture method of imaging detector
Technical field
The present invention relates to field of semiconductor manufacture, more particularly to a kind of manufacture method of imaging detector.
Background technology
MEMS (Microelectro Mechanical Systems, abbreviation MEMS) is in microelectric technique base The research frontier of the multi-crossed disciplines to grow up on plinth is a kind of using semiconductor technology manufacture micro-electro-mechanical device Technology.Compared with traditional electro-mechanical device, MEMS has fairly obvious advantage in terms of high temperature resistant, small size, low-power consumption. By the development of decades, it has also become one of great sciemtifec and technical sphere that the world attractes attention, it is related to electronics, machinery, material, physics A variety of subjects and the technology such as, chemistry, biology, medical science, have broad application prospects.
Imaging detector is a kind of transducer for converting optical signals to electric signal.The structure of existing imaging detector is such as Shown in Fig. 1:Including:Substrate 10, it includes Semiconductor substrate 11 and first medium layer 12, is embedded with first medium layer 12 in battle array The first interconnected pores 13 of arrangement are arranged, the surface of substrate 10 has the reflecting layer between four the first adjacent interconnected pores 13 14;There is second dielectric layer 15, the interconnected pores 30 of thermistor 20 and second, the substrate 10 and second medium in the substrate 10 Layer 14, the interconnected pores 30 of thermistor 20 and second surround a cavity 35.Thermistor 20 is conductive material, and is located at reflecting layer 14 tops, reflecting layer 14 can reflex to the optical signal of incidence on thermistor 20, be preferably minimized the loss late of optical signal. Second interconnected pores 30 penetrate one by one with the first interconnected pores 13 to be connected.Formed between the second interconnected pores 30 and thermistor 20 conductive The metal interconnecting wires 50 of interconnection.But based in the MEMS manufacturing processes on CMOS, it is necessary to be carried out on the sacrifice layer of bulk The filling of through hole, it requires on the one hand the film of filling needs have good electric conductivity and through hole filling capacity, on the other hand The film for needing to fill has relatively small stress, and subsequently can not have cineration step to the etching for filling film, to prevent Sacrifice layer loses, so selecting metal filled interconnected pores be able to not will solve the above problems.
The content of the invention
Present invention solves the technical problem that providing a kind of manufacture method of imaging detector, imaging detector is greatly improved Reliability and accuracy.
In order to solve the above-mentioned technical problem, the invention provides a kind of manufacture method of imaging detector, including step:
Substrate is provided, it includes Semiconductor substrate and first medium layer, is embedded with cmos circuit in the semiconductor substrate, Dielectric layer is embedded with the first interconnected pores being arranged in array, and the substrate surface has between four adjacent contact holes Reflecting layer;
Characterized in that, also include step:
Sacrifice layer is formed on the substrate;
The sacrifice layer is etched, forms the through hole of exposure first interconnected pores;
The through hole, which is filled, using conductive material forms the second interconnected pores;
Metal level is formed on the sacrifice layer and the second interconnected pores;
Second dielectric layer is formed on the metal layer;
It is etched away the second dielectric layer and metal level of subregion so that four adjacent the second interconnected pores pass through respectively 4 wires are connected to the position above the reflecting layer, and 4 wires disconnect, wherein connecting diagonal two second The metal wire of interconnected pores extends to the exposure of the position above reflecting layer, the metal wire of other two diagonal the second interconnected pores of connection Covered by second dielectric layer;
Layer on surface of metal is handled using hydrogen and/or nitrogen;
Thermistor is formed in the second dielectric layer corresponding to reflecting layer, the thermistor covering extends to reflecting layer The metal wire of the exposure of top, the material of the thermistor is non-crystalline silicon;
Remove sacrifice layer.
Compared with prior art, the present invention mainly has advantages below:
The manufacture method of the imaging detector of the present invention is compared to prior art:Interconnected pores are filled using germanium silicon, due to germanium The adhesiveness of the side wall of silicon and semiconductor material is good, therefore good in the uniformity of through-hole side wall deposition, and stress is small, further Also using non-crystalline silicon make thermistor, improve the accuracy of thermistor, further also utilize to metal interconnecting wires The technology of surface treatment so that metal interconnecting wires and the electric property as the contact surface between the amorphous silicon layer of thermistor More preferably, the performance of device is improved.
Brief description of the drawings
By being more particularly described for the preferred embodiments of the present invention shown in accompanying drawing, above and other mesh of the invention , feature and advantage will become apparent from.The identical reference instruction identical part in whole accompanying drawings.Not deliberately by real Border size equal proportion scaling draws accompanying drawing, it is preferred that emphasis is shows the purport of the present invention.
Fig. 1 is a kind of structural representation of existing imaging detector;
Fig. 2 is the top view of the imaging detector shown in Fig. 1;
Fig. 3-Figure 11 is the manufacture method schematic diagram of the imaging detector of one embodiment of the invention.
Embodiment
With reference to figure 2, in the manufacture method of traditional imaging detector, by taking a probe unit as an example, including it is arranged in Four interconnected pores v1, v2, v3, v4 on four angles of rectangle, and the thermistor 20 among four interconnected pores, wherein Two diagonal interconnected pores v1, v3 are connected by metal interconnecting wires 50 with thermistor 20, two other diagonal interconnected pores v2, V4 is connected by dielectric layer with thermistor plays a part of support balance.Thermistor can incite somebody to action when detector works Optical signal is converted to electric signal, so as to be exported optical signal by the metal interconnecting wires of an import and one outlet. This case is based on, it is necessary to carry out the filling of through hole on the sacrifice layer of bulk, its requirement is filled out in the MEMS manufacturing processes on CMOS On the one hand the film filled needs have good electric conductivity and through hole filling capacity, on the other hand need the film filled to have relatively Less stress, and subsequently can not have cineration step to the etching for filling film, to prevent sacrifice layer from losing, so selection germanium Silicon fills interconnected pores, but because germanium silicon is needed by layer metal interconnection to thermistor, if so as to thermistor and metal Layer between contact performance it is bad will cause device resistance it is excessive so that the accuracy of imaging detector is low, therefore Inventor further contemplates to be optimized to reduce contact resistance to overall:When amorphous silicon layer is formed, pass through profit After being handled with hydrogen and/or hydrogen and/or nitrogen layer on surface of metal, and then deposited amorphous silicon thin film.So to institute State the processing of metal level and the formation of non-crystalline silicon is incorporated into same processing procedure, and become the contact performance of itself and thermistor surface It is good, the resistance of device is reduced, increases the accuracy of imaging detector.
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with the accompanying drawings to the present invention Specific implementation be described in detail.For the ease of understanding that the present invention is carried out in detail by taking a specific imaging detector as an example Explanation, but the present invention is not necessarily limited to structure in embodiment, and any those skilled in the art can be according to existing skill The part that art is replaced, belong to the scope that the present invention discloses and claims.
As shown in figure 3, the manufacture method of the imaging detector of the present invention includes below step:
S10:Substrate is provided, it includes Semiconductor substrate and first medium layer, is embedded with CMOS electricity in the semiconductor substrate Road, is embedded with the first interconnected pores being arranged in array in dielectric layer, and the substrate surface has first mutual positioned at adjacent four The even reflecting layer between hole;
S20:Sacrifice layer is formed on the substrate;
S30:The sacrifice layer is etched, forms the through hole of exposure first interconnected pores;
S40:The through hole, which is filled, using germanium silicon forms the second interconnected pores;
S50:Metal level is formed on the sacrifice layer and the second interconnected pores;
S60:Second dielectric layer is formed on the metal layer;
S70:It is etched away the second dielectric layer and metal level of subregion;
S80:Layer on surface of metal is handled using hydrogen and/or nitrogen;
S90:Thermistor is formed in the second dielectric layer corresponding to reflecting layer;
S100:Remove sacrifice layer.
In the specific embodiment of the present invention, with reference to figure 4, with reference to step S10, substrate 110 is provided first, it can be wrapped Semiconductor substrate 102 is included, it can be silicon base, the germanium silicon base of monocrystalline, germanium substrate, and extension life on a semiconductor substrate With polysilicon, germanium or germanium silicon material, can also the material such as epitaxial growth silica, formed with CMOS in Semiconductor substrate Circuit.There is first medium layer 104 in Semiconductor substrate 102, the material of first medium layer is silicon nitride or silica, thick Degree can be 100-200 angstroms.Interconnection circuit is embedded with first medium layer 104, interconnection circuit includes first to be arranged in array Interconnected pores 116.Four adjacent the first interconnected pores, are distributed on four angles of rectangle, four adjacent the first interconnected pores it Between there is reflecting layer 118.
In the present embodiment, preferably there is electrode 120 on the surface of the first interconnected pores 116, the electrode 120 and anti- It is identical to penetrate the material of layer 118, and is formed in same technique.
Then, with reference to figure 5, with reference to step S20, sacrifice layer 610 is formed in the substrate 110.The material of sacrifice layer 610 It can be amorphous carbon, but be not limited to amorphous carbon, or other materials well known in the art, for example (,) it is silica, non- Crystal silicon, amorphous germanium, photoresist, PI (Kapton PolyimideFilm) etc..Amorphous carbon is utilized in the present embodiment Advantage is that deposition speed is fast, and can accurately control the thickness of sacrifice layer;Its shape compared with PI or other photoresists Into sacrifice layer it is relatively thin, stability is good, can not be made thin using the materials such as PI are organic, technique is relative complex.In the present embodiment In, the method for forming sacrifice layer 610 is:Low-voltage plasma body chemical vapor phase growing (LPCVD) process deposits amorphous carbon, its thickness It can be made thin, such as in the present embodiment, thickness 1.8-2.6um, such as 2.0um.The parameter of the LPCVD is:Temperature It is 250 DEG C -500 DEG C to spend scope, and air pressure range 1mtorr-20mtorr, RF power bracket are 800W-2000W, reacting gas Including:C3H6And HE, wherein reaction gas flow 1000sccm-5000sccm, C3H6:HE volume ratio scope is 2:1- 10:1.In addition, enhancing plasma activated chemical vapour deposition (PECVD) can also be used, it is preferable that can using LPCVD With, simplified technique compatible with processing procedure below.
It is preferable in the present embodiment, add one layer of adhesion layer in sacrifice layer 610 and the intermediate demand of reflecting layer 118, i.e., the One adhesion layer 620, the material of the first adhesion layer 620 are germanium silicon and/or polycrystalline germanium, in the present embodiment preferably germanium silicon, advantage It is that processing compatibility is good, the effect of the sacrifice layer of germanium silicon adhesion amorphous carbon material is more preferable, and thickness can be 300-700 angstroms, such as 400 angstroms, 600 angstroms.First adhesion layer 620 can prevent occurring sliding or during forming sacrifice layer on reflecting layer 118 The problem of even property is bad.
Then, with reference to Fig. 6, step S30, etching sacrificial layer 610 are performed.It is preferable in the present embodiment, in etches sacrificial Also include forming one layer of etching stop layer 710 on sacrifice layer before layer, material is germanium silicon and/or polycrystalline germanium/or silicon nitride/oxygen SiClx layer, preferably germanium silicon and the laminated construction containing silicon oxynitride layer, advantage are that processing compatibility is good in the present embodiment, are glued The effect of the sacrifice layer of attached amorphous carbon material is more preferable, and wherein germanium silicon layer thickness can be 300-700 angstroms, such as 400 angstroms, 600 angstroms, The thickness of silicon-oxy-nitride layer can be 800-1100 angstroms, such as 900 angstroms.Due to holding when other film layers are formed on amorphous carbon Easily occur that adhesiveness is bad and the phenomenon slided, therefore described germanium silicon layer and silicon nitride layer can play a part of adhesion, and And the stop-layer of sacrifice layer etching is act as in follow-up etching process.
Then etching forms the through hole 720 of exposure first interconnected pores 116 in sacrifice layer, and specific lithographic method can To form opening, then the method for etching sacrificial layer using the second adhesion layer of etching after mask, etching sacrificial layer can utilize ash The method of change, is specifically repeated no more.
Then, with reference to Fig. 7, step S40 is performed, the through hole is filled using germanium silicon, forms the second interconnected pores 810, second The conductive interconnection of 810 and first interconnected pores of interconnected pores 116.In the present embodiment, technological parameter is:PECVD (PECVD) or low-pressure chemical vapor deposition (LPCVD) technique is deposited, is using LPCVD, its parameter in the present embodiment:Temperature It is 400 DEG C -430 DEG C to spend scope, air pressure range 150mtorr-200mtorr.The material of the germanium silicon layer of formation is Si1-xGex, X Value between 0.5 to 0.8, enhancing plasma activated chemical vapour deposition (PECVD) can also be used, compared to utilizing metal material Matter is filled, using germanium silicon fill germanium silicon material can on through-hole side wall homoepitaxial, step coverage is good, with relatively thin Material can fills up through hole, and on the one hand needs have good electric conductivity and through hole filling capacity, on the other hand needs The film to be filled has relatively small stress, and subsequently can not have cineration step to the etching for filling film, sacrificial to prevent Domestic animal layer loses, so selection germanium silicon filling interconnected pores.So as to which the uniformity of the second interconnected pores 810 formed is more preferable.
Then the conductive material on the second adhesion layer 710 is removed again, then removes the second adhesion layer, can specifically be used dry Method etches, or the method for cmp.
Then, with reference to Fig. 8, step S50 is performed, metal level is formed on the interconnected pores 810 of sacrifice layer 610 and second 910, the material of the metal level can be aluminium, copper, titanium or its oxide, and other conductive metallic materials or metal compound Thing, in the present embodiment using titanium material, because titanium thermal conductivity is smaller, the saturating infrared light of energy, it is easy to more accurately detect incident light. The titanium layer of 80 to 100 angstroms of formation can be used in the present embodiment, can specifically utilize chemical vapor deposition (CVD) technique, Technological parameter is:Temperature:180-200 DEG C, pressure 1-2mtorr, N2 flow 30-35sccm, Ar flow 10-18sccm, bias work( Rate 300-400W.
In order to ensure that the metal level to be formed can grow evenly on sacrifice layer, adhesiveness is more preferable, preferably sacrificial One layer of second adhesion layer 905 is first grown on domestic animal layer, its preferred silicon nitride, plays certain supporting role;It is sudden and violent in the second adhesion layer 905 Reveal interconnected pores.Then, step S60 is performed, second dielectric layer 920 is formed on metal level 910, in the present embodiment second medium The material of layer 920 is silicon nitride, and thickness can be 100 angstroms -150 angstroms.For isolating metal layer and other conductive layers, specific work Skill is well known to those skilled in the art, and is repeated no more.
Then, with reference to Fig. 9, step S70 is performed, removes the second dielectric layer of subregion using HBr gas dry etchings 920 and metal level 910, by taking a probe unit as an example, including four interconnected pores being arranged on four angles of rectangle, Yi Jiwei Thermistor 510 among four interconnected pores, wherein two diagonal interconnected pores are needed by metal interconnecting wires 520 and temperature-sensitive Resistance 210 is connected, and two other diagonal interconnected pores is connected by dielectric layer with thermistor plays a part of support balance.Cause This needs to etch second dielectric layer 920 and metal level 910 in this step.
One of scheme:Retain the second dielectric layer 920 and metal interconnecting wires 520 on four interconnected pores, and correspondingly The second dielectric layer 920 and metal level 910 of the rectangular area of the position of reflecting layer 118, and retain from four interconnected pores and connect institute Four metal interconnecting wires 520 and second dielectric layer 920 thereon of rectangular area are stated, but wherein connect two diagonal interconnection The position etching that hole v11, v13 and two articles of metal interconnecting wires 520 of the rectangular area extend to the top of reflecting layer 118 removes the Second medium layer 920, exposing metal interconnection line 520 are mutual positioned at two metals for connecting two other diagonal interconnected pores v12, v14 Line 520 removes second dielectric layer 920 and metal level 910 in the link position etching with the rectangular area, i.e. etching makes Interconnected pores and rectangular area disconnect.
In another scheme:Retain the second dielectric layer 920 and metal level 910 on four interconnected pores, and it is corresponding anti- The second dielectric layer 920 and metal level 910 of the rectangular area of the position of layer 118 are penetrated, and is retained from described in four interconnected pores connections Four metal interconnecting wires 520 of rectangular area and second dielectric layer 920 thereon, but wherein connect two diagonal interconnected pores The position etching that v11, v13 and two metal interconnecting wires 520 of the rectangular area extend to the top of reflecting layer 118 removes second Dielectric layer 920, exposing metal interconnection line 520,.
In another scheme:Retain four interconnected pores on second dielectric layer 920 and metal level 910, and retain from Four interconnected pores connect four metal interconnecting wires 520 and second dielectric layer 920 thereon of the rectangular area, but the square Second dielectric layer 920 and metal level 910 etching in shape region remove, wherein connecting diagonal two interconnected pores v11, v13 and institute Two metal interconnecting wires 520 for stating rectangular area extend to the position etching removal second dielectric layer 920 of the top of reflecting layer 118, Exposing metal interconnection line 520.
In the above-described embodiments, in order to ensure that the thermistor being subsequently formed can be corresponding with the region in reflecting layer, at this The area of rectangular area described in step is less than the area in the reflecting layer, in other words corresponds to the rectangle region of the position of reflecting layer 118 Domain is not complete corresponding, but corresponds to the middle section in reflecting layer.So it is being subsequently formed the heat that covers the rectangular area When quick resistance, it is possible to which corresponding with the region in reflecting layer, ensureing the reflected light in reflecting layer can reflex on thermistor.
Then, step S80 is performed:Layer on surface of metal is handled using hydrogen and/or hydrogen and/or nitrogen.H2To gold The processing step of category layer is deposited on same board with non-crystalline silicon below, is completed with a program, 200-265 DEG C of process temperatures; H2Flow be 3000-3750sccm, the controlled range of flow is wider, can specifically be set according to MFC range;Utilize H2The time handled Ti, TiN surface is 450-540S.Above-mentioned processing can also be completed using hydrogen and nitrogen, Need to adjust the ratio of hydrogen and nitrogen in processing procedure, its ratio can be adjusted 1:10 and 1:Between 20, or select Other ratios.
The present invention is surface-treated by using hydrogen or nitrogen to layer on surface of metal, optimizes metal level and amorphous Ohm property between silicon layer, so that being carried out using the scheme of germanium silicon filling contact hole.And control the temperature of heat treatment Degree and time, the hurtful gas of sacrifice layer being not easy to Ti and below is have selected, ensure that cmos device and MEMS devices The performance of part.
Certain step, which can also be located at, to be formed after metal level, before etching sheet metal.
Then, with reference to Figure 10, step S90 is performed:Thermistor is formed on the rectangular area corresponding to reflecting layer 118 510.In the present embodiment by taking first embodiment in above-mentioned steps as an example.In this embodiment, the rectangular area Metal interconnecting layer and the laminated construction of second dielectric layer are remained with, therefore thermistor 510 covers the lamination, and cover extension The metal level of exposure above to reflecting layer, so as to realize the interconnection of thermistor and metal level.In the present embodiment, preferably Thermistor 930 is amorphous silicon layer, and its forming method can be LPCVD or PECVD, due to using LPCVD can with below Processing procedure it is compatible, simplify technique, therefore preferable in the present embodiment use:LPCVD, parameter are:Reacting gas is:SiH4With H2, warm scope is 400 DEG C -430 DEG C, air pressure range 150mtorr-300mtorr, and the thickness of the amorphous silicon layer of formation is:10 Angstroms -100 angstroms, such as 50 angstroms.The area of the thermistor 510 is more than the rectangular area, can be with the face in the reflecting layer Product and position correspondence, that is, cover the rectangular area.Due in a step above, connecting the two of two diagonal interconnected pores Bar metal interconnecting wires 520 are in the link position exposure with the rectangular area, therefore thermistor 510 covers the gold of the exposure Belong to interconnection line 520, i.e., with the conductive interconnection of metal interconnecting wires 520, so just pass through gold positioned at diagonal two interconnected pores v11, v13 Belong to interconnection line 520 and the thermistor conductive interconnection, one is used as input, and one, as output, connects two other interconnection Hole v12, v14 metal interconnecting wires 520 in the region being connected with rectangular area due to being cut off, therefore not transmitting telecommunication number, but It is that remaining part can play a part of supporting thermistor, keeps stress equilibrium.
In the conventional technology, thermistor generally is formed using metal, such as vanadium oxide, but it invites temperature coefficient bad, Mechanical performance is poor, therefore the present invention is based on the MEMS frameworks on CMOS, therefore employs non-crystalline silicon (A-Si), its temperature system Number is 2~3%, because A-Si films have higher temperature-coefficient of electrical resistance (TCR) and moderate electrical conductivity, and has good machine Tool performance and less thermal conductivity, it is completely compatible with our ready-made CMOS technologies, so we select non-crystalline silicon as temperature-sensitive Resistance material, each thermistor is connected by Ti.Because Ti and non-crystalline silicon belong to metal and semiconductor material surface contacts it Ohm property is poor, therefore surface treatment is employed in the present invention, forms it into good Ohmic contact, and at optimizing surface The method of reason, its temperature and processing procedure is set not to cause to damage to cmos circuit below, this is also existing surface treatment What process was not accounted for.
If using the other embodiment in above-mentioned steps, can equally cause positioned at two diagonal interconnected pores v11, For v13 just by metal interconnecting wires 520 and the thermistor conductive interconnection, one as input, one is used as output, connects another Outer two interconnected pores v12, v14 metal interconnecting wires 520 are cut off or covered by second dielectric layer, therefore not transmitting telecommunication Number, but remaining part can play a part of supporting thermistor, keep stress equilibrium.
Then, with reference to Figure 11, step S100 is performed:Remove sacrifice layer.
In the present embodiment, second dielectric layer 920, the adhesion layer 905 of metal level 910 and the 3rd are first etched, it is sacrificial to form exposure The hole of domestic animal layer, then using the method for ashing, remove sacrifice layer.Ashing utilizes oxygen, and heating-up temperature is 350 DEG C -450 DEG C, At this temperature, vigorous combustion can't occur for fine and close activated carbon, and can be oxidized to carbon dioxide, and pass through through hole Discharge, sacrifice layer 610 can be removed thoroughly, and the remainder of device can't be affected.
Device carry out image detection operation principle be:Thermistor non-crystalline silicon is a kind of thermo-sensitive material, when what is be detected The outside radiations heat energy of object, the radiation of infrared band are absorbed by thermistor, raise thermistor temp, film resistor changes Become, the change of thermistor resistance is converted into difference current and integrates amplification, obtains being visited by subsequent sampling by cmos circuit The gray value of object is surveyed, finally by being processed into picture.
The above described is only a preferred embodiment of the present invention, any formal limitation not is made to the present invention.Appoint What those skilled in the art, without departing from the scope of the technical proposal of the invention, all using the side of the disclosure above Method and technology contents make many possible changes and modifications to technical solution of the present invention, or are revised as the equivalent reality of equivalent variations Apply example.Therefore, every content without departing from technical solution of the present invention, the technical spirit according to the present invention are done to above example Any simple modifications, equivalents, and modifications, still fall within technical solution of the present invention protection in the range of.

Claims (9)

1. a kind of manufacture method of imaging detector, including step:
Substrate is provided, it includes Semiconductor substrate and first medium layer, is embedded with cmos circuit in the semiconductor substrate, in medium Layer is embedded with the first interconnected pores being arranged in array, and the substrate surface has the reflection between four adjacent contact holes Layer;
Characterized in that, also include step:
Sacrifice layer is formed on the substrate;
The sacrifice layer is etched, forms the through hole of exposure first interconnected pores;
The through hole, which is filled, using germanium silicon forms the second interconnected pores;
Metal level is formed on the sacrifice layer and the second interconnected pores;
Second dielectric layer is formed on the metal layer;
It is etched away the second dielectric layer and metal level of subregion so that four adjacent the second interconnected pores pass through 4 respectively Metal wire is connected to the position above the reflecting layer, and 4 wires disconnect, wherein connecting two second diagonal interconnection The metal wire in hole extends to the exposure of the position above reflecting layer, and the metal wire of connection diagonal two the second interconnected pores in addition is by the Second medium layer covers;
Layer on surface of metal is handled using hydrogen and/or nitrogen;
Thermistor is formed in the second dielectric layer corresponding to reflecting layer, the thermistor covering is extended to above reflecting layer Exposure metal wire, the material of the thermistor is non-crystalline silicon;
Remove sacrifice layer.
2. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that
The manufacturing process of the amorphous silicon layer is:Reacting gas is:SiH4And H2, temperature range is 400 DEG C -430 DEG C, air pressure model Enclose for 150mtorr-300mtorr;The processing step that carried out to layer on surface of metal is led in the manufacturing process using non-crystalline silicon Enter H2As reacting gas, the step of heating.
3. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that
Also include forming the adhesion layer for covering the reflecting layer, adhesive layer material in the substrate before forming sacrifice layer step For germanium silicon and/or polycrystalline germanium, 400-500 angstroms of thickness.
4. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that the material of the sacrifice layer is amorphous Carbon and/or polyimides, thickness 1.8-2.2um.
5. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that also include before etching sacrificial layer Etching stop layer is formed on sacrifice layer, the material of etching stop layer is:Germanium silicon and/or silicon-oxy-nitride;
The etching stop layer is removed after the second interconnected pores are formed.
6. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that the first medium layer and second is situated between The material of matter layer is silicon nitride, 100-150 angstroms of thickness.
7. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that metal level is Ti or TiN layer thickness For:100 angstroms, and form adhesion layer being included in before metal level is formed on sacrifice layer.
8. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that it is described to layer on surface of metal processing Temperature is 200-265 DEG C, time 450-540S.
9. the manufacture method of imaging detector as claimed in claim 1, it is characterised in that
The first interconnection hole surface has electrode, and the electrode is identical with reflector material, and is formed in same technique.
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