CN105244285A - Manufacturing method of multi-step cavity on LTCC substrate - Google Patents
Manufacturing method of multi-step cavity on LTCC substrate Download PDFInfo
- Publication number
- CN105244285A CN105244285A CN201510547178.2A CN201510547178A CN105244285A CN 105244285 A CN105244285 A CN 105244285A CN 201510547178 A CN201510547178 A CN 201510547178A CN 105244285 A CN105244285 A CN 105244285A
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- lamination
- cavity
- ltcc substrate
- ceramic chips
- mating holes
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- 239000000758 substrate Substances 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000003475 lamination Methods 0.000 claims abstract description 83
- 239000000919 ceramic Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 28
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 239000000741 silica gel Substances 0.000 claims abstract description 20
- 229910002027 silica gel Inorganic materials 0.000 claims abstract description 20
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims abstract description 12
- 230000013011 mating Effects 0.000 claims description 22
- 229920006267 polyester film Polymers 0.000 claims description 14
- 238000010030 laminating Methods 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 abstract description 7
- 239000000463 material Substances 0.000 abstract description 7
- 239000002184 metal Substances 0.000 abstract description 6
- 229910052751 metal Inorganic materials 0.000 abstract description 6
- 230000001788 irregular Effects 0.000 abstract 1
- 230000005540 biological transmission Effects 0.000 description 5
- 239000008119 colloidal silica Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 208000002925 dental caries Diseases 0.000 description 2
- 238000009824 pressure lamination Methods 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- IXSZQYVWNJNRAL-UHFFFAOYSA-N etoxazole Chemical compound CCOC1=CC(C(C)(C)C)=CC=C1C1N=C(C=2C(=CC=CC=2F)F)OC1 IXSZQYVWNJNRAL-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000011112 process operation Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/4807—Ceramic parts
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a manufacturing method of a multi-step cavity on a LTCC substrate. A cavity structure is decomposed. According to different thicknesses of steps, raw ceramic chips which have different layers and are provided with corresponding holes are used to carry out superposition respectively. First lamination is performed on the raw ceramic chips which form each step through superposition and a substrate pedestal respectively so as to form each independent raw ceramic base. Each raw ceramic base forming the step is successively superposed on a raw ceramic base of the substrate pedestal and a soft silica gel which can cover the holes is placed on an uppermost layer of the raw ceramic base. Then, second lamination is performed so as to form the LTCC substrate. After the second lamination, the soft silica gel is removed. By using a method technology of the invention, an operation method is simple; a condition that a cavity die size or a sacrificial layer material size is calculated according to different cavity sizes is not needed; the soft silica gel can be used repeatedly, a metal die does not need to be manufactured or a sacrificial layer material does not need to be used and cost is saved; the method is especially suitable for manufacturing the multi-step cavity with an irregular shape and a complex structure.
Description
Technical field
The present invention relates to the manufacture method of ltcc substrate cavity, particularly relate to the manufacture method of many stepped cavity on a kind of ltcc substrate.
Background technology
LTCC(LTCC) substrate have three dimensional wiring density high, can in bury the distinguishing features such as integrated component, high-frequency transmission performance is good, adaptive capacity to environment is strong, long-term reliability is high, become the typical advanced substrate of modern microelectronic assembly.Multilayer interconnection ltcc substrate with cavity is 3D-MCM(3-D multi-chip assembly), SIP(system in package), MEMS(MEMS (micro electro mechanical system)) device, T/R(transmitting/receiving) important component of assembly contour performance High Density Integration product, it not only makes the assembled package density of product higher, also make that product function is more, transmission speed be faster, power consumption is lower, performance and better reliability, application is extensive.The number of plies of ltcc substrate is more, cavity step is more, then larger for the degree of freedom that three-dimensional high-density is integrated, application prospect is better.
One of LTCC stepped cavity is applied greatly and is used to do chip bonding die bonding, is widely used in high-frequency circuit design.During in order to reduce or reduce chip bonding, the long additional stray effect brought of spun gold, on the impact of LTCC circuit performance, needs in ltcc substrate, design step chamber, and the object in design step chamber realizes chip and gold wire bonding face is contour, thus reduce the length of spun gold, reduce the radian of spun gold.In order to avoid microwave transmission line is at same layer cabling, object avoids crosstalk, needs by transmission line at different layers cabling, in order to realize chip and transmission line is contour, therefore, ltcc substrate occurs the step chamber that the degree of depth is inconsistent.Based on above-mentioned situation, in high-frequency circuit design, ltcc substrate will there will be a large amount of cavitys, and be the appearance of different cavity, these cavitys, considerably increase the difficulty that ltcc substrate makes.
Existing ltcc substrate stepped cavity processing method mainly contains two kinds.The first uses metal die to make DOW CORNING colloidal silica, then when LTCC green base lamination, colloidal silica is filled in lamination limits distortion together in cavity, takes out colloidal silica after lamination.The method has following shortcoming: 1) often kind of circuit needs to process a set of metal die and lamination cover plate, and metal die is used for making colloidal silica, and lamination cover plate is used for retraining colloidal silica and expands.The method complex process, speed is slow, affects production efficiency; 2) right angle cavity metal die milling cutter cannot be processed, and needs to use wire cutting technology, and cost is high.
Another kind of LTCC stepped cavity processing method uses sacrificial layer material (main component is carbon dust), the cavity stopper corresponding with cavity is cut into by after sacrifice layer green lamination, when lamination by cavity stopper plug lamination together in cavity, limits is out of shape, and cavity stopper volatilizees when ltcc substrate burns altogether.The method has following shortcoming: 1) size of different cavity stopper and thickness need to calculate respectively, when cavity stopper is oversize, volatilizees completely also need to regulate sintering curre for making sacrificial layer material when ltcc substrate burns altogether; 2) when sacrifice layer stopper thickness is greater than 0.5m, sacrifice layer green is difficult to volatilize completely, more remaining sacrificial layer material residues burnt incompletely of the conductive surface of meeting in ltcc substrate cavity after burning down into altogether.This residue by glass-coated in LTCC ceramic chips, has sintered rear very difficult removal in common burning process, can impact operations such as the bonding die in cavity, bondings.
Summary of the invention
Technical problem to be solved by this invention is the defect overcoming prior art, provides the manufacture method of many stepped cavity on a kind of ltcc substrate.
For solving the problems of the technologies described above, the invention provides the manufacture method of many stepped cavity on a kind of ltcc substrate, it is characterized in that, comprising the following steps:
1) cavity structure decomposed, according to the different-thickness on each stage rank, adopt the different number of plies respectively, have the ceramic chips of corresponding aperture and superpose; The laminated ceramic chips forming substrate pedestal also superposes;
2) ceramic chips forming each step and substrate pedestal to superposition carries out first time lamination respectively and forms respectively independently green base;
3) each green base forming step is superimposed upon on the green base of substrate pedestal successively, and on the green base of the superiors, places the soft silica gel that can cover perforate, then carry out second time lamination formation ltcc substrate;
4), after second time lamination completes, soft silica gel is taken out.
Second time lamination time applied pressure be greater than first time lamination time applied pressure.
In step 1), the calculating of the bore size on ceramic chips comprises the different consideration to green base expansion rate during a different number of plies ceramic chips lamination.
Step 2) in, the step that first step carries out first time lamination is:
Lamination stacking table overlaps the polyester film that has N number of mating holes;
Successively the ceramic chips forming first step is enclosed within lamination stacking table in order;
Be inserted in the polyester film that has N number of mating holes again;
Finally be inserted in one piece of cover plate with N number of mating holes;
Adopt rubber peel parcel lamination stacking table to put into laminating machine and carry out first time lamination;
The step of first time lamination is carried out in like manner in other stage rank, substrate pedestal.
Each mating holes alignment.
In step 3), the step of second time lamination is:
Lamination stacking table overlaps the polyester film that has N number of mating holes;
The green base successively each being completed a lamination is in order enclosed within lamination stacking table;
Be inserted in the polyester film that has N number of mating holes and top layer cavity figure again;
Be inserted in the cover plate that a piece has N number of mating holes and top layer cavity figure;
Last on the cover board put one piece of soft silica gel large with ceramic chips etc.;
Use rubber peel parcel lamination stacking table and soft silica gel to put into laminating machine and carry out second time lamination.
Mating holes quantity N is 4.
The light face of each polyester film is all towards ceramic chips or green base.
The beneficial effect that the present invention reaches:
1) process operation is simple, does not need to calculate cavity mould size or sacrificial layer material size according to different cavity size;
2) soft silica gel is reusable, does not need make metal die or use sacrificial layer material, cost-saving;
3) be particularly suitable for out-of-shape, baroque multistage step (>=3 stage rank) cavity makes, and this kind of cavity uses conventional cavity manufacture method to be difficult to processing.
Accompanying drawing explanation
Fig. 1 is the ltcc substrate through hole profile adopting twice laminates of the present invention;
Fig. 2 is certain circuit ltcc substrate stepped cavity;
Fig. 3 is the ltcc substrate stepped cavity schematic diagram adopting this method processing;
Fig. 4 is the A-A profile of Fig. 2;
Fig. 5 is the B-B profile of Fig. 2.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.Following examples only for technical scheme of the present invention is clearly described, and can not limit the scope of the invention with this.
The simple and clear technical scheme of patent application of the present invention is:
1) during technological design, cavity structure is decomposed, because expansion rate during different number of plies ceramic chips lamination is different, so the cavity step of different-thickness adopts different magnification ratios;
2) first time lamination is completed to each step and substrate pedestal;
3) use second time lamination to force together on each step and substrate pedestal, during second time lamination, use soft silica gel to protect;
4), after second time lamination completes, take out soft silica gel, ltcc substrate stepped cavity completes.
Relative to conventional without cavity ltcc substrate, the difficulty of processing with the ltcc substrate of abnormal complex multiple stage rank (>=3 step) cavity is much bigger, must carry out systematic design to its processing process:
In step 1), because the present invention adopts secondary laminating method to make cavity, need when technical flow design to consider the green base expansion rate of different number of plies ceramic chips when a lamination, aligning accuracy during such guarantee secondary lamination between green base, adopts the ltcc substrate through hole profile of twice laminates as shown in Figure 1.So when doing creation data process, also need to consider this expansion rate as when punctured data, wire mark data, during a different number of plies ceramic chips lamination, green base expansion rate is as shown in table 1;
Green base expansion rate during a table 1 different number of plies ceramic chips lamination
| The green number of plies | Green base expansion rate |
| 1～5 | 1.002 |
| 5～10 | 1.0015 |
| 10～20 | 1.0013 |
| ＞20 | 1.0012 |
Step 2) in, first overlap on lamination stacking table a light towards on only have the polyester film of 4 lamination mating holes, then successively the ceramic chips of first step is enclosed within lamination stacking table in order, be inserted in a light again to face down and only have the polyester film of 4 lamination mating holes, be finally inserted in that one piece of thickness is 0.3mm, stainless steel lamination cover plate with 4 lamination mating holes.Use rubber peel parcel lamination stacking table to put into laminating machine and complete first time lamination formation green base.Other step ceramic chips of stepped cavity and base ceramic chips are completed as stated above respectively a lamination and form green base, the cavity of each step does not need protection, and one time laminating parameters is as shown in table 2;
Table 2 laminating technology parameter
| Warm-up time | Preheat temperature | Lamination pressure | Lamination times |
| 15min | 70℃ | 1000psi | 20min |
In step 3), first overlap on lamination stacking table a light towards on only have the polyester film of 4 lamination mating holes, then the green base successively each being completed a lamination is in order enclosed within lamination stacking table, be inserted in a light again to face down the polyester film of 4 lamination mating holes and top layer cavity figure, then be inserted in the stainless steel lamination cover plate having 4 lamination mating holes and top layer cavity figure of one piece of thickness 0.3mm, finally put on lamination cover plate one piece with aforesaid step ceramic chips, the impartial large soft silica gel of base ceramic chips.Use rubber peel parcel lamination stacking table and soft silica gel to put into laminating machine and complete second time lamination.Prevent cavity to be out of shape because soft silica gel is pressed in cavity when secondary lamination, after lamination completes, soft silica gel reverts to original form automatically, so this silica gel is reusable.Secondary laminating parameters is as shown in table 3;
Table 3 quadratic-layer compression technology parameter
| Warm-up time | Preheat temperature | Lamination pressure | Lamination times |
| 10min | 70℃ | 3000psi | 10min |
In step 4), after second time lamination completes, open rubber peel, remove soft silica gel and lamination cover plate, the green base after lamination is taken off from lamination stacking table, complete ltcc substrate stepped cavity and make.The design of certain circuit ltcc substrate stepped cavity as shown in Figure 2, uses the ltcc substrate stepped cavity of the method processing as shown in Fig. 3, Fig. 4 and Fig. 5.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and distortion, these improve and distortion also should be considered as protection scope of the present invention.
Claims (8)
1. the manufacture method of many stepped cavity on ltcc substrate, is characterized in that, comprise the following steps:
1) cavity structure decomposed, according to the different-thickness on each stage rank, adopt the different number of plies respectively, have the ceramic chips of corresponding aperture and superpose; The laminated ceramic chips forming substrate pedestal also superposes;
2) ceramic chips forming each step and substrate pedestal to superposition carries out first time lamination respectively and forms respectively independently green base;
3) each green base forming step is superimposed upon on the green base of substrate pedestal successively, and on the green base of the superiors, places the soft silica gel that can cover perforate, then carry out second time lamination formation ltcc substrate;
4), after second time lamination completes, soft silica gel is taken out.
2. the manufacture method of many stepped cavity on ltcc substrate according to claim 1, is characterized in that, applied pressure when applied pressure is greater than first time lamination during second time lamination.
3. the manufacture method of many stepped cavity on ltcc substrate according to claim 1, it is characterized in that, in step 1), the calculating of the bore size on ceramic chips comprises the different consideration to green base expansion rate during a different number of plies ceramic chips lamination.
4. the manufacture method of many stepped cavity on ltcc substrate according to claim 1, is characterized in that, step 2) in, the step that first step carries out first time lamination is:
Lamination stacking table overlaps the polyester film that has N number of mating holes;
Successively the ceramic chips forming first step is enclosed within lamination stacking table in order;
Be inserted in the polyester film that has N number of mating holes again;
Finally be inserted in one piece of cover plate with N number of mating holes;
Adopt rubber peel parcel lamination stacking table to put into laminating machine and carry out first time lamination;
The step of first time lamination is carried out in like manner in other stage rank, substrate pedestal.
5. the manufacture method of many stepped cavity on ltcc substrate according to claim 4, is characterized in that, each mating holes alignment.
6. the manufacture method of many stepped cavity on ltcc substrate according to claim 1, is characterized in that, in step 3), the step of second time lamination is:
Lamination stacking table overlaps the polyester film that has N number of mating holes;
The green base successively each being completed a lamination is in order enclosed within lamination stacking table;
Be inserted in the polyester film that has N number of mating holes and top layer cavity figure again;
Be inserted in the cover plate that a piece has N number of mating holes and top layer cavity figure;
Last on the cover board put one piece of soft silica gel large with ceramic chips etc.;
Use rubber peel parcel lamination stacking table and soft silica gel to put into laminating machine and carry out second time lamination.
7. on the ltcc substrate according to claim 4 or 6, the manufacture method of many stepped cavity, is characterized in that, mating holes quantity N is 4.
8. on the ltcc substrate according to claim 4 or 6, the manufacture method of many stepped cavity, is characterized in that, the light face of each polyester film is all towards ceramic chips or green base.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510547178.2A CN105244285B (en) | 2015-08-31 | 2015-08-31 | The preparation method of multi-step cavity on a kind of ltcc substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510547178.2A CN105244285B (en) | 2015-08-31 | 2015-08-31 | The preparation method of multi-step cavity on a kind of ltcc substrate |
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| Publication Number | Publication Date |
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| CN105244285A true CN105244285A (en) | 2016-01-13 |
| CN105244285B CN105244285B (en) | 2017-12-12 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108177422A (en) * | 2017-11-29 | 2018-06-19 | 中国电子科技集团公司第五十五研究所 | The two-sided isolated boss structure forming method of multi-layer ceramics |
| CN112437559A (en) * | 2020-11-16 | 2021-03-02 | 中国科学院空天信息创新研究院 | Laminating method of LTCC substrate double-sided cavity structure |
| CN112437542A (en) * | 2020-11-16 | 2021-03-02 | 中国科学院空天信息创新研究院 | Manufacturing method of LTCC substrate with multi-step cavity structure and LTCC substrate |
| CN113103415A (en) * | 2021-04-16 | 2021-07-13 | 中国电子科技集团公司第五十四研究所 | Manufacturing method of large-size embedded cavity structure LTCC substrate |
| CN114005666A (en) * | 2021-12-31 | 2022-02-01 | 广东力王高新科技股份有限公司 | Manufacturing method of LTCC planar transformer |
| CN114040599A (en) * | 2021-11-30 | 2022-02-11 | 中国兵器工业集团第二一四研究所苏州研发中心 | Manufacturing method of annular LTCC substrate |
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| US20050109453A1 (en) * | 2003-11-24 | 2005-05-26 | Jacobson Rena Y. | Fabrication of LTCC T/R modules with multiple cavities and an integrated ceramic ring frame |
| CN102724822A (en) * | 2012-06-25 | 2012-10-10 | 中国航天科工集团第二研究院二十三所 | Control technological method for planeness of surface of LTCC substrate |
| CN104103525A (en) * | 2014-06-24 | 2014-10-15 | 中国电子科技集团公司第十研究所 | Control method for defects of cavity structure of LTCC (Low Temperature Co-fired Ceramic) substrate |
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2015
- 2015-08-31 CN CN201510547178.2A patent/CN105244285B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050109453A1 (en) * | 2003-11-24 | 2005-05-26 | Jacobson Rena Y. | Fabrication of LTCC T/R modules with multiple cavities and an integrated ceramic ring frame |
| CN102724822A (en) * | 2012-06-25 | 2012-10-10 | 中国航天科工集团第二研究院二十三所 | Control technological method for planeness of surface of LTCC substrate |
| CN104103525A (en) * | 2014-06-24 | 2014-10-15 | 中国电子科技集团公司第十研究所 | Control method for defects of cavity structure of LTCC (Low Temperature Co-fired Ceramic) substrate |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108177422A (en) * | 2017-11-29 | 2018-06-19 | 中国电子科技集团公司第五十五研究所 | The two-sided isolated boss structure forming method of multi-layer ceramics |
| CN112437559A (en) * | 2020-11-16 | 2021-03-02 | 中国科学院空天信息创新研究院 | Laminating method of LTCC substrate double-sided cavity structure |
| CN112437542A (en) * | 2020-11-16 | 2021-03-02 | 中国科学院空天信息创新研究院 | Manufacturing method of LTCC substrate with multi-step cavity structure and LTCC substrate |
| CN112437559B (en) * | 2020-11-16 | 2022-02-18 | 中国科学院空天信息创新研究院 | Laminating method of LTCC substrate double-sided cavity structure |
| CN113103415A (en) * | 2021-04-16 | 2021-07-13 | 中国电子科技集团公司第五十四研究所 | Manufacturing method of large-size embedded cavity structure LTCC substrate |
| CN113103415B (en) * | 2021-04-16 | 2022-04-01 | 中国电子科技集团公司第五十四研究所 | Manufacturing method of large-size embedded cavity structure LTCC substrate |
| CN114040599A (en) * | 2021-11-30 | 2022-02-11 | 中国兵器工业集团第二一四研究所苏州研发中心 | Manufacturing method of annular LTCC substrate |
| CN114040599B (en) * | 2021-11-30 | 2024-03-29 | 中国兵器工业集团第二一四研究所苏州研发中心 | Annular LTCC substrate manufacturing method |
| CN114005666A (en) * | 2021-12-31 | 2022-02-01 | 广东力王高新科技股份有限公司 | Manufacturing method of LTCC planar transformer |
| CN114005666B (en) * | 2021-12-31 | 2022-03-11 | 广东力王高新科技股份有限公司 | Manufacturing method of LTCC planar transformer |
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Effective date of registration: 20180813 Address after: 233030 2016 Tang He road, Bengbu, Anhui Patentee after: Huadong Photoelectric Integrated Device Research Institute Address before: 215163 No. 89 Longshan Road, hi tech Zone, Suzhou, Jiangsu Patentee before: China North Industries Group Corporation No.214 Research Institute Suzhou R&D Center |